Icom IC-F6061 User manual

S-14324XZ-C1
Feb. 2007
UHF TRANSCEVERS

This service manual describes the latest service information
for the IC-F6061/F6062/F6063 UHF TRANSCEIVERS at the
time of publication.
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than 15 V. This will ruin the
transceiver.
DO NOT expose the transceiver to rain, snow or any liquids.
DO NOT reverse the polarities of the power supply when
connecting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW) to
the antenna connector. This could damage the transceiver’s
front end.
To upgrade quality, any electrical or mechanical parts and
internal circuits are subject to change without notice or
obligation.
MODEL VERSION FREQUENCY TX
POWER
IC-F6061 USA-01 400−470 MHz (Low band) 45 W
USA-02 450−512 MHz (High band)
IC-F6062 EUR-01 400−470 MHz (Low band)
25 W
IC-F6063 EXP-01 400−470 MHz (Low band)
EXP-02 450−520 MHz (High band)
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit Icom parts numbers
2. Component part number and name
3. Equipment model name and unit name
4. Quantity required
<SAMPLE ORDER>
1110003491 S.IC TA31136FNG IC-F6061 MAIN UNIT 5 pieces
8820001210 Screw 2438 screw IC-F6062 Top cover 10 pieces
Addresses are provided on the inside back cover for your
convenience.
Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United
Kingdom, Germany, France, Spain, Russia and/or other countries.
ORDERING PARTS
1. Make sure a problem is internal before disassembling
the transceiver.
2. DO NOT open the transceiver until the transceiver is
disconnected from its power source.
3. DO NOT force any of the variable components. Turn
them slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An
insulated tuning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the
transceiver is defective.
6. DO NOT transmit power into a signal generator or a
sweep generator.
7. ALWAYS connect a 50 dB to 60 dB attenuator between
the transceiver and a deviation meter or spectrum
analyzer when using such test equipment.
8. READ the instructions of test equipment thoroughly
before connecting equipment to the transceiver.
REPAIR NOTES
INTRODUCTION CAUTION

CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
SECTION 3 DISASSEMBLY INSTRUCTIONS
SECTION 4 OPTIONAL UNITS INSTALLATION
SECTION 5 CIRCUIT DESCRIPITON
5-1 RECEIVER CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5-2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5-3
FREQUENCY SYNTHESIZER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-4 POWER SUPPLY CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5-5 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5
SECTION 6 ADJUSTMENT PROCEDURES
6-1 PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6-2 FREQUENCY ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6-3 TRANSMIT ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6-4 RECEIVE ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
SECTION 7 PARTS LIST
SECTION 8 MECHANICAL PARTS
SECTION 9 BOARD LAYOUTS
SECTION 10 BLOCK DIAGRAM
SECTION 11 VOLTAGE DIAGRAM
SECTION 12 HM-152

1 - 1
SECTION 1 SPECIFICATIONS
[USA] [EXP] [EUR]
GENERAL
• Frequency coverage 400–470 MHz [USA-01]
450–512 MHz [USA-02]
400–470 MHz [EXP-01]
450–520 MHz EXP-02] 400–470 MHz
• Type of emission Wide 16K0F3E (25.0 kHz)
Middle – 14K0F3E (20.0 kHz)
Narrow
11K0F3E (12.5 kHz)
11K0F7E/D (12.5 kHz)
8K10F1E/D (12.5 kHz)
4K00F1E/D (6.25 kHz)
8K50F3E (12.5 kHz)
4K00F1E/D (6.25 kHz)
• Number of programable channels max. 512 channels (128 zones)
• Antenna impedance 50 Ω(nominal)
• Operating temperature range −30˚ to +60˚; −22˚F to +140˚F; −22˚F to +140˚F –25˚C to +55˚C
• Power supply requirement
(negative ground) 13.6 V DC (nominal) 13.2 V DC (nominal)
• Current drain
(approx.) RX Stand-by 300 mA
Max.audio 1200 mA
TX at 25 W 7 A
at 45 W 14 A
• Dimensions (projections not included)
160 (W) × 45 (H) × 150 (D) mm ; 2 3/32 (W) × 4 23/32 (H) × 1 9/32 (D) in
• Weight 1310 g; 2 Ib 14 oz
TRANSMITTER
• Transmit output power 45 W 25 W
• Modulation Variable reactance frequency modulation
• Max. permissible deviation Wide ±5.0 kHz
Middle – ±4.0 kHz
Narrow ±2.5 kHz
• Frequency error ±1.0 ppm ±1.5 kHz
• Spurious emission 75 dB typ. 0.25 µW (≤1 GHz),
1.0 µW (>1 GHz)
• Adjacent channel power Wide More than 70 dB
Middle – More than 70 dB
Narrow More than 60 dB
• Audio harmonic distortion 3% typ. (with 1 kHz AF 40% deviation)
• FM hum and noise
(without CCITT filter)
Wide More than 40 dB (45 dB typ.) –
Narrow More than 34 dB (40 dB typ.) –
• Limiting charact of modulation 70–100% of max. deviation
• Microphone impedance 600 Ω
RECEIVER
• Receive system Double-conversion superheterodyne
• Intermediate frequencies 1st IF; 46.35 MHz, 2nd IF; 450 kHz
• Sensitivity 0.25 µV typ. at 12 dB SINAD −4 dBµV (EMF) typ.
at 20 dB SINAD
• Squelch sensitivity (at threshold) 0.25 µV typ.
• Adjacent channel
selectivity
Wide More than 80 dB (85 dB typ.)
Middle − More than 78 dB (83 dB typ.)
Narrow More than 70 dB (75 dB typ.)
• Spurious response More than 85 dB (90 dB typ.)
• Intermodulation More than 75 dB (77 dB typ.) More than 65 dB (70 dB typ.)
• Hum and noise
(without CCITT filter)
Wide More than 45 dB (50 dB typ.) –
Narrow More than 40 dB (45 dB typ.) –
• Audio output power 4 W typ. at 10% distortion with a 4 Ωload
• Audio output impedance 4 Ω
All stated specifications are subject to change without notice or obligation.
Measurements made in accordance with EIA-152-C/204D, TIA-603 ([USA], [EXP]) or EN 300 086 ([EUR]).

2 - 1
SECTION 2 INSIDE VIEWS
IF IC
(IC170: TA31136FNG)
LCD DRIVER
(IC501: S1D15206F)
FRONT CPU
(IC503: HD64F3687)
FRONT CPU CLOCK
(X501: CR-764)
AF SWITCH/AMP
(IC1: NJM12902V)
BBIC CLOCK
(X2: CR-765)
AF LPF
(IC7: NJM12902V)
CPU CLOCK
(X5: CR-764)
REF OSC
(X1: CR-826)
PLL IC
(IC4: LMX2352TM)
LEVEL CONV.
(IC19: DS14C232TM)
VCO
• FRONT UNIT
• MAIN UNIT

3 - 1
SECTION 3 DISASSEMBLY INSTRUCTION
1. Removing the front panel
qTurn the transceiver’s power OFF, then disconnect the DC
power cable
wUnscrew the 4 bottom screws, then remove the bottom
cover from the transceiver in the direction of the arrow.
2. Removing the MAIN UNIT
qUnscrew 7 screws A, and unsolder 3 points B.
eRemove the front panel from the main body using a
standard cabinet screw driver as shown below.
Bottom cover
Main body
Front panel
Standard
screw driver
Front panel
Flat cable Main body
Front panel
Flat cable
rDisconnect the flat cable from the front panel.
C
D
E
Clip
Shield cover
tRemove the bush, and remove the MAIN UNIT in the
direction of the arrow.
Bush
wUnscrew 3 screws Cand remove the shield cover.
eUnsolder 3 points D(at the antenna connector) and
5 points E(at the PA module).
rRemove the clip.
B
A

4 - 1
SECTION 4 OPTIONAL UNITS INSTALLATION
A sponge with an adhesive strip has been added to optional units (UT-96R,
UT-108R, UT-109R, UT-110R, UT-119R, UT-119H, UT-124, UT-124R).
Remove the bottom protective papar, and attach the sponge to the specified
position on the optional units as below.
PBEFORE INSTALLING OPTIONAL UNITS
Supplied sponge
Supplied sponge
Supplied sponge
Supplied sponge
• UT-96R • UT-108R/UT-124/UT-124R
• UT-109R/UT-110R • UT-119R

4 - 2
POptional UT-96R or UT-119H installation
Install the optional UT-96R or UT-119H unit as follows:
qTurn the power OFF, then disconnect the DC power cable.
wUnscrew the 4 cover screws, then remove the bottom cover.
eInstall the UT-96R to J1 and the UT-119H to J2 as shown
in the diagram below.
rRemove the protective paper from the supplied sponge,
then attach it on the installed unit.
tReplace the bottom cover and screws, then re-connect
the DC power cable.
Front panel
Sponge
UT-96R
J1 J2
A
B
Front panel
POptional UT-109R or UT-110R installation
qTurn the power OFF, then disconne ct the DC power cable.
wUnscrew the 4 cover screws, then remove the bottom cover.
eCut the pattern on the PCB at the A (MIC) and B (AF OUT)
as shown below.
rInstall the scrambler unit to J1 as described in the instal-
lation of optional UT-96R installation as above.
tRemove the protective paper from the supplied sponge,
then attach it on the installed unit.
yReplace the bottom cover and screws.
Re-solder
NOTE: When uninstalling the unit
Be sure to re-solder the disconnected points as below
when you remove the unit. Otherwise no TX modulation or
AF output is available.
*This illustration describes the UT-96R installation.

5 - 1
SECTION 5 CIRCUIT DESCRIPTION
5-1 RECEIVER CIRCUITS
RF CIRCUITS
The antenna switching circuit toggles between the receive
(RX) line and transmit (TX) line. RF amplifier amplifies the
received signals within the frequency coverage.
Received signals from the antenna are passed through Low
Pass filter (LPF; L40, C369, C370), TX power detector (D47,
D49, D51) and another LPF (L38, L39, L45, C343, C345,
C349, C350, C356, C357), then applied to the antenna
switching circuit (D38, D39, L37, C337, C346).
The received signals are passed through the antenna
switching circuit as an LPF (L37, C337, C346), LPF (L35,
C322, C322, C323, C336) and two-staged tuned Bandpass
Filter (BPF; D34, L32, C299, C300 and D31, L31, C278,
C279), then applied to the RF amplifier (Q31).
The amplified signals are passed through another two-
staged tuned BPF (D27, L28, C260−C263, C242 and D26,
L26, C219, C220, C240) and applied to the 1st mixer (IC10;
pins 4, 5, L18, L19, L24).
1ST IF CIRCUITS
The amplified received signals from the RF circuit are
converted into the 1st IF signal, filtered and amplified at the
1st IF circuits.
The received signals from the RF circuits are mixed with
1st Local Oscillator (LO) signal from the RX VCOs, to be
converted into the 1st IF signal. The converted 1st IF signal
is amplified by 1st IF amplifier (Q50). The amplified 1st IF
signal is passed through the 1st IF filter (FI3 for analog
mode, FI4 for digital mode) via filter switches (Q20, D21,
D66, D67 on input side; D6, D68, D69 on output side) to
suppress unwanted signals. The filtered 1st IF signal is
amplified by another 1st IF amplifier (Q12), then applied to
the 2nd IF circuits.
2ND IF CIRCUITS
The 1st IF signal is converted into the 2nd IF signal,
amplified and demodulated in the IF IC.
The 1st IF signal from the 1st IF amplifier (Q12) is applied
to the IF IC (IC5, pin 16). The applied signal is converted
into the 2nd IF signal by being mixed with the 2nd LO signal
from X1 via tripler (Q3, L3, L2, C32−C35).
The converted 2nd IF signal is output from pin 3, and
passed through the 2nd IF filter (FI1). The filtered 2nd IF
signal is passed through (bypassed) another 2nd IF filter
(FI2) via filter switches (D1 on input side; D2 on output
side). The filtered signal is then applied to the IF IC (IC5, pin
5), and amplified by 2nd IF amplifier. The amplified signal is
FM-demodulated by quadrature detector (IC5, pins 10, 11;
X3).
The demodulated AF signals are output from pin 9, then
applied to the AF circuits.
AF CIRCUITS
The demodulated AF signals from the IF IC are amplified
and filtered at AF circuits.
This transceiver employs the base band IC for audio signal
processing for both transmit and receive. The base band
IC is an audio processor and composed of pre-amplifier,
compressor, expander, scrambler, etc. in its package.
The demodulated AF signals from IF IC (IC5, pin 9) are
passed through Digital/Analog switch (IC8, pins 2, 15), and
applied to the base band IC (IC2, pin 23).
The applied AF signals are amplified at the amplifier section
and level adjusted at the volume controller section, then
suppressed unwanted 3 kHz and higher audio signals at
LPF. The filtered AF signals are applied (bypassed) the TX/
RX HPF, scrambler, de-emphasis sections in sequence.
The TX/RX HPF filters out 250 Hz and lower audio signals,
and the de-emphasis circuit obtains –6 dB/oct of audio
characteristics. The expander expands the compressed
audio signals and also noise reduction function is provided.
The AF signals are then level adjusted at the volume
controller section and amplified at the amplifier section, then
output from pin 20 (IC2).
D/A converter
(IC6)
Mixer
RSSI
Quadrature
detector
2
1
1st IF signal from the IF amplifier (Q12)
16
Noise
detector
+5V
X3
1110
IF IC (IC5)
Filter
amp.
Limiter
amp.
Demodulated signals
to the AF circuits
• 2nd IF AND DEMODULATOR CIRCUITS
9
“NOIS” signal to the CPU (IC14: pin 113)
“RSSI” signal to the CPU (IC14: pin 71)
“D_IF” signal to the optional digital unit via J2
1312
Q3
X1
15.3 MHz
45.9 MHz BPF
2
3
Q13
Buffer
8735
FI1
FI2
N/W
SW
N/W
SW
D2 D1

5 - 2
The processed AF signals from the base band IC (IC2) are
passed through the AF mute switch (IC8, pins 3, 4) and D/A
converter (IC6, pins 15, 16) for level adjustment. The level
adjusted AF signals are amplified by AF amplifier (IC22).
The amplified AF signals are then;
- Output from D-sub 25 pin connector (CONNECT UNIT;
J602).
or
- Buffer-amplified by Q49, then applied to connected micro-
phone via FRONT UNIT.
or
- Applied to the AF power amplifier (IC21, pin 1) to obtain AF
output power level, then applied to the internal/external
speaker via external speaker jack (J7).
SQUELCH CIRCUITS
<NOISE SQUELCH>
The squelch mutes the AF output signals when no RF signals
are received. By detecting noise components (30 kHz and
higher signals) in the demodulated AF signals, the squelch
circuit toggles the AF power amplifier ON and OFF.
A portion of the demodulated AF signals from the IF IC
(IC5, pin 9) are applied to the D/A converter (IC6, pin 1)
for level adjustment (squelch threshold adjustment). The
level-adjusted AF signals are output from pin 2 and passed
through the noise filter (IC5, pins 7, 8, R121−R124, C216
−C218). The filtered noise signals are amplified the noise
components only.
The amplified noise components are converted into the pulse-
type signal at the noise detector section, and output from pin
13 as the “NOIS” signal. The “NOIS” signal is applied to the
CPU (IC14, pin 113), Then the CPU outputs signal “AFON2”
signal from pin 15 to the AF power amplifier controller (Q51,
Q52, D65), according to the “NOIS” signal level. The AF power
amplifier controller toggles AF power amplifier (IC21) ON and
OFF according to the “AFON” signal.
<TONE SQUELCH>
The tone squelch circuit detects tone signals and opens the
squelch only when receiving a signal containing a matched
sub audible tone. When the tone squelch is in use, and a
signal with a mismatched or no sub audible tone is received,
the tone squelch circuit mutes the AF signals even when the
noise squelch is open.
• CTCSS/DTCS
A portion of the demodulated AF signals are passed through
the active LPF (Q4, R45, R46, R47, R63, R64, C45, C46,
C47, C71) to filters CTCSS/DTCS signal. The filtered signal
is applied to the CPU (IC14, pin 64). The CPU compares the
applied signal and the set CTCSS/DTCS, then outputs con-
trol signal as same as “NOISE SQUELCH.”
• 2/5 TONE AND DTMF
2/5 tone signals in the demodulated AF signals are passed
through the LPF in the base band IC (IC2) and output from
pin 21, then applied to the CPU (IC14, pin 63) via tone
amplifer (IC1, pins 8, 9), and decoded.
5-2 TRANSMITTER CIRCUITS
MICROPHONE AMPLIFIER CIRCUITS
The AF signals from the microphone (MIC signals) are
filtered and level-adjusted at the microphone amplifier
circuits.
AF signals from the connected microphone (MIC signals)
are passed through (bypassed) the ALC (Automatic Level
Control) amplifier (FRONT UNIT; IC505, pins 3, 5) via AF
switch (FRONT UNIT; IC507, pins 1, 6/7), then applied to
the microphone amplifier (FRONT UNIT; IC508, pin 3). The
amplified MIC signals are output from pin 4, and applied to
the MAIN UNIT.
The MIC signals from the FRONT UNIT are passed through
the Int./Ext. MIC switch (IC23, pins 1, 6), and applied to the
base band IC (IC2, pin 3) and processed.
The applied MIC signals are amplified at the amplifier (TXA1),
and level adjusted at the volume controller (VR1). The level
adjusted MIC signals are applied (bypassed) the compressor
section, pre-emphasis section, TX/RX HPF, de-scrambler, limiter,
splatter, in sequence, then applied to another volume controller.
The compressor compresses the MIC signals to provide high S/N
ratio for receive side, and the pre-emphasis obtains +6 dB/oct
audio characteristics. The TX/RX HPF filters out 250 Hz and
lower audio signals, the limiter limits its level and the splatter
filters out 3 kHz and higher audio signals. The filtered MIC
signals are level adjusted at another volume controller (VR2),
and then output from pin 7 via smoothing filter (SMF).
The MIC signals from the base band IC are passed through
the digital/analog switch (IC8, pins 12, 14), FM/PM switch
(IC3, pins 13, 14), and applied to the AF mixer (IC1, pin
13) where the MIC signals and tone signals are mixed with.
The mixed MIC signals are passed through D/A converter
(IC6, pins 3, 4) for level adjustment. The level adjusted MIC
signals are then applied to the VCO as modulation signals.
MODULATION CIRCUITS
The modulation circuits modulates the VCO oscillating signal
using the modulation signals.
The MIC signals from the microphone amplifier circuits are
applied to the D20 of TX VCO (Q19, D14, D17, D18, D20)
as the modulation signals, and modulate the VCO oscillating
signal by changing the reactance of D20.
The FM-modulated VCO output is amplified by buffer-
amplifiers (Q22, Q29), then applied to the power amplifiers
via D24 as the TX signal.
SIGNALING ENCODE
5/2-TONE, DTMF and CTCSS/DTCS signals are output
from the CPU (IC14) and passed through the LPF (IC7)
and level converter (IC6), then applied to the AF mixer
(IC1, pin 13) and mixed with MIC signals. The mixed tone
signals are passed through the D/A converter (IC6, pins 3,
4) for level adjustment. The level adjusted tone signals are
applied to the both of TX VCO (Q19, D14, D17, D18, D20)
and reference frequency oscillator (X1, pin 1) via the level
adjuster (IC1, pins 1, 3).
Scrambler/
De-scrambler
TX/RX
HPF
Pre-
emphasis Limiter Splatter VR2
Expander VR4
RXA2
SMF
De-
emphasis
Com-
pressor
VR1
(HPF)
RX
LPF
VR3
(HPF)
7 MOD
18
19
20 SIGNAL
3TXIN
• BASE BAND IC BLOCK DIAGRAM
23RXIN
21SDEC
TXA1
RXA1
BASE BAND IC (IC2)

5 - 3
TX POWER AMPLIFIERS
The transmit signal from the TX VCO is amplified to the
transmit output level by the transmit amplifiers.
The TX VCO output signal from buffer amplifier (Q29) is
applied to the YGR amplifiers (Q30, Q53) via the TX/RX
switch (D24). The amplified TX signal is passed through the
LPF (L29, L30, C269−C271, C290), and applied to the RF
power module (IC15, pin 1) and power-amplified to obtain
50 W/25 W (max.) of TX output power.
The power-amplified TX signal is passed through the
LPF as a harmonic filter (L33, C305−C308), the antenna
switching circuit (D38, D39) and LPF (L38, L39, L45, C343,
C345, C349, C350, C356, C357).
The TX signal is also gone through the power detector (D47,
D49, D51) and LPF (L40, C369, C370) before being applied
to the antenna connector.
APC CIRCUIT
The APC (Automatic Power Control) circuit prevents the
transition of the transmit output power level which is caused
by load mismatching or heat effect, etc. At the power
detector, a portion of the transmit signal is rectified to
produce DC voltage which is in proportion of the transmit
power level.
The rectified voltage is applied to the inverted input terminal
of the operational amplifier (IC17, pin 3). The TX power
setting voltage “T2” from the D/A converter (IC12, pin 2) is
applied to the non-inverted input terminal as the reference.
The operational amplifier compares the rectified voltage and
reference voltage “T2,” and the difference of the voltage is
output from the operational amplifier pin 4, and the output
voltage controls the bias of YGR amplifiers (Q30, Q53) and
power module (IC15) for stable transmit output power.
OP.
amp.
+
–
• APC CIRCUIT
“T2”
“TMUT”
to the 1st mixer (IC10)
LPF ANT
SW
Q53
Power
amp.
YGR
amps. LPF
HV
to the antenna
Transmit signal
from T/RX switch (D24)
T8V
D51
D49
Q30, Q53
IC17
IC15
D47
Loop
filter
X1
15.3 MHz
Q17, D8, D9
Q18, D10, D13
RX VCO1
(400–485 MHz; Low band)
(450–485 MHz; High band)
RX VCO2
(485–470 MHz; Low band)
(485– 512/520 MHz; High band)
TX VCO
Q19, D14, D17, D18, D20
PLL control signals from the CPU (IC14)
PLL unlock signal
to the CPU (IC14, pin 73)
15.3 MHz
reference frequency signal
• PLL CIRCUITS
Buffer
Q22
Buffer
Q29
×3
Q25
to transmitter circuit
to 1st mixer circuit
D25
D24
BPF
PLST
SSO
SCK
4
11
6
10
14
15
16
PLL IC (IC4)
Shift register
Prescaler
Phase
detector
Divide
ratio
adjustment
Charge
pump
Programmable
divider
Reference
divider
5-3 FREQUENCY SYNTHESIZER CIRCUITS
VCO
VCO is a oscillator whose oscillating frequency is controlled
by adding voltage (lock voltage).
• RX VCO1 (Q18, D10, D13)
RX VCO1 generates the 1st LO signal for receiving 485 MHz
and below signals.
• RX VCO2 (Q17, D8, D9)
RX VCO2 generates the 1st LO signal for receiving 485 MHz
and above signals.
Each output signals are amplified by the buffer amplifiers
(Q22, Q29), and applied to the 1st mixer (IC10, pins 4, 5) via
TX/RX switch (D25 is ON, D24 is OFF) and LPF (L22, L23,
C215, C216, C236, C237), to be mixed with the received
signals to produce the 46.35 MHz 1st IF signal.
• TX VCO (Q19, D14, D17, D18, D20)
The output signal is applied to the transmit amplifiers via the
buffer amplifiers (Q22, Q29) and TX/RX switch (D24 is ON,
D25 is OFF).
A portion of the buffer-amplified VCO output signals from the
buffer amplifier (Q22) are applied to the PLL IC (IC4, pin 6)
via doubler (Q25) and BPF (Q5, D4, D5, L4, R77, C84−C90).

5 - 4
PLL IC
The PLL circuit provides stable oscillation of the transmit
frequency and receive 1st LO frequency. The PLL output
frequency is controlled by the divided ratio (N-data) from the
CPU.
The applied signals are divided at the prescaler and
programmable counter according to the control signals
(“SSO,” “PLST” and "SCK”) from the CPU. The divided signal
is phase-compared with the reference frequency signal from
the reference frequency oscillator (X1, pin 3), at the phase
detector.
The phase difference is output from pin 4 as a pulse type
signal after being passed through the internal charge pump.
The output signal is converted into the DC voltage (lock
voltage) by passing through the loop filter (Q8, Q9). The lock
voltage is applied to the variable capacitors (D10 and D13
of RX VCO1, D8 and D9 of RX VCO2, D14 and D17 of TX
VCO), and locked to keep the VCO frequency constant.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the VCO oscillating frequency.
CPU5
regurator
+8V
regurator
R8V
regurator
Power switch
Q47, Q48
IC18
IC20
Q38, Q39
HV
HV
VCC
“PWON”
CPU5
CPU
+8V
+5V
regurator
Q35, Q36
+5V
Voltage line
Control signal
4146
47
“RXC”
“TXC”
R8V
Receiver circuits
Common circuits
CPU (IC14),
EEPROM (IC16),
etc.
RF power amplifier (IC15)
etc.
AF power amplifier (IC21)
etc.
PLL IC (IC4)
Transmitter circuits
(IC14)
Attached optional units,
D/A converters,
etc.
Power Supply
• POWER SUPPLY CIRCUITS
T8V
regurator
Q34, Q37, D37
T8V
5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)
Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.

5 - 5
• CPU (MAIN UNIT; IC14)
Pin
No.
Port
Name Description
1 DSDA Outputs serial data to the D/A converter (IC20, pin 6).
2 DAST Outputs strobe signal to the D/A converter (IC4, pin 6).
3 SIDE3 Input port for [Side3] key (S4).
"Low"=When the key is pushed.
4−7 CBI0−3 Input ports for [ROTARY SELECTOR] (S701).
10 SSO Outputs serial data to the PLL IC (IC1, pin 15), D/A
converter (IC4, pin 8).
11 SCK Outputs serial crock signal to the PLL IC (IC1, pin
14), D/A converter (IC4, pin 8).
13 PLST Outputs PLL strobe signal to the PLL IC (RF UNIT;
IC1, pin 16).
15 DASW Outputs mode (Digital/Analog) switching signal to
the D/A converter (IC14, pins 10, 11).
17 TMUT Outputs transmit mute signal to the transmit mute
switch (RF UNIT; Q606).
18 NWC2 Outputs Narrow/Wide mode switching signal to the
bandwidth switches (Q26, D32, D33).
19 NWC1 Outputs Narrow/Wide mode switching signal to the
bandwidth switches (Q27, Q41, Q42, D34, D35).
20 DDSD Outputs serial data to the DTMF decode IC (IC10,
pin 9).
21 DDAC Outputs serial clock signal to the DTMF decode IC
(IC10, pin 11).
26 T5C
Outputs T5V line control signal to the T5V regulator
(Q15).
"Low"= While transmitting.
27 R5C
Output R5V line control signal to the R5V regulator
(Q16).
"Low"= While receiving.
28 S5C
Output S5V line control signal to the S5V regulator
(Q14).
"Low"=While power save mode.
29 PTTSW Input port for [PTT] switch (S3).
"Low"=When the switch is pushed.
30 SIDE2 Input port for [Side2] key (S5).
"Low"=When the key is pushed.
32 RMUT Outputs mute signal to the AF mute switch (D42).
37 NOIS Input port for the noise level from the IF IC (IC3, pin
13).
38 POSW Input port for power switch (R702) from power
controller (D36).
39 DDST Outputs strobe signal to the DTMF decode IC (MAIN
UNIT; IC10, pin 14).
40 MTCK Outputs serial clock signal to the base band IC
(MAIN UNIT; IC5, pin 9).
41 PWON
Outputs VCC line control signal to the power switch
(Q30, Q31).
"Low"=While the power is ON.
43 SENC Outputs single tone encode signal to the LPF (IC17,
pin 10).
44 BEEP Outputs beep sound to the AF circuits (IC4, pin 13).
45 SDEC Input port for decoded 2/5 tone and DTMF signals.
46 CDEC Input port for decoded CTCSS/DTCS signal.
47 ISENS Input port for power amplifier current detect signal
from the current detector (RF UNIT; Q604, Q605).
48 BATV Input port for remaining battery power.
49 LVIN Input port for VCO lock voltage.
50 RSSI Input port for RSSI signal from the IF IC (IC3, pin
12).
55 EMER Input port for [Emer] switch (S702).
Pin
No.
Port
Name Description
70 CSFT Outputs CPU clock frequency shift signal to the CPU
clock oscillator (X2, D38).
71 DUSE Outputs CTCSS/DTCS select signal to the CTCSS/
DTCS switch (Q34).
73 UNLK Input port for PLL unlock detect signal from the PLL
IC (IC1, pin 11).
74 RLED Outputs RX indicator (DS701) control signal to the
LED driver (Q701).
75 TLED Outputs TX indicator (DS701) control signal to the
LED driver (Q701).
78 FSDA Outputs serial data to the expand IC (FRONT UNIT;
IC505, pin 3).
79 FSCL Outputs serial clock signal to the expand IC (FRONT
UNIT; IC505, pin 3).
81 CIRQ Input port for external connection detect signal from
J1 and J2.
88 SIDE1 Input port for [Side1] key (S6).
"Low"=When the key is pushed.
89−
91
CENC0−
2Output CTCSS/DTCS signals to the LPF (IC17, pin 3).
92 EMPH Outputs emphasis characteristic change signal to
the D/A converter (IC13, pins 9, 10).
93 MTDT Outputs serial data to the base band IC (IC5, pin 10).
96 MSCK Outputs serial clock signal to the base band IC
(MAIN UNIT; IC5, pin 13).
97 PMFM Outputs modulation mode switching signal to the
PM/FM switch (IC13, pin 11) .
98 ESDA Outputs serial data to the EEPROM (IC19, pin 5).
99 ESCL Outputs serial clock signal to the EEPROM (IC19,
pin 6).
100 RESL Input port for reset signal from the reset IC (IC8, pin 1).
• D/A CONVERTER (MAIN UNIT; IC6)
Pin
No.
Port
Name Description
1T1
Outputs BPF tuning voltage to the tunable BPF (D23,
D24, L31, L32, C120−C122, C125−C127).
2T2
• While receiving
Outputs BPF tuning voltage to the tunable BPF
(D28, D29, L33, L34, C140−C144, C147).
• While transmitting
Outputs TX power setting voltage to the APC
amplifier (RF UNIT; IC601).
3 TXLVA Outputs oscillation frequency adjust voltage to the
TX VCO (Q3, D10−D12).
4 RXLVA Outputs oscillation frequency adjust voltage to the
RX VCO1/2 (Q1, D1−D4/Q2, D5−D8).
5-5 PORT ALLOCATIONS

6 - 1
SECTION 6
SECTION 6 ADJUSTMENT PROCEDURES
6-1 PREPARATION
When adjusting IC-F6060 series, CS-F5060 CLONING SOFTWARE, CS-F5060 ADJ ADJUSTMENT SOFTWARE (Rev. 1.0 or later),
OPC-1122/U/ JIG CABLE and the following test equipments are required.
EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE
DC power supply
Output voltage
Current capacity
: 13.6 V DC [USA],[EXP]
13.2 V DC [EUR]
: More than 20 A Attenuator
Power attenuation
Capacity
: 50 or 60 dB
: 50 W [USA],[EXP)
30 W [EUR]
modulation analyzer Frequency range
Measuring range
: DC–600 MHz
: 0 to ±10 kHz External speaker Input impedance Capacity
: 4 Ω
: 5 W or more
Frequency counter
Frequency range
Frequency accuracy
Sensitivity
: 0.1–600 MHz
: ±1 ppm or better
: 100 mV or better
Standard signal
generator (SSG)
Frequency range
Output level
: 0.1–600 MHz
: 0.1 µV to 32 mV
(–127 to –17 dBm)
RF power meter
Measuring range
Frequency range
Impedance
SWR
: 0.1–50 W [USA],[EXP]
0.1–30 W [EUR]
: 100–800 MHz
: 50 Ω
: Better than 1.2 : 1
Oscilloscope Frequency rang
Measuring range
: DC–20 MHz
: 0.01–20 V
Digital voltmeter Input impedance
Measuring range
: 50 kΩ
: 0.1–10V
▄SYSTEM REQUIREMENTS (for the ADJUSTMENT SOFTWARE)
• Microsoft®Windows®98/98SE/Me/2000/XP • RS-232C serial port (D-sub 9 pin) or USB port
▄STARTING SOFTWARE ADJUSTMENT
qConnect the transceiver and PC with OPC-1122/U JIG
CABLE.
wTurn the transceiver power ON.
eBoot up Windows, and click the program group ‘CS-F5060
ADJ’ in the ‘Programs’ folder of the [Start] menu, then
CS-F5060 ADJ’s window appears.
rClick ‘Connect’ on the CS-F5060 ADJ’s window, then the
window shows transceiver’s condition and adjustment
items as below.
tSet or modify adjustment data as specified.
▄ BEFORE STARTING SOFTWARE ADJUSTMENT
Clone the adjustment frequencies and settings into the transceiver, and set the configuration using the CS-F5060 CLONING SOFT-
WARE before starting the software adjustment. Otherwise, the software adjustment can not be started.
CAUTION!: BACK UP the originally programmed memory data in the transceiver before programming the adjustment frequencies.
When program the adjustment frequencies into the transceiver, the transceiver’s memory data will be overwritten and
lose original memory data at the same time.
Microsoft and Windows are registered trademarks of Micro-
soft Corporation in the U.S.A. and other countries.
▄ ADJUSTMENT SOFTWARE INSTALLATION
qQuit all applications when Windows is running.
wInsert the CD into the appropriate CD drive.
eDouble-click the “Setup.exe” contained in the ‘CS-F5060
ADJ’ folder in the CD drive.
rThe “Welcome to the InstallShield Wizard for CS-F5060
ADJ” will appear. Click [Next>].
tThe “Choose Destination Location” will appear. Then click
[Next>] to install the software to the destination folder. (e.g.
C:\Program Files\Icom\CS-F5060 ADJ)
y
After the installation is completed, the “InstallShield Wiz-
ard Complete” will appear. Then click [Finish].
uEject the CD.
iProgram group ‘CS-F5060 ADJ’ appears in the ‘Programs’
folder of the start menu, and ‘CS-F5060 ADJ’ icon ap-
pears on the desk top screen.
• ADJUSTMENT FREQUENCY LIST
CH FREQUENCY (MHz) SETTING CH FREQUENCY (MHz) SETTING
(Low)‡(High)‡Low band‡High band‡
1 400.000 450 .000 • TX power
• Mode
: Low1
: Narrow 9 470 .000 520 .000 • TX power • Mode
: Low1
: Wide
2 435 .000 485 .000 • TX power
• Mode
: Low1
: Narrow 10 435 .000 485 .000 • TX power • Mode
: Low1
: Middle
3 434.95 .000 484.95 .000 • TX power
• Mode
: Low1
: Narrow 11 400 .000 450 .000 • TX power • Mode
: High
: Middle
4 470 .000 520 .000 • TX power
• Mode
: Low1
: Narrow 12 470 .000 520 .000 • TX power • Mode
: Low1
: Middle
5 435 .000 485 .000 • TX power
• Mode
: High
: Narrow 13 435 .000 485 .000 • TX power • Mode
: Low1
: Digital
6 435 .000 485 .000 • TX power
• Mode
: Low2
: Narrow 14 400 .000 450 .000 • TX power • Mode
: Low1
: Digital
7 435 .000 485 .000 • TX power
• Mode
: Low1
: Wide 15 470 .000 520 .000 • TX power • Mode
: Low1
: Digital
8 400 .000 450 .000 • TX power
• Mode
: Low1
: Wide 16 435 .000 485 .000
• TX power
• Mode
• CTCSS
: Low1
: Wide
: 151.4 Hz
*; [EUR] only ‡;(Low)=[USA-01], [EXP-01], [EUR-01] (High)=[USA-02], [EXP-02]

6 - 2
• CONNECTION
Modulation analyzer
Attenuator
50 dB or 60 dB
to the antenna connector
to DC cable
Standard signal generator
–127 to –17 dBm
(0.1 V to 32 mV)
CAUTION:
DO NOT transmit while
SSG is connected to
the antenna connector.
RF power meter (50 Ω)
1–50 W [USA-01/02]
1–30 W [others]
DC power supply
13.6 (13.2) V / 20 A [USA],
[EUR]
13.2 (13.2) V / 20 A , [EUR]
Frequency
counter
to EXT. SP jack
SINAD meter
SP (4 Ω)
to the
[MICROPHONE CONNECTOR]
to an RS-232C port
JIG CABLE
JIG CABLE
RS-232C cable
(straight) IC-F6061
IC-F6062
IC-F6063
+Audio generator
300 Hz to 3 kHz
AC
millivoltmeter
MICE
MIC
PTT
PTT switch
PTTE
Add a jumper wire here
Add a jumper wire here
Electrolytic
capacitor
47 µF
OPC-1122
(RS-232C type Cloning cable)
OPC-1122U
(USB type Cloning cable)
+Audio generator
300 Hz to 3 kHz
AC
millivoltmeter
GND
MIC
Electrolytic
capacitor
47 µF
PTT
PTT switch
GND
PC
OPC-1122U (USB type)
AC millivoltmeter
Audio generator

6 - 3
NOTE: The above screen is an example only. Each transceiver has its own specific values for each setting.
• ADJUSTMENT SOFTWARE WINDOW
Transmit output power
Modulation balance
FM deviation
CTCSS/DTCS deviation
Squelch level
Reference frequency
RX sensitivity (Auto.)
RX sensitivity (Manu.)
PLL lock Voltage
(Preset)
S-meter
FM deviation
(Narrow)
FM deviation
(Middle)
FM deviation
(Wide)
Digital deviation
Digital mode preset
2/5tone, DTMF
PLL lock Voltage
(Adjustment)
*; DO NOT put the cursor on these items
and push the [ENTER] key. Otherwise,
some adjustment items will not be ad-
justed properly.
(*)
(*)
(*)
(*)
(*)

6 - 4
6-2 FREQUENCY ADJUSTMENT
Select an adjustment item using [↑] / [↓] keys, then set to the specified value using [←] / [→] keys on the connected PC’s keyboard.
ADJUSTMENT ADJUSTMENT CONDITION UNIT OPERATION VALUE
PLL LOCK
VOLTAGE
[RX LVA1]
1 Set the preset value of [LV (RX1)], [LV RX2] to “204 [4 V]”, and [LV TX] to “39 [0.76 V]” on the PC screen.
2 • Channel
• Preset
• Receiving
: CH 3
: 204 [4 V]
PC
screen
Click [Reload (F5)] button, then
check the “LVIN” item on the
CS-F5060 ADJ’s screen as below.
4 V
[RX LVA2] 3 • Channel
• Preset
• Receiving
: CH 4
: 204 [4 V]
4 V
[TX LVA] 4 • Channel
• Preset
• Transmitting
: CH 1
: 39 [0.76 V]
0.76 V
CONVENIENT: The “PLL LOCK VOLTAGE” can be adjusted automatically.
1: Set the Lock voltage preset ([LV RX1], [LV RX2], [LV TX]).
2: Push the [ENTER] key on the connected PC’s keyboard.
PLL LOCK
VOLTAGE
(verify)
1 • Channel
• Receiving
: CH 1 PC
screen
Click [Reload (F5)] button, then
check the “LVIN” item on the
CS-F5060 ADJ’s screen.
3.4–4.4 V
(Verify)
2 • Channel
• Receiving
: CH 2
3 • Channel
• Transmitting
: CH 4
REFERENCE
FREQUENCY
[REF]
1 • Channel : CH 4 Top
panel
Loosely couple a frequency
counter to the antenna connector.
470.000 MHz
(Low)‡
520.000 MHz
(High)‡
• Connect an RF power meter to the
antenna connector.
• Transmitting
‡;(Low)=[USA-01], [EXP-01], [EUR-01] (High)=[USA-02], [EXP-02]
NOTE: The above screen is an example only.
Each item’s voltage will appear when pushing [Update] button.
PLL LOCK VOLTAGE
will be appeared here

6 - 5
6-3 TRANSMIT ADJUSTMENT
Select an adjustment item using [↑] / [↓] keys, then set to the specified value using [←] / [→] keys on the connected PC’s keyboard.
ADJUSTMENT ADJUSTMENT CONDITION UNIT OPERATION VALUE
OUTPUT
POWER
[Power (Hi)]
1 • Channel : CH 5
• Transmitting
Rear
panel
Connect an RF power meter to
the antenna connector.
45 W [USA]
25 W [others]
[Power (L2)] 2 • Channel : CH 6
• Transmitting
25 W [USA]
10 W [others]
[Power (L1)] 3 • Channel : CH 2
• Transmitting
4.5 W [USA]
2.5 W [others]
MODULATION
BALANCE
[BAL]
1 • [MOD N] : 80 Rear
panel
Connect the modulation analyzer
with an oscilloscope to the
antenna connector through an
attenuator.
Set to square wave
2 • Channel : CH 2
• No audio signals applied to the JIG cable.
• Set a modulation analyzer same as;
HPF : OFF
LPF : 20 kHz
De-emphasis : OFF
Detector : (P–P)/2
• Push [P0] while transmitting
FM
DEVIATION
(NARROW)
[MOD N C]
1• Channel : CH 2
• Connect an audio generator to the JIG
cable and set as;
Frequency : 1.0 kHz
Level : 40 mV rms
• Set the modulation analyzer to the same
condition as “MODULATION BALANCE.”
Rear
panel
Connect the modulation ana-
lyzer to the antenna connector
through an attenuator.
±2.05 to ±2.15 kHz
• Transmitting
(NARROW)
[MOD N L]
2• Channel : CH 1
• Transmitting
(NARROW)
[MOD N H]
3• Channel : CH 4
• Transmitting
(WIDE)
[MOD W C]
4• Channel : CH 7
• Transmitting
±4.05 to ±4.15 kHz
(WIDE)
[MOD W L]
5• Channel : CH 8
• Transmitting
(WIDE)
[MOD W H]
6• Channel : CH 9
• Transmitting
(MIDDLE)*
[MOD M C]
7• Channel : CH 10
• Transmitting
±3.15 to ±3.25 kHz
(MIDDLE)*
[MOD M L]
8• Channel : CH 11
• Transmitting
(MIDDLE)*
[MOD M H]
9• Channel : CH 12
• Transmitting
DIGITAL
DAVIATION
[MOD D C]
1Set the [Digital Mode] to “7.”
2• Channel : CH 13
• Attach the UT-119 to J2.
(See page 4-1 for installation.)
Rear
panel
Connect the modulation ana-
lyzer to the antenna connector
through an attenuator.
±1.35 to ±1.39 kHz
[MOD D L] 3 • Channel : CH 14
[MOD D H] 4 • Channel : CH 15
CTCSS/DTCS
DEVIATION
[CTCS/DTCS]
1• Channel : CH 16
• No audio signals applied to the JIG cable.
• Set the modulation analyzer to the same
condition as “MODULATION BALANCE.”
• Transmitting
Rear
panel
Connect a modulation ana-
lyzer to the antenna connector
through an attenuator.
±0.68 to ±0.72 kHz
2TONE,
5TONE,
DTMF
[S.Tone]
1• Channel : CH 2
• Push [P3] while transmitting
Rear
panel
Connect a modulation ana-
lyzer to the antenna connector
through an attenuator.
±1.50 kHz
*; [EUR] only.
‡;(Low)=[USA-01], [EXP-01], [EUR-01] (High)=[USA-02], [EXP-02]

6 - 6
6-4 RECEIVE ADJUSTMENT
Select an adjustment item using [↑] / [↓] keys, then set to the specified value using [←] / [→] keys on the connected PC’s keyboard.
ADJUSTMENT ADJUSTMENT CONDITION UNIT LOCATION VALUE
RECEIVE
SENSITIVITY
[BPF (T1)]
[BPF (T2)]
NOTE: “RECEIVE SENSITIVITY” must be adjusted before “S-METER.” Otherwise, “S-METER” will not be
adjusted properly.
1• Channel : CH 8
• Connect the SSG to the antenna connec-
tor and set as;
Frequency : 400.00 MHz (Low)‡
: 450.00 MHz (High)‡
Level : +20 dBµ†(–87 dBm)
Modulation : 1 kHz
Deviation : ±3.5 kHz
• Receiving
SP jack Connect the SINAD meter
with an 4 Ωload to the SP
jack.
Minimum distortion
level
CONVENIENT:
The “RECEIVE SENSITIVITY” can be adjusted automatically.
1: Put the cursor on “BPF C ALL” and push [ENTER] key.
2: The connected PC tunes BPF’s to peak levels automaticaly.
S-METER
(S3 level)
[RSSI S3 level]
1• Channel : CH 8
• Connect the SSG to the antenna connec-
tor and set as;
Frequency : 400.00 MHz (Low)‡
: 450.00 MHz (High)‡
Level : +23 dBµ† (–84 dBm)
Modulation : 1 kHz
Deviation : ±3.5 kHz
• Receiving
Push the [ENTER] key on the connected PC’s keyboard to set
“S3” level.
[RSSI S1 level]
(S1 level)
2• Set the SSG as;
Level : –7 dBµ† (–114 dBm)
• Receiving
Push the [ENTER] key again to set “S1” level.
SQUELCH
[SQL]
1 • Channel : CH 3
• Set the Squelch Level “2.”
• Close the squelch by adjusting the value of
[SQL] item on the CS-F5060 ADJ’s screen.
• Connect the SSG to the antenna connec-
tor and set as;
Frequency : 400.00 MHz (Low)‡
: 450.00 MHz (High)‡
Level : –14 dBµ† (–121 dBm)
Modulation : 1 kHz
Deviation : ±3.5 kHz
• Receiving
SP jack Connect an 4 Ω speaker to
the SP jack.
Close the squelch by
increase the value of
[SQL].
Set the [SQL] to the
value that the audio
signals just appears.
†; The output level of the standard signal generator (SSG) is indicated as the SSG’s open circuit.
‡;(Low)=[USA-01], [EXP-01], [EUR-01] (High)=[USA-02], [EXP-02]

7 - 1
SECTION 7 PARTS LIST
M.=Mounted side (T: Mounted on the Top side, B: Mounted on the Bottom side)
[FRONT UNIT]
REF ORDER DESCRIPTION M. H/V
NO. NO.
LOCATION
IC501 1130009121 S.IC S1D15206F00A200 B 33.1/19.5
IC502 1110005771 S.IC S-80942CNMC-G9CT2G B 61.4/9.7
IC503 1140010771 S.IC HD64F3687FPV B 62.1/25.2
IC504 1130007111 S.IC TC7W04FU (TE12L,F) B 73.9/26.3
IC505 1110005310 S.IC AN6123MS B 10/8.4
IC506 1110005350 S.IC NJM2870F05-TE1 B 84.9/9.9
IC507 1130006221 S.IC TC4W53FU (TE12L,F) B 6.5/19
IC508 1130008561 S.IC TC75S51F (TE85L,F) B 74/11.3
Q501 1590001050 S.TR DTC114TUA T106 B 15.1/32.9
Q502 1590001050 S.TR DTC114TUA T106 B 18/32.9
Q503 1590001330 S.TR DTA114EUA T106 B 77/24.7
Q504 1530002851 S.TR 2SC4116-BL (TE85R,F) B 91.5/22.4
Q505 1590001050 S.TR DTC114TUA T106 B 92.5/18.8
Q506 1590000680 S.TR DTC114EUA T106 B 77/27.4
Q507 1590001050 S.TR DTC114TUA T106 B 51.4/30.2
D501 1750000370 S.DIO DA221 TL T 3.5/27.1
D502 1750000370 S.DIO DA221 TL T 3.5/25
D503 1750000370 S.DIO DA221 TL T 3.5/22.9
D504 1790001260 S.DIO MA2S077-(TX) B 50.9/23.1
D505 1790001250 S.DIO MA2S111-(TX) B 3.3/23.3
D506 1790001250 S.DIO MA2S111-(TX) B 82.1/21.7
D507 1790001250 S.DIO MA2S111-(TX) B 79.7/25.8
D508 1790000950 S.ZEN MA8056-M (TX) T 4.8/19.7
D509 1790000950 S.ZEN MA8056-M (TX) T 8.6/19.7
D510 1790000950 S.ZEN MA8056-M (TX) T 10.4/19.7
X501 6050011720 S.XTL CR-764 (19.6608 MHz) B 49.6/18.9
L501 6200003640 S.COL MLF1608E 100K-T B 12/19.1
R501 7030003810 S.RES ERJ3GEYJ 125 V (1.2 M) B 46/28.8
R502 7030003810 S.RES ERJ3GEYJ 125 V (1.2 M) B 46.6/23.8
R503 7310005130 S.TRI RH03ADCS5X (470 k) B 45.5/26.3
R504 7030005120 S.RES ERJ2GEJ 102 X (1 k) B 8/29.3
R505 7030005120 S.RES ERJ2GEJ 102 X (1 k) B 10/29.3
R506 7030005120 S.RES ERJ2GEJ 102 X (1 k) B 12/29.3
R507 7030005010 S.RES ERJ2GEJ 681 X (680) T 14.3/37.2
R508 7030005120 S.RES ERJ2GEJ 102 X (1 k) T 14.3/36.3
R509 7510001730 S.TMR ERTJOEP 473J B 59.9/17.1
R510 7030005120 S.RES ERJ2GEJ 102 X (1 k) B 61.1/17.1
R511 7030005530 S.RES ERJ2GEJ 100 X (10) B 57.1/19.4
R512 7030008010 S.RES ERJ2GEJ 123 X (12 k) B 52/22.7
R513 7030005050 S.RES ERJ2GEJ 103 X (10 k) B 63.8/10.2
R514 7030005160 S.RES ERJ2GEJ 105 X (1 M) B 56.1/20.7
R515 7030008010 S.RES ERJ2GEJ 123 X (12 k) B 52.3/23.9
R516 7030008010 S.RES ERJ2GEJ 123 X (12 k) B 49.5/23.9
R517 7410001140 S.ARY EXB28V104JX B 66.5/10.8
R518 7410001140 S.ARY EXB28V104JX B 67.5/19.2
R519 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 51.5/26.9
R520 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 71.6/26.8
R522 7030005090 S.RES ERJ2GEJ 104 X (100 k) T 3.3/17.2
R523 7030004980 S.RES ERJ2GEJ 101 X (100) B 13.2/10.9
R524 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 71.6/28.4
R525 7030005240 S.RES ERJ2GEJ 473 X (47 k) B 80.2/27
R526 7030007300 S.RES ERJ2GEJ 332 X (3.3 k) B 79/24.4
R528 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 71.7/24.1
R529 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 82.1/19.6
R530 7030005160 S.RES ERJ2GEJ 105 X (1 M) B 5.4/10
R531 7030009280 S.RES ERJ2GEJ 391 X B 92/20.6
R532 7030005120 S.RES ERJ2GEJ 102 X (1 k) B 91.4/24.2
R533 7030007290 S.RES ERJ2GEJ 222 X (2.2 k) B 91.4/25.2
R534 7030009140 S.RES ERJ2GEJ 272 X (2.7 k) B 90.6/20.2
R535 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 82.4/31.4
R536 7030005220 S.RES ERJ2GEJ 223 X (22 k) B 77.8/22.9
R537 7030005090 S.RES ERJ2GEJ 104 X (100 k) T 7.2/19.2
R538 7030005090 S.RES ERJ2GEJ 104 X (100 k) T 6.2/19.2
R539 7030010040 S.RES ERJ2GEJ-JPW B 76/15.9
R540 7030009290 S.RES ERJ2GEJ 562 X (5.6 k) B 4.3/10.9
R541 7030007290 S.RES ERJ2GEJ 222 X (2.2 k) B 3.3/16.6
R542 7030009160 S.RES ERJ2GEJ 181 X (180) B 89.8/24.2
R543 7030009160 S.RES ERJ2GEJ 181 X (180) B 89.8/25.2
R545 7030005240 S.RES ERJ2GEJ 473 X (47 k) T 11.8/19.2
R546 7210003050 VAR EVU-F2KFK3 B14 (10KB)
R547 7030005120 S.RES ERJ2GEJ 102 X (1 k) T 11.8/17.2
R548 7030005120 S.RES ERJ2GEJ 102 X (1 k) T 6.8/17.2
R549 7030005120 S.RES ERJ2GEJ 102 X (1 k) T 9.3/17.2
R550 7030005240 S.RES ERJ2GEJ 473 X (47 k) B 10.9/19.4
R551 7030007300 S.RES ERJ2GEJ 332 X (3.3 k) B 11/5.8
R552 7030009280 S.RES ERJ2GEJ 391 X B 10.1/5.8
R553 7030007290 S.RES ERJ2GEJ 222 X (2.2 k) B 75.2/8.7
R554 7030007290 S.RES ERJ2GEJ 222 X (2.2 k) B 71.4/12.4
R555 7030005220 S.RES ERJ2GEJ 223 X (22 k) B 71.4/11.5
R556 7030005050 S.RES ERJ2GEJ 103 X (10 k) B 73.2/8.7
R557 7030005050 S.RES ERJ2GEJ 103 X (10 k) B 71.8/10.2
R558 7030005060 S.RES ERJ2GEJ 333 X (33 k) B 74/13.5
R559 7030005090 S.RES ERJ2GEJ 104 X (100 k) B 11/20.8
R560 7030005090 S.RES ERJ2GEJ 104 X (100 k) T 6.2/20.8
C501 4030016930 S.CER ECJ0EB1A104K B 41.8/30.2
C502 4030016930 S.CER ECJ0EB1A104K B 40.9/30.2
S.=Surface mount
[FRONT UNIT]
REF ORDER DESCRIPTION M. H/V
NO. NO.
LOCATION
C503 4030016930 S.CER ECJ0EB1A104K B 42.7/30.2
C504 4030016930 S.CER ECJ0EB1A104K B 43.6/30.2
C505 4030016930 S.CER ECJ0EB1A104K B 44.5/30.2
C506 4030017490 S.CER C1608 JB 1A 105K-T B 44.7/23.2
C507 4030017460 S.CER ECJ0EB1E102K B 46.1/22.7
C508 4030017490 S.CER C1608 JB 1A 105K-T B 43.4/23.2
C509 4030017730 S.CER ECJ0EB1E471K B 13.1/33.3
C510 4030017730 S.CER ECJ0EB1E471K B 18.6/30.5
C511 4030016790 S.CER ECJ0EB1C103K B 58.3/17.1
C512 4030016930 S.CER ECJ0EB1A104K B 62/17.1
C513 4030017030 S.CER ECJ0EB1A273K B 59.1/10.2
C514 4030016930 S.CER ECJ0EB1A104K B 58.3/18.3
C515 4030017630 S.CER ECJ0EC1H120J B 57.1/17.8
C516 4030017580 S.CER ECJ0EC1H060C B 48.9/22.7
C517 4030016790 S.CER ECJ0EB1C103K B 52.9/22.7
C518 4030017640 S.CER ECJ0EC1H150J B 49.8/22.7
C519 4030016930 S.CER ECJ0EB1A104K B 53.8/22.7
C520 4030017420 S.CER ECJ0EC1H470J T 12.5/36.3
C521 4030017460 S.CER ECJ0EB1E102K B 78.8/27.5
C522 4550006480 S.TAN TEESVA 1C 475M8R B 87.7/9.8
C523 4550006250 S.TAN TEESVA 1A 106M8R B 12.8/7.6
C524 4550006250 S.TAN TEESVA 1A 106M8R B 7.2/7.6
C525 4030017330 S.CER ECJ0EF1C104Z B 85.7/7.7
C526 4030016790 S.CER ECJ0EB1C103K B 84.1/7.7
C527 4030017420 S.CER ECJ0EC1H470J T 5.9/17.2
C528 4030017460 S.CER ECJ0EB1E102K T 8.4/17.2
C529 4550006250 S.TAN TEESVA 1A 106M8R B 82.1/9.8
C530 4030016930 S.CER ECJ0EB1A104K B 84.1/12.1
C531 4030017460 S.CER ECJ0EB1E102K B 79/22.5
C533 4030017460 S.CER ECJ0EB1E102K B 80/22.5
C534 4030017420 S.CER ECJ0EC1H470J B 76.2/22.9
C535 4030016930 S.CER ECJ0EB1A104K B 5.4/9.1
C536 4030016930 S.CER ECJ0EB1A104K B 3.3/18.2
C537 4030017460 S.CER ECJ0EB1E102K B 14/25
C538 4030017330 S.CER ECJ0EF1C104Z B 6/10.9
C539 4030017420 S.CER ECJ0EC1H470J T 10.9/17.2
C540 4030017460 S.CER ECJ0EB1E102K B 10.9/17.8
C541 4030017420 S.CER ECJ0EC1H470J B 8.5/10.9
C543 4030017420 S.CER ECJ0EC1H470J B 77.6/16.7
C544 4030017420 S.CER ECJ0EC1H470J B 79.8/16.7
C545 4030017420 S.CER ECJ0EC1H470J B 77.6/15.8
C546 4030017420 S.CER ECJ0EC1H470J B 74/15.3
C547 4030017460 S.CER ECJ0EB1E102K B 74/16.2
C548 4030017490 S.CER C1608 JB 1A 105K-T B 9.7/19.3
C549 4030016930 S.CER ECJ0EB1A104K B 3.7/21.2
C550 4030018900 S.CER ECJ0EB0J474K B 70.1/11.9
C551 4030016930 S.CER ECJ0EB1A104K B 70.9/10.2
C552 4030017460 S.CER ECJ0EB1E102K B 75.2/6.9
C553 4030017460 S.CER ECJ0EB1E102K B 71.4/13.3
C554 4030016790 S.CER ECJ0EB1C103K B 74.2/8.7
C555 4030017460 S.CER ECJ0EB1E102K B 74/14.4
C556 4550006480 S.TAN TEESVA 1C 475M8R B 76.9/10.2
J501 6510022021 S.CNR 14FLT-SM2-TB (LF) (SN) B 88/28.5
J502 6510023091 S.CNR 20FLT-SM2-TB (LF) (SN) B 75.5/19.5
J503 6450002210 CNR 3017-8821 <KIN>
DS501 5030003020 LCD L6-0226TVM-3
DS502 5040002670 S.LED CL-165HR/YG T 18.2/35.9
DS503 5040002310 S.LED SML-311YTT86 T 32.8/6.5
DS504 5040002310 S.LED SML-311YTT86 T 46.1/6.3
DS505 5040002310 S.LED SML-311YTT86 T 59.8/6.3
DS506 5040002310 S.LED SML-311YTT86 T 92.3/24.5
DS507 5040002310 S.LED SML-311YTT86 T 73.1/6.5
DS508 5040002310 S.LED SML-311YTT86 T 31.7/26
DS509 5040002310 S.LED SML-311YTT86 T 40.2/26
DS510 5040002310 S.LED SML-311YTT86 T 48.7/26
DS511 5040002310 S.LED SML-311YTT86 T 74.2/26
DS512 5040002310 S.LED SML-311YTT86 T 65.7/26
DS513 5040002310 S.LED SML-311YTT86 T 57.2/26
SP501 2510001400 SP
W501 8900012711 CBL OPC-1297A (P0.5,N20,L62)
W502 7120000470 JMP ERDS2T0
W503 7120000470 JMP ERDS2T0
EP502 8930072220 LCT SRCN-2979-SP-N-W
[Low]=[USA-01], [EXP-01], [EUR-01]
[High]=[USA-02], [EXP-02]