IDE DK85R Series User manual

IDE Solid State Disk
Rev. A.6 Nov. 2008
Turbo II+ 2.5" IDE Solid State Disk
DK85R Series
081124001064

IDE Solid State Disk
Rev. A.6 Nov. 2008
Table of Contents
1. Product Description ..................................................................................................................1
1.1 Product Overview ............................................................................................................................ 1
1.2 Product Features............................................................................................................................. 1
1.3 System Requirement ...................................................................................................................... 1
2. Specification ..............................................................................................................................2
2.1 Physical Specifications ................................................................................................................... 2
2.2 Electronic Specifications ................................................................................................................ 4
2.3 Performance Specifications ........................................................................................................... 5
2.4 Environmental Specifications ........................................................................................................ 6
2.5 Reliability Specifications................................................................................................................. 6
2.6 Compliance Specifications............................................................................................................. 6
3. Function......................................................................................................................................7
3.1 Pin Signal Assignment.................................................................................................................... 7
3.2 Support ATA Commands ................................................................................................................ 8
3.3 Firmware Upgrade ........................................................................................................................ 27
4. Installation................................................................................................................................28
4.1 Installation ...................................................................................................................................... 28
4.2 Partition........................................................................................................................................... 28
4.3 Format............................................................................................................................................. 30
5. Troubleshooting.......................................................................................................................31
5.1 BIOS can not identify 2.5” IDE SSD........................................................................................... 31
5.2 2.5” IDE SSD can not boot the system...................................................................................... 31
6. Ordering Information...............................................................................................................31
7. Contact Information.................................................................................................................32

IDE Solid State Disk
Rev. A.6 Nov. 2008
List of Figures
Figure 1: 2.5˝IDE SSD Overlook Diagram ...............................................................................2
Figure 2: 2.5” IDE SSD Dimensions .........................................................................................3
Figure 3: 2.5˝IDE SSD Block Diagram.....................................................................................4
Figure 4: IDE Connector Pin Assignment .................................................................................7

IDE Solid State Disk
Rev. A.6 Nov. 2008
List of Tables
Table 1: 2.5” IDE SSD Physical Dimension (Type 1) ................................................................3
Table 2: IDE connector pin definitions ......................................................................................7
Table 3: ATA Command Set ......................................................................................................8
Table 4: Diagnostic Codes........................................................................................................9
Table 5: Identify Device Information........................................................................................10
Table 6: Feature Supported ....................................................................................................22
Table 7: Transfer mode values................................................................................................23
Table 8: Advanced power management levels........................................................................23
Table 9: Turbo 2.5” IDE SSD Ordering Information.................................................................31
Copyright Information
Copyright © 2008, CoreSolid Storage Corporation. All rights reserved.
The information and specifications provided in this document should be used for comparative analysis and
reference purposes. The content of this document is subject to change without prior notice.

IDE Solid State Disk
Rev. A.6 1/32 Nov. 2008
1. Product Description
1.1 Product Overview
CoreSolid Storage designs IDE Solid State Disk(SSD) in PQI brand name is the storage device based on NAND flash
memory technology. This product complies ATA standard interface and is suitable for data storage media and code
storage device for embedded system and boot disk. By using 2.5˝IDE SSD, it is possible to operate good performance
for the systems, which have IDE(ATA) Interface.
With small form factor, the applicable appliance can add or install IDE storage device on its Mother Board or Complete
set.
zApplication Fields;
Industrial PC and Thin Client
Game and Telecommunication Machine
Ticketing, Examining, testing machine
Army, Health and Production Equipment and Machine
1.2 Product Features
zSmall form factor with IDE Standard Interface connector
zMemory Capacities: 8GBytes ~ 64GBytes
zHigh performance and reliability
zNoiseless and stable installation to system
zOperating voltage 5.0V operation
zStandard ATA Interface
zOperating as Boot Disk
zData Storage Device to 64GBytes
zCode Storage Device for Embeded Operating System
1.3 System Requirement
- The Host system which is connected to 2.5˝IDE SSD should meet system requirements at minimum;
1.3.1 Power Requirement
zVoltage: DC +5.0V ± 10%
1.3.2 Operating System
zWindows 2000/XP/Vista
zLinux
zDOS
zWinXP Embedded
zWinCE
1.3.3 Interface
zStandard IDE(ATA) Interface

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Rev. A.6 2/32 Nov. 2008
2. Specification
2.1 Physical Specifications
2.1.1 Overlook
The overlook views of 2.5˝IDE SSD are illustrated in Figure 1.
<Front View> <Rear View>
Figure 1: 2.5˝IDE SSD Overlook Diagram

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Rev. A.6 3/32 Nov. 2008
2.1.2 Dimension
The Dimensions of 2.5˝IDE SSD are illustrated in Figure 2 and described in Table 1.
Figure 2: 2.5” IDE SSD Dimensions
Table 1: 2.5” IDE SSD Physical Dimension (Type 1)
Length 100 ± 0.15 mm
Width 69.85 ± 0.25 mm
Thickness 8.45 ± 0.2mm
2.1.3 Weight
zWeight: 126g

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Rev. A.6 4/32 Nov. 2008
2.2 Electronic Specifications
2.2.1 Product Definition
2.5˝IDE SSD is designed to operate and work as Data or Code Storage device by NAND Flash Memory and its
Controller through Standard ATA Interface to Host Systems.
DASP , PDIAG
FLASH
Controller
DATA
BUFFER
DATA
FLASH
ARRAY
Regulator
DMARQ
DMACK
Master/Slave
External Option
IORDY
INTRQ
DIOR
DIOW
DA0 to DA2
RESET
CS0, CS1
DD0 to DD15
Hvcc
Vcc
Interface
ATA(IDE) Flash memory bus
X`tal
Control signal
Figure 3: 2.5˝IDE SSD Block Diagram
2.2.2 Operating Voltage
zVoltage DC +5.0V ± 10%
2.2.3 Capacity and Block Size information
zCapacity: 8GBytes ~ 64GBytes
zSector Size: 512Bytes

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Rev. A.6 5/32 Nov. 2008
2.2.4 Power Consumption
zDC Information
Voltage Testing Item Read Sector Current Write Sector Current Stand-By Current
Maximize/Peak Current 97.2mA 100.4mA 70.7mA
Normal Current 97mA 99.7mA 70.5mA
5V
Watts 486mW 502mW 353.5mW
※ Testing Platform;
- Mother-Board: GA-K8U-939, CPU: k8 2.0G, System Memory: DDR 256MB,
- Operating System: DOS 6.22, Test Program: RWALL10 & DOMSV31
- Test sample : IDE 2.5” SSD 64GB
2.3 Performance Specifications
2.3.1 Modes
zPIO mode 6
zMW DMA 4
zUltra DMA 5
2.3.2 Access Time
z2.5˝IDE SSD’s maximum access time is about 0.25msec.
※ Testing Platform
- Testing S/W: QBench, Testing OS: DOS, Data: 1sector (512Bytes)
- Testing base: Time required Between Host to Device
2.3.3 Seek Time
z2.5˝IDE SSD has no seek time by being based on Flash Memory technology.
2.3.4 Mount Time
The Mount Time for initializing and mounting 2.5˝IDE SSD is different by depending on Operating System and testing
Platform.
2.3.5 Data Transfer Time
zSequential Read: Up to 61 MB/sec
zSequential Write: Up to 33 MB/sec
※ Test Platform: GIGA 8I945GME Intel:945+ICH7 3.0GHz DDR:400
- Testing Software: HD Bench 3.4 Testing OS: Windows XP
Notice: The value is various bases on the testing platform.
2.3.6 Data Retention
z10years without requiring power support
Notice: The Value of Data Retention is various bases on the type and manufacturer of Flash Memory
2.3.7 Wear-leveling
zDynamic Wear-Leveling for same level of Write/Erase Cycle
2.3.8 Bad Block Management
zThe Bad Blocks of Flash Memory will be replaced into new ones by controller.
2.3.9 Read/Write Cycle
zRead/ Write 2,000,000 times

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Rev. A.6 6/32 Nov. 2008
2.4 Environmental Specifications
2.4.1 Temperature
zOperating Temperature: 0ºC to +70ºC
zNon-Operating Temperature: -40ºC to +85ºC
2.4.2 Humidity
zOperating Humidity: 10% to 95%
zNon-Operating Humidity: 10% to 95% (with no condensation relative humidity)
2.4.3 Vibration
zRandom Vibration (Non-Operation): 10~2000 Hz @ 6Grms
zRandom Vibration (Operating): 10~500 Hz@ 3 Grms
2.4.4 Altitude
z30,000ft
2.5 Reliability Specifications
2.5.1 ECC/EDC (Error Correction Code/Error Detection Code)
z1bytes data by 128bytes will be corrected.
2.5.2 Read and Write/Erase Cycle
zRead: No Limitation
zWrite/Erase: 2,000,000 times
Notice: The Value of Write/Erase Cycle is various bases on the type and manufacturer of Flash Memory.
2.5.3 MTBF (Mean Time Between Failure)
z2,000,000 hours
2.6 Compliance Specifications
zCE
zFCC
Notice: Please contact your closest CSS or PQI’s office for other certificate information.

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Rev. A.6 7/32 Nov. 2008
3. Function
3.1 Pin Signal Assignment
zThe signals assigned for ATA applications are described in Table 2
Table 2: IDE connector pin definitions
Signal name Connector
contact Conductor Connector contact Signal name
RESET- 1 1 2 2 Ground
DD7 3 3 4 4 DD8
DD6 5 5 6 6 DD9
DD5 7 7 8 8 DD10
DD4 9 9 10 10 DD11
DD3 11 11 12 12 DD12
DD2 13 13 14 14 DD13
DD1 15 15 16 16 DD14
DD0 17 17 18 18 DD15
Ground 19 19 20 20 (keypin) or Vcc
DMARQ 21 21 22 22 Ground
DIOW- 23 23 24 24 Ground
DIOR- 25 25 26 26 Ground
IORDY 27 27 28 28 CSEL
DMACK- 29 29 30 30 Ground
INTRQ 31 31 32 32 reserved
DA1 33 33 34 34 PDIAG-
DA0 35 35 36 36 DA2
CS0- 37 37 38 38 CS1-
DASP- 39 39 40 40 Ground
+5 V (logic)
(see notice)
41 41 42 42 +5 V (Motor)
(see notice)
Ground(return)
(see notice)
43 43 44 44 TYPE- (0=ATA)
(see notice)
NOTE – Pins which are additional to those of the 44-pin cable.
Figure 4: IDE Connector Pin Assignment
Notice:
1. All pins are in a single row, with a 1.27 mm (0.050”) pitch.
2. The comments on the mating sequence apply to the case of backplane blind mate connector only. In this case, the mating sequences are:
- The pre-charge power pints and the other ground pins.
- The signal pins and the rest of the power pins.

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Rev. A.6 8/32 Nov. 2008
3.2 Support ATA Commands
zATA Command Set
- ATA Command Set summarizes the ATA command set with the paragraphs that follow describing the individual
commands and the task file for each.
Table 3: ATA Command Set
ATA
Command
Set Class
COMMAND Code FR SC SN CY DH LBA
1 Check Power Mode E5h or 98h - - - - D -
1 Execute Drive Diagnostic 90h - - - - D -
1 Identify Device ECh - - - - D -
1 Idle E3h or 97h - Y - - D -
1 Idle Immediate E1h or 95h - - - - D -
1 Initialize Drive Parameters 91h - Y - - Y -
1 Read DMA C8h - Y Y Y Y Y
1 Read Multiple C4h - Y Y Y Y Y
1 Read Sector(s) 20h or 21h - Y Y Y Y Y
1 Read Verify Sector(s) 40h or 41h - Y Y Y Y Y
1 Recalibrate 1Xh - - - - D -
1 Seek 7Xh - - Y Y Y Y
1 Set Features EFh Y - - - D -
1 Set Multiple Mode C6h - Y - - D -
1 Set Sleep Mode E6h or 99h - - - - D -
1 Standby E2h or 96h - - - - D -
1 Standby Immediate E0h or 94h - - - - D -
2 Write DMA CAh - Y Y Y Y Y
3 Write Multiple C5h - Y Y Y Y Y
2 Write Sector(s) 30h or 31h - Y Y Y Y Y
Definitions:
FR = Features Register
SC = Sector Count Register 
SN = Sector Number Register 
CY = Cylinder Registers
DH = Card/Drive/Head Register
LBA = Logical Block Address Mode Supported (see command descriptions for use).
Y - The register contains a valid parameter for this command. For the Drive/Head Register Y means both the device
and head parameters are used
D - only the device parameter is valid and not the head parameter; C – The register contains command specific data
(see command descriptions for use).

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Rev. A.6 9/32 Nov. 2008
(1) Check Power Mode - 98h or E5h
Bit -> 76543210
Command (7) 98h or E5h
C/D/H (6) X Drive X
Cyl High (5) X
Cyl Low (4) X
Sec Num (3) X
Sec Cnt (2) X
Feature (1) X
Check Power Mode
This command checks the power mode.
If the device is in, going to, or recovering from the sleep mode, the device sets BSY, sets the Sector Count Register to
00h, clears BSY and generates an interrupt.
If the device is in Idle mode, the device sets BSY, sets the Sector Count Register to FFh, clears BSY and generates an
interrupt.
(2) Execute Drive Diagnostic - 90h
Bit -> 76543210
Command (7) 90h
C/D/H (6) X Drive X
Cyl High (5) X
Cyl Low (4) X
Sec Num (3) X
Sec Cnt (2) X
Feature (1) X
Execute Drive Diagnostic
This command performs the internal diagnostic tests implemented by the device.
When the diagnostic command is issued in a PCMCIA configuration mode, this command runs only on the device that
is addressed by the Drive/Head register. This is because PCMCIA card interface does not allows for direct inter-drive
communication (such as the ATA PDIAG and DASP signals). When the diagnostic command is issued in the True IDE
Mode, the Drive bit is ignored and the diagnostic command is executed by both the Master and the Slave with the
Master responding with status for both devices.
The Diagnostic codes shown in Table 4: Diagnostic Codes are returned in the Error Register at the end of the
command.
Table 4: Diagnostic Codes
Code Error Type
01h No Error Detected
02h Formatter Device Error
03h Sector Buffer Error
04h ECC Circuitry Error
05h Controlling Microprocessor Error
8Xh Slave Error in True IDE Mode

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Rev. A.6 10/32 Nov. 2008
(3) Identify Device – ECh
Bit -> 76543210
Command (7) ECh
C/D/H (6) X X X Drive X
Cyl High (5) X
Cyl Low (4) X
Sec Num (3) X
Sec Cnt (2) X
Feature (1) X
Identify Device
The Identify Device command enables the host to receive parameter information from the device. This command has
the same protocol as the Read Sector(s) command. The parameter words in the buffer have the arrangement and
meanings defined in Table 5. All reserved bits or words are zero. Hosts should not depend on Obsolete words in
Identify Device containing 0. Table 5 specifies each field in the data returned by the Identify Device Command. In
Table 5, X indicates a numeric nibble value specific to the card and aaaa indicates an ASCII string specific to the
particular drive.
Table 5: Identify Device Information
Word Address Default
Value
Total
Bytes
Data Field Type Information
0 848Ah 2 General configuration - signature for the device
0XXX 2 General configuration – Bit Significant with ATA-3 definitions.
1 XXXXh 2 Default number of cylinders
2 0000h 2 Reserved
3 00XXh 2 Default number of heads
4 0000h 2 Obsolete
5 0000h 2 Obsolete
6 XXXXh 2 Default number of sectors per track
7-8 XXXXh 4 Number of sectors per card (Word 7 = MSW, Word 8 = LSW)
9 XXXXh 2 Obsolete
10-19 aaaa 20 Serial number in ASCII (Right Justified)
20 0000h 2 Obsolete
21 0000h 2 Obsolete
22 0004h 2 Number of ECC bytes passed on Read/Write Long Commands
23-26 aaaa 8 Firmware revision in ASCII. Big Endian Byte Order in Word
27-46 aaaa 40 Model number in ASCII (Left Justified) Big Endian Byte Order in Word
47 XXXXh 2 Maximum number of sectors on Read/Write Multiple command
48 0000h 2 Reserved
49 XX00h 2 Capabilities
50 0000h 2 Reserved
51 0X00h 2 PIO data transfer cycle timing mode
52 0000h 2 Obsolete
53 000Xh 2 Field Validity
54 XXXXh 2 Current numbers of cylinders

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Rev. A.6 11/32 Nov. 2008
Word Address Default
Value
Total
Bytes
Data Field Type Information
55 XXXXh 2 Current numbers of heads
56 XXXXh 2 Current sectors per track
57-58 XXXXh 4 Current capacity in sectors (LBAs)(Word 57 = LSW, Word 58 = MSW)
59 01XXh 2 Multiple sector setting
60-61 XXXXh 4 Total number of sectors addressable in LBA Mode
62 0000h 2 Reserved
63 0X0Xh 2 Multiword DMA transfer. In PCMCIA mode this value shall be 0h
64 00XXh 2 Advanced PIO modes supported
65 XXXXh 2 Minimum Multiword DMA transfer cycle time per word. In PCMCIA mode this value
shall be 0h
66 XXXXh 2 Recommended Multiword DMA transfer cycle time. In PCMCIA mode this value
shall be 0h
67 XXXXh 2 Minimum PIO transfer cycle time without flow control
68 XXXXh 2 Minimum PIO transfer cycle time with IORDY flow control
69-79 0000h 20 Reserved
80-81 0000h 4 Reserved – CF cards do not return an ATA version
82-84 XXXXh 6 Features/command sets supported
85-87 XXXXh 6 Features/command sets enabled
88 XXXXh 2 Ultra DMA Mode Supported and Selected
89 XXXXh 2 Time required for Security erase unit completion
90 XXXXh 2 Time required for Enhanced security erase unit completion
91 XXXXh 2 Current Advanced power management value
92-127 0000h 72 Reserved
128 XXXXh 2 Security status
129-159 0000h 64 Vendor unique bytes
160 XXXXh 2 Power requirement description
161 0000h 2 Reserved for assignment by the CFA
162 0000h 2 Key management schemes supported
163 XXXXh 2
CF Advanced True IDE Timing Mode Capability and Setting
164 XXXXh 2
CF Advanced PCMCIA I/O and Memory Timing Mode Capability
165-175 0000h 22
Reserved for assignment by the CFA
176-255 0000h 140
Reserved
Word 0: General Configuration
This field indicates the general characteristics of the device. When Word 0 of the Identify drive information is
848Ah then the device is a device and complies with the CFA specification and CFA command set. It is
recommended that PCMCIA modes of operation report only the 848Ah value as they are always intended as
removable devices.
Bits 15-0: CF Standard Configuration Value
Word 0 is 848Ah. This is the recommended value of Word 0.
Some operating systems require Bit 6 of Word 0 to be set to 1 (Non-removable device) to use the card as the
root storage device. The Card must be the root storage device when a host completely replaces conventional
disk storage with a device in True IDE mode. To support this requirement and provide capability for any future
removable media Cards, alternate handling of Word 0 is permitted.
Bits 15-0: CF Preferred Alternate Configuration Values 044Ah: This is the alternate value of Word 0 turns on

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Rev. A.6 12/32 Nov. 2008
ATA device and turns off Removable Media and Removable Device while preserving all Retired bits in the
word. 0040h: This is the alternate value of Word 0 turns on ATA device and turns off Removable Media
and Removable Device while zeroing all Retired bits in the word
Bit 15-12: Configuration Flag If bits 15:12 are set to 8h then Word 0 shall be 848Ah. If bits 15:12 are set to 0h
then Bits 11:0 are set using the definitions below and the Card is required to support for the CFA command
set and report that in bit 2 of Word 83. Bit 15:12 values other than 8h and 0h are prohibited.
Bits 11-8: Retired. These bits have retired ATA bit definitions. It is recommended that the value of these bits be
either the preferred value of 0h or the value of 4h that preserves the corresponding bits from the 848Ah CF
signature value.
Bit 7: Removable Media Device If Bit 7 is set to 1, the Card contains media that can be removed during Card
operation. If Bit 7 is set to 0, the Card contains nonremovable media.
Bit 6: Not Removable Controller and/or Device
Alert! This bit will be considered for obsolescence in a future revision of this standard.
If Bit 6 is set to 1, the Card is intended to be nonremovable during operation. If Bit 6 is set
to 0, the Card is intended to be removable during operation.
Bits 5-0: Retired/Reserved
Alert! Bit 2 will be considered for definition in a future revision of this standard and shall be 0 at this
time.
Bits 5-1 have retired ATA bit definitions.
Bit 2 shall be 0.
Bit 0 is reserved and shall be 0.
It is recommended that the value of bits 5-0 be either the preferred value of 00h or the value of
0Ah that preserves the corresponding bits from the 848Ah CF signature value.
Word 1: Default Number of Cylinders
This field contains the number of translated cylinders in the default translation mode. This value will be the
same as the number of cylinders.
Word 3: Default Number of Heads
This field contains the number of translated heads in the default translation mode.
Word 6: Default Number of Sectors per Track
This field contains the number of sectors per track in the default translation mode.
Words 7-8: Number of Sectors per Card
This field contains the number of sectors per device. This double word value is also the first invalid address in
LBA translation mode.
Words 10-19: Serial Number
This field contains the serial number for this device and is right justified and padded with spaces (20h).
Word 22: ECC Count
This field defines the number of ECC bytes used on each sector in the Read and Write Long commands.
This value shall be set to 0004h.
Words 23-26: Firmware Revision
This field contains the revision of the firmware for this product.
Words 27-46: Model Number
This field contains the model number for this product and is left justified and padded with spaces (20h).
Word 47: Read/Write Multiple Sector Count
Bits 15-8 shall be the recommended value of 80h or the permitted value of 00h. Bits 7-0 of this word define
the maximum number of sectors per block that the device supports for Read/Write Multiple commands.
Word 49: Capabilities
Bit 13: Standby Timer
If bit 13 is set to 1 then the Standby timer is supported as defined by the IDLE command
If bit 13 is set to 0 then the Standby timer operation is defined by the vendor.
Bit 11: IORDY Supported

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If bit 11 is set to 1 then this device supports IORDY operation.
If bit 11 is set to 0 then this device may support IORDY operation.
Bit 10: IORDY may be disabled
Bit 10 shall be set to 0, indicating that IORDY may not be disabled.
Bit 9: LBA supported
Bit 9 shall be set to 1, indicating that this device supports LBA mode addressing. Devices shall support
LBA addressing.
Bit 8: DMA Supported
If bit 8 is set to 1 then Read DMA and Write DMA commands are supported.
Bit 8 shall be set to 0. Read/Write DMA commands are not currently permitted on CF cards.
Word 51: PIO Data Transfer Cycle Timing Mode
The PIO transfer timing for each device falls into modes that have unique parametric timing specifications. The
value returned in Bits 15-8 shall be 00h for mode 0, 01h for mode 1, or 02h for mode 2. Values 03h through
FFh are reserved.
Word 53: Translation Parameters Valid
Bit 0 shall be set to 1 indicating that words 54 to 58 are valid and reflect the current number of cylinders, heads
and sectors. If bit 1 of word 53 is set to 1, the values in words 64 through 70 are valid. If this bit is cleared to 0,
the values reported in words 64-70 are not valid. Any device that supports PIO mode 3 or above shall set bit 1
of word 53 to one and support the fields contained in words 64 through 70.
Words 54-56: Current Number of Cylinders, Heads, Sectors/Track
These fields contain the current number of user addressable Cylinders, Heads, and Sectors/Track in the
current translation mode.
Words 57-58: Current Capacity
This field contains the product of the current cylinders times heads times sectors.
Word 59: Multiple Sector Setting
Bits 15-9 are reserved and shall be set to 0.
Bit 8 shall be set to 1 indicating that the Multiple Sector Setting is valid.
Bits 7-0 are the current setting for the number of sectors that shall be transferred per interrupt on Read/Write
Multiple commands.
Words 60-61: Total Sectors Addressable in LBA Mode
This field contains the total number of user addressable sectors for the device in LBA mode only.
Word 63: Multiword DMA transfer
Bits 15 through 8 of word 63 of the Identify Device parameter information is defined as the Multiword DMA
mode selected field. If this field is supported, bit 1 of word 53 shall be set to one. This field is bit significant.
Only one of bits may be set to one in this field by the device to indicate the multiword DMA mode which is
currently selected.
Of these bits, bits 15 through 11 are reserved. Bit 8, if set to one, indicates that Multiword DMA mode 0 has
been selected. Bit 9, if set to one, indicates that Multiword DMA mode 1 has been selected. Bit 10, if set to one,
indicates that Multiword DMA mode 2 has been selected. Selection of Multiword DMA modes 3 and above are
specific to device are reported in word 163 as described in Word 163: CF Advanced True IDE Timing Mode
Capabilities and Settings.
Bits 7 through 0 of word 63 of the Identify Device parameter information is defined as the Multiword DMA data
transfer supported field. If this field is supported, bit 1 of word 53 shall be set to one. This field is bit significant.
Any number of bits may be set to one in this field by the device to indicate the Multiword DMA modes it is
capable of supporting.
Of these bits, bits 7 through 2 are reserved. Bit 0, if set to one, indicates that the device supports Multiword
DMA mode 0. Bit 1, if set to one, indicates that the device supports Multiword DMA modes 1 and 0. Bit 2, if set
to one, indicates that the device supports Multiword DMA modes 2, 1 and 0.
Support for Multiword DMA modes 3 and above are specific to device are reported in word 163 as described in
Word 163: CF Advanced True IDE Timing Mode Capabilities and Settings.
Word 64: Advanced PIO transfer modes supported
Bits 7 through 0 of word 64 of the Identify Device parameter information is defined as the advanced PIO data

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Rev. A.6 14/32 Nov. 2008
transfer supported field. If this field is supported, bit 1 of word 53 shall be set to one. This field is bit significant.
Any number of bits may be set to one in this field by the device to indicate the advanced PIO modes it is
capable of supporting.
Of these bits, bits 7 through 2 are reserved. Bit 0, if set to one, indicates that the device supports PIO mode 3.
Bit 1, if set to one, indicates that the device supports PIO mode 4.
Support for PIO modes 5 and above are specific to device are reported in word 163 as described in Word 163:
CF Advanced True IDE Timing Mode Capabilities and Settings.
Word 65: Minimum Multiword DMA transfer cycle time
Word 65 of the parameter information of the Identify Device command is defined as the minimum Multiword
DMA transfer cycle time. This field defines, in nanoseconds, the minimum cycle time that, if used by the host,
the device guarantees data integrity during the transfer.
If this field is supported, bit 1 of word 53 shall be set to one. The value in word 65 shall not be less than the
minimum cycle time for the fastest DMA mode supported by the device. This field shall be supported by all
device supporting DMA modes 1 and above.
If bit 1 of word 53 is set to one, but this field is not supported, the Card shall return a value of zero in this field.
Word 66: Recommended Multiword DMA transfer cycle time
Word 66 of the parameter information of the Identify Device command is defined as the recommended
Multiword DMA transfer cycle time. This field defines, in nanoseconds, the cycle time that, if used by the host,
may optimize the data transfer from by reducing the probability that the device will need to negate the DMARQ
signal during the transfer of a sector.
If this field is supported, bit 1 of word 53 shall be set to one. The value in word 66 shall not be less than the
value in word 65. This field shall be supported by all device supporting DMA modes 1 and above.
If bit 1 of word 53 is set to one, but this field is not supported, the Card shall return a value of zero in this field.
Word 67: Minimum PIO transfer cycle time without flow control
Word 67 of the parameter information of the Identify Device command is defined as the minimum PIO transfer
without flow control cycle time. This field defines, in nanoseconds, the minimum cycle time that, if used by the
host, the device guarantees data integrity during the transfer without utilization of flow control.
If this field is supported, Bit 1 of word 53 shall be set to one.
Any device that supports PIO mode 3 or above shall support this field, and the value in word 67 shall not be
less than the value reported in word 68.
If bit 1 of word 53 is set to one because a device supports a field in words 64-70 other than this field and the
device does not support this field, the device shall return a value of zero in this field.
Word 68: Minimum PIO transfer cycle time with IORDY
Word 68 of the parameter information of the Identify Device command is defined as the minimum PIO transfer
with IORDY flow control cycle time. This field defines, in nanoseconds, the minimum cycle time that the device
supports while performing data transfers while utilizing IORDY flow control.
If this field is supported, Bit 1 of word 53 shall be set to one.
Any device that supports PIO mode 3 or above shall support this field, and the value in word 68 shall be the
fastest defined PIO mode supported by the device.
If bit 1 of word 53 is set to one because a device supports a field in words 64-70 other than this field and the
device does not support this field, the device shall return a value of zero in this field.
Words 82-84: Features/command sets supported
Words 82, 83, and 84 shall indicate features/command sets supported. The value 0000h or FFFFh was placed
in each of these words by device prior to ATA-3 and shall be interpreted by the host as meaning that
features/command sets supported are not indicated. Bits 1 through 13 of word 83 and bits 0 through 13 of
word 84 are reserved. Bit 14 of word 83 and word 84 shall be set to one and bit 15 of word 83 and word 84
shall be cleared to zero to provide indication that the features/command sets supported words are valid. The
values
in these words should not be depended on by host implementers.
Bit 0 of word 82 shall be set to zero; the SMART feature set is not supported.
If bit 1 of word 82 is set to one, the Security Mode feature set is supported.
Bit 2 of word 82 shall be set to zero; the Removable Media feature set is not supported.

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Bit 3 of word 82 shall be set to one; the Power Management feature set is supported.
Bit 4 of word 82 shall be set to zero; the Packet Command feature set is not supported.
If bit 5 of word 82 is set to one, write cache is supported.
If bit 6 of word 82 is set to one, look-ahead is supported.
Bit 7 of word 82 shall be set to zero; release interrupt is not supported.
Bit 8 of word 82 shall be set to zero; Service interrupt is not supported.
Bit 9 of word 82 shall be set to zero; the Device Reset command is not supported.
Bit 10 of word 82 shall be set to zero; the Host Protected Area feature set is not supported.
Bit 11 of word 82 is obsolete.
Bit 12 of word 82 shall be set to one; the device supports the Write Buffer command.
Bit 13 of word 82 shall be set to one; the device supports the Read Buffer command.
Bit 14 of word 82 shall be set to one; the device supports the NOP command.
Bit 15 of word 82 is obsolete.
Bit 0 of word 83 shall be set to zero; the device does not support the Download Microcode command.
Bit 1 of word 83 shall be set to zero; the device does not support the Read DMA Queued and Write DMA
Queued commands.
Bit 2 of word 83 shall be set to one; the device supports the CFA feature set.
If bit 3 of word 83 is set to one, the device supports the Advanced Power Management feature set.
Bit 4 of word 83 shall be set to zero; the device does not support the Removable Media Status feature set.
Words 85-87: Features/command sets enabled
Words 85, 86, and 87 shall indicate features/command sets enabled. The value 0000h or FFFFh was placed in
each of these words by device prior to ATA-4 and shall be interpreted by the host as meaning that
features/command sets enabled are not indicated. Bits 1 through 15 of word 86 are reserved. Bits 0-13 of word
87 are reserved. Bit 14 of word 87 shall be set to one and bit 15 of word 87 shall be cleared to zero to provide
indication that the features/command sets enabled words are valid. The values in these words should not be
depended on by host implementers.
Bit 0 of word 85 shall be set to zero; the SMART feature set is not enabled.
If bit 1 of word 85 is set to one, the Security Mode feature set has been enabled via the Security
Set Password command.
Bit 2 of word 85 shall be set to zero; the Removable Media feature set is not supported.
Bit 3 of word 85 shall be set to one; the Power Management feature set is supported.
Bit 4 of word 85 shall be set to zero; the Packet Command feature set is not enabled.
If bit 5 of word 85 is set to one, write cache is enabled.
If bit 6 of word 85 is set to one, look-ahead is enabled.
Bit 7 of word 85 shall be set to zero; release interrupt is not enabled.
Bit 8 of word 85 shall be set to zero; Service interrupt is not enabled.
Bit 9 of word 85 shall be set to zero; the Device Reset command is not supported.
Bit 10 of word 85 shall be set to zero; the Host Protected Area feature set is not supported.
Bit 11 of word 85 is obsolete.
Bit 12 of word 85 shall be set to one; the device supports the Write Buffer command.
Bit 13 of word 85 shall be set to one; the device supports the Read Buffer command.
Bit 14 of word 85 shall be set to one; the device supports the NOP command.
Bit 15 of word 85 is obsolete.
Bit 0 of word 86 shall be set to zero; the device does not support the

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Download Microcode command.
Bit 1 of word 86 shall be set to zero; the device does not support the Read DMA Queued and Write DMA Queued
commands.
If bit 2 of word 86 shall be set to one, the device supports the CFA feature set.
If bit 3 of word 86 is set to one, the Advanced Power Management feature set has been enabled via the Set
Features command.
Bit 4 of word 86 shall be set to zero; the device does not support the Removable Media Status feature set.
Word 88: Ultra DMA Modes Supported and Selected
Word 88 identifies the Ultra DMA transfer modes supported by the device and indicates the mode that is
currently selected. Only one DMA mode shall be selected at any given time. If an Ultra DMA mode is
selected, then no Multiword DMA mode shall be selected. If a Multiword DMA mode is selected, then no Ultra
DMA mode shall be selected. Support of this word is mandatory if Ultra DMA is supported.
Bits 15-13: Reserved
Bit 12: 1 = Ultra DMA mode 4 is selected 0 = Ultra DMA mode 4 is not selected
Bit 11: 1 = Ultra DMA mode 3 is selected 0 = Ultra DMA mode 3 is not selected
Bit 10: 1 = Ultra DMA mode 2 is selected 0 = Ultra DMA mode 2 is not selected
Bit 9: 1 = Ultra DMA mode 1 is selected 0 = Ultra DMA mode 1 is not selected
Bit 8: 1 = Ultra DMA mode 0 is selected 0 = Ultra DMA mode 0 is not selected
Bits 7-5: Reserved
Bit 4: 1 = Ultra DMA mode 4 and below are supported. Bits 0-3 shall be set to 1.
Bit 3: 1 = Ultra DMA mode 3 and below are supported, Bits 0-2 shall be set to 1.
Bit 2: 1 = Ultra DMA mode 2 and below are supported. Bits 0-1 shall be set to 1.
Bit 1: 1 = Ultra DMA mode 1 and below are supported. Bit 0 shall be set to 1.
Bit 0: 1 = Ultra DMA mode 0 is supported
Word 89: Time required for Security erase unit completion
Word 89 specifies the time required for the Security Erase Unit command to complete. This command shall
be supported on devices that support security.
Value Time
0 Value not specified
1-254 (Value * 2) minutes
255 >508 minutes
Word 90: Time required for Enhanced security erase unit completion
Word 90 specifies the time required for the Enhanced Security Erase Unit command to complete. This
command shall be supported on devices that support security.
Value Time
0Value not specified
1-254 (Value * 2) minutes
255 >508 minutes
Word 91: Advanced power management level value
Bits 7-0 of word 91 contain the current Advanced Power Management level setting.
Word 128: Security Status
Bit 8: Security Level If set to 1, indicates that security mode is enabled and the security level is maximum. If set
to 0 and security mode is enabled, indicates that the security level is high.
Bit 5: Enhanced security erase unit feature supported If set to 1, indicates that the Enhanced security erase
unit feature set is supported.
Bit 4: Expire If set to 1, indicates that the security count has expired and Security Unlock and Security Erase
Unit are command aborted until a power-on reset or hard reset.
Bit 3: Freeze
If set to 1, indicates that the security is Frozen.
Bit 2: Lock
If set to 1, indicates that the security is locked.