Inova APIX2 ADK User manual
UM_APIX2_ADK_TX (Rev2) Revision 1.2_A1 Inova Semiconductors Confidential Page 1 of 37
User Manual
Order ID: UM_APIX2_ADK_TX
March 2015
Revision 1.2_A1
UM_APIX2_ADK_TX (Rev2)
APIX2 ADK Transmitter Board (Rev2)
1.0 Introduction
The APIX2 ADK Transmitter board provides a variety of data inputs for digital video, audio and control data
processing to demonstrate all main functions of APIX2 INAP375T Transmitter devices. All board functions can
be controlled via a software GUI to an on-board microcontroller. Furthermore all functional pins of the
INAP375T device and board controls are accessible via pin headers
Features:
• Two independent HDMI/ DVI ports for digital video input (24Bit or 18 Bit width color depth)
• HSD or MX49 connector for APIX2 serial port
• USB Interface to software GUI for easy control of all board functions
• HDMI Audio input processing
• Power over APIX support
Figure 1-1: Tx Application Board - Block Diagram
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User Manual
Table of Contents
1.0 Introduction ......................................................................................................................................... 1
2.0 Functional description ........................................................................................................................ 5
2.1 Video path ........................................................................................................................................... 5
2.2 Audio path ........................................................................................................................................... 5
2.3 Control path ........................................................................................................................................ 5
3.0 Hardware description ......................................................................................................................... 7
3.1 Board connectors ................................................................................................................................ 7
3.1.1 Standard connectors and interfaces .............................................................................................. 7
3.1.2 Connectors and interfaces for bench setups ................................................................................. 7
3.1.3 Connectors and interfaces to expansion boards ............................................................................7
3.1.4 Top Side ......................................................................................................................................... 8
3.1.5 Bottom Side ................................................................................................................................... 9
3.1.6 Connector and interface pin description ...................................................................................... 10
3.1.7 DIP Switches and buttons ............................................................................................................ 16
3.1.8 Jumpers ....................................................................................................................................... 18
4.0 Hardware Configurations ................................................................................................................. 19
4.1 Power supply .................................................................................................................................... 19
4.1.1 12V Main Board supply ................................................................................................................ 19
4.1.2 Low noise board supply ............................................................................................................... 19
4.1.3 Power over APIX (PoA) ............................................................................................................... 19
4.2 Reset ................................................................................................................................................. 19
4.3 LED Indicators .................................................................................................................................. 20
5.0 Microcontroller - NXP LPC1768 ....................................................................................................... 21
5.1 Port description ................................................................................................................................. 21
6.0 Extension Boards (optional) ............................................................................................................ 24
6.1 Ethernet Extender Board .................................................................................................................. 24
6.1.1 Description ................................................................................................................................... 24
6.1.2 Board Setup ................................................................................................................................. 26
6.2 I/O Extender board ............................................................................................................................ 28
6.2.1 Description ................................................................................................................................... 28
6.2.2 Connector description .................................................................................................................. 28
6.2.2.1 Top view .................................................................................................................................. 28
6.2.2.2 Bottom view ............................................................................................................................ 29
6.2.3 Board setup .................................................................................................................................. 32
7.0 Troubleshooting ................................................................................................................................ 34
7.1 Possible Issues ................................................................................................................................. 34
7.2 Reset LVDS transmitters .................................................................................................................. 34
8.0 Ordering information ........................................................................................................................ 36
9.0 Revision History ................................................................................................................................ 36
10.0 References ....................................................................................................................................... 36
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User Manual
List of Tables
Table 3-1: ISP UART Interface ................................................................................................................. 10
Table 3-2: Extension board supply ............................................................................................................ 10
Table 3-3: APIX2 I2C, SPI slave and GPIO interface ............................................................................... 10
Table 3-4: Extension board μC interface .................................................................................................. 11
Table 3-5: APIX I2S audio interface .......................................................................................................... 12
Table 3-6: POF interlace to μC UART ...................................................................................................... 12
Table 3-7: Power supply input for board LDOs ......................................................................................... 12
Table 3-8: APIX pixel interface1 to extension board ................................................................................. 13
Table 3-9: APIX pixel interface2 to extension board ................................................................................. 13
Table 3-10: APIX pixel interface3 to extension board ............................................................................... 14
Table 3-11: APIX data interface1 to extension board ............................................................................... 14
Table 3-12: APIX data interface2 to extension board ............................................................................... 15
Table 3-13: APIX data interface2 to extension board ............................................................................... 15
Table 3-14: Power Supply Control ............................................................................................................ 16
Table 3-15: APIX2 Bootstrap .................................................................................................................... 16
Table 3-16: μC software configuration ...................................................................................................... 17
Table 3-17: μC software configuration ...................................................................................................... 17
Table 3-18: Push Buttons .......................................................................................................................... 17
Table 3-19: μC ISP Mode ......................................................................................................................... 18
Table 3-20: APIX2 reset generation .......................................................................................................... 18
Table 3-21: μC ISP Mode ......................................................................................................................... 18
Table 4-1: LED Indicators ......................................................................................................................... 20
Table 5-1: Microcontroller Port Usage ...................................................................................................... 21
Table 6-2: Interconnect between Ethernet and Master board ................................................................... 25
Table 6-3: Interconnection between Master and IO Extender ................................................................... 28
Table 6-4: Pin Header PL1 ........................................................................................................................ 30
Table 6-5: Pin Header PL2 ........................................................................................................................ 30
Table 6-6: Pin Header PL3 ........................................................................................................................ 31
Table 6-7: Pin Header PL4 ........................................................................................................................ 31
Table 6-8: Pin Header PL5 ........................................................................................................................ 32
Table 7-9: Troubleshooting ....................................................................................................................... 34
Table 10: Ordering Information ................................................................................................................. 36
Table 11: Revision History ........................................................................................................................ 36
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List of Figures
Figure 1-1: Tx Application Board - Block Diagram ...................................................................................... 1
Figure 2-1: APIX2 ADK Transmitter video path .......................................................................................... 5
Figure 2-2: APIX2 ADK Transmitter audio path .......................................................................................... 5
Figure 2-3: APIX2 ADK Transmitter control path ........................................................................................ 6
Figure 4-1: 12 V Main Power Plug (RAPC722) ......................................................................................... 19
Figure 6-1: Ethernet board Top View ........................................................................................................ 24
Figure 6-2: Cable connections to the Ethernet board ............................................................................... 26
Figure 6-3: Flex cables with connecting side up ....................................................................................... 26
Figure 6-4: Connect white data cables to main board ............................................................................... 27
Figure 6-5: Complete APIX2_ADK with Ethernet board ............................................................................ 27
Figure 6-6: IO Extender Top view ............................................................................................................. 28
Figure 6-7: Flex cables with connecting side up ....................................................................................... 32
Figure 6-8: Complete APIX2_ADK with Ethernet board ............................................................................ 33
Figure 7-9: Schematic diagram for the connections to PWR DOWN pin on ADK INAP 375T .................. 35
Figure 7-10: Locations of SJ1 and SJ2 jumper connections on the ADK board (bottom view) ................ 35
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2.0 Functional description
2.1 Video path
The APIX2 ADK Transmitter board offers video input from two independent HDMI/DVI sources. Both HDMI/DVI
inputs are converted to parallel RGB data (24 Bit color depth). The parallel RGB signals are converted to 3-lane
(18Bit) or 4-lane (24Bit) LVDS video streams which are fed directly into the INAP375T transmitter device. Al-
ternatively 24Bit RGB data can be fed to the APIX pixel interface (assembly option).
Figure 2-1: APIX2 ADK Transmitter video path
All control functions as well as EDID informations of both HDMI/DVI devices can be controlled via I2C bus from
the on-board microcontroller.
2.2 Audio path
Audio information is taken from the HDMI/DVI streams. Audio data is processed via an ADC and a sample rate
converter to I2S TDM digital audio format and routed via the I2S input interface of the INAP375T device.
Figure 2-2: APIX2 ADK Transmitter audio path
Alternatively (assembly option) the I2S interface of one HDMI/DVI receiver can be directly fed to the APIX I2S
interface to support 7.1 audio formats.
2.3 Control path
All board functions are controlled via on-board microcontroller. The microcontroller is accessible via a software
GUI. For more information please refer to the APICO software user manual.
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Figure 2-3: APIX2 ADK Transmitter control path
The microcontroller offers two independent I2C busses as well as one SPI bus. The I2S busses manage EDID
information and control functions of both HDMI/DVI devices as well as control functions of the audio analog to
digital converter. The SPI bus manages configuration of the INAP375T Transmitter device and the settings of
the audio frame rate converter.
The setting of the bootstrap pins of the INAP375T device (for more information please refer to the data sheet)
can be controlled by an I/O extender which is accessible via I2C-1 (see chapter 2).
The microcontroller‘s connections to the INAP375T device can be tri-stated via dip switch (see chapter 3.3).
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3.0 Hardware description
3.1 Board connectors
3.1.1 Standard connectors and interfaces
• 2 HDMI connectors for video input
• 1 USB2.0 connector for interfacing the boards’s μC to the PC
• 1 RS232 for ISP (In Circuit Programming) of the μC
• Single 9V..18V (Typ. 12V) DC power supply input to generate all board supplies
• APIX Serial High Speed Interface with either Rosenberger HSD or Molex MX49 connector
3.1.2 Connectors and interfaces for bench setups
• Direct power supply input to all LDOs (3.9V and 2.1V) allows to disable all DC/DC switcher (EMI tests)
• UART interface alternatively to USB2.0 with 3.3V supply to hook up a POF module (EMI tests)
• APIX I2S audio interface on pin header
• APIX SPI slave interlace on pin header
• APIX I2C interlace on pin header
• APIX GPIO interlace on pin header
• 2 Stereo audio line in
•μC JTAG interface
•μC MII interlace
3.1.3 Connectors and interfaces to expansion boards
•APIXpixelinterface
• APIX data interface
• 12V, 3.3V and 1.8V power supply
•μC ports
• I2C_0 and I2C_1 bus (from μC)
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3.1.4 Top Side
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3.1.5 Bottom Side
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3.1.6 Connector and interface pin description
JP5 ISP UART Interface
Pin Signal Description
1 RXD1 Receive data for ISP
2 TXD1 Transmit data for ISP
3 GND Signal ground
Table 3-1: ISP UART Interface
SV1 Power supply for extension boards
Pin Signal Description
1,3,5,7,9,
11,13,15,
17,19
GND Signal ground
2,4 12V0 9V - 18V for extension board’s DC/DC converter
14,16 DCDC_3V9 3.9 V Supply for extension board’s 3.3V LDOs
18,20 DCDC_2V1 2.1 V Supply for extension board’s 1.8V LDOs
Table 3-2: Extension board supply
SV2 APIX2 I2C, SPI slave and GPIO interface
Pin Signal Description
2,4,6,8,10
,12,14,16 GND Signal ground
1 AX_I2C_SCL
APIX2 I2C master interface
3 AX_I2C_SD
Table 3-3: APIX2 I2C, SPI slave and GPIO interface
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5 AX_SPIS_CS2#
APIX2 SPI slave and GPIO interface. Monitor only if μC access is
enabled (default). To disable μC access to this signals switch on DIP
switch S4.1
7 AX_SPIS_SCK
9 AX_SPIS_SDI
11 AX_SPIS_SDO
13 AX_GPIO_1
15 AX_GPIO_0
SV3 μC interface for extension boards
Pin Signal Description
1 UC_P1_25
μC ports for extension boards
2 UC_P2_13
3 UC_P1_24
4 UC_P2_12
5 UC_P1_23
6 UC_P0_24
7 UC_P1_22
8 UC_P0_23
9 UC_P1_21
10 UC_P0_22
11 DIGITAL_RESET_N Digital signal reset
12 GND Signal ground
13 I2C_0_SCL
I2C bus 0
15 I2C_0_SDA
14 I2C_1_SCL
I2C bus 1
16 I2C_1_SDA
Table 3-4: Extension board μC interface
SV2 APIX2 I2C, SPI slave and GPIO interface
Pin Signal Description
Table 3-3: APIX2 I2C, SPI slave and GPIO interface
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SV4 APIX I2S audio interface
Pin Signal Description
2,4,6,8 GND Signal ground
1 AX_I2S_FRCK
APIX2 digital audio interface. Monitor only! To asses APIX2 audio
interface through this port remove resistors R233 - R240.
3 AX_I2S_BCK
5AX_I2S_DATA
7AX_MCLK
Table 3-5: APIX I2S audio interface
SV5 POF interlace to μC UART
Pin Signal Description
1 UC_UART_RX
UART interface
2 UC_UART_TX
3 GND Signal ground
4 DIG_VCC33 3.3V Supply for POF module
Table 3-6: POF interlace to μC UART
X1 Power supply input for board LDOs
Pin Signal Description
1 DCDC_2V1 2.1 V Supply input (optional, if 12V DC/DC is disabled)
2 DCDC_3V9 3.9 V Supply input (optional, if 12V DC/DC is disabled)
3 GND Signal ground
4 GND Signal ground
Table 3-7: Power supply input for board LDOs
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X2 APIX pixel interface to extension board
Pin Signal Description
1,2,5,6,11,16 GND Signal ground
3 AX_PX20
APIX2 Pixel interface
4 AX_PX19
7 AX_PX18
8 AX_PX17
9 AX_PX16
10 AX_PX15
12 AX_PX4
13 AX_PX3
14 AX_PX2
15 AX_PX1
Table 3-8: APIX pixel interface1 to extension board
X3 APIX pixel interface to extension board
Pin Signal Description
1,4,7,13,16 GND Signal ground
2 AX_PX6
APIX2 Pixel interface
3 AX_PX5
5 AX_PX11
6 AX_PX12
8 AX_PX9
9 AX_PX10
11 AX_PX13
12 AX_PX14
14 AX_PX7
15 AX_PX8
Table 3-9: APIX pixel interface2 to extension board
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X4 APIX pixel interface to extension board
Pin Signal Description
1,4,7,13,16 GND Signal ground
2 AX_PX21
APIX2 Pixel interface
3 AX_PX22
5 AX_PX28
6 AX_PX27
8 AX_PX26
9 AX_PX25
11 AX_PX30
12 AX_PX29
14 AX_PX24
15 AX_PX23
Table 3-10: APIX pixel interface3 to extension board
X5 APIX data interface to extension board
Pin Signal
1,7,10,16 GND
2 AX_SPIS_CS2
3 AX_SPISS_RW__MII_TXD2
4 AX_SPIS_MB0__MII_RXD2__SBUP_D0
5 AX_SPIS_MB1__MII_RXDV__SBUP_D1
6 AX_MII_TXD3
8 AX_I2C_SD
9 AX_I2C_SCL
11-14 NC
15 AX_STATUS
Table 3-11: APIX data interface1 to extension board
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X6 APIX data interface to extension board
Pin Signal
1,6,11,16 GND
2 AX_SPIM_SDO__MII_CLK
3 AX_SPIM_SDI__MII_TXEN
4 AX_SPIM_SCK__MII_RXD1
5 AX_SPIM_CS0#__MII_RXD0
7 AX_SPIM_CS1#__MII_RXD3
8 AX_SPIM_CS2#
9 AX_SPIS_SDO
10 AX_SPIS_SDI
12 AX_SPIS_SCK
13 AX_SPIS_STALL__MII_COL
14 AX_SPIS_CS0#__MII_TXD0__SBDW_D0
14 AX_SPIS_CS1#__MII_TXD1__SBDW_D1
Table 3-12: APIX data interface2 to extension board
X10 Stereo audio line in
Pin Signal
1 AD_ADC_RN_2
2 AD_ADC_RP_2
3 AD_ADC_LN_2
4 AD_ADC_LP_2
5 AD_ADC_RN_1
6 AD_ADC_RP_1
7 AD_ADC_LN_1
8 AD_ADC_LP_1
Table 3-13: APIX data interface2 to extension board
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3.1.7 DIP Switches and buttons
* see user manual of APIX2 Tx for bootstrapping details of APIX2.
13 AX_SPIS_STALL__MII_COL
14 AX_SPIS_CS0#__MII_TXD0__SBDW_D0
14 AX_SPIS_CS1#__MII_TXD1__SBDW_D1
S1 Power Supply Control
Switch Status Description
1 ON Shutdown 3.9V supply from DC/DC
2 ON Shutdown 2.1V supply from DC/DC
3 ON Shutdown power over APIX supply
4 ON Enable power sequencing on DC/DC converter 2.1V before 3.9V
Table 3-14: Power Supply Control
S2 APIX2 Bootstrap
Switch Status Signal Bootstrap
1 ON=1, OFF=0 SPIS_MB0__MII_RXD2__SBUP_D0 Bst1
2 ON=1, OFF=0 SPIM_SCK__MII_RXD1 Bst2
3 ON=1, OFF=0 SPIS_SDO Bst3
4 ON=1, OFF=0 SPIS_STALL__MII_COL Bst4
5 ON=1, OFF=0 SPIM_SDO__MII_CLK Bst5
6 ON=1, OFF=0 SPIS_MB1__MII_RXDV__SBUP_D1 Bst6
7 ON=1, OFF=0 not used
8 ON Tx / Rx Select for μC (ON = Tx; OFF = Rx)
Table 3-15: APIX2 Bootstrap
X10 Stereo audio line in
Pin Signal
Table 3-13: APIX data interface2 to extension board
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S4 μC dip switch for software configuration
Switch Signal Description
1 UC_DIP_0 ON = Tri-State μC ports connected to APIX SPI slave and GPIOs
OFF = APIX SPI slave and GPIOs driven from μC (default)
2 UC_DIP_1 ON=1, OFF=0
3 UC_DIP_2 ON=1, OFF=0
4 UC_DIP_3 ON=1, OFF=0
Table 3-16: μC software configuration
S6 μC EEPROM Configuration
Switch Status Signal
1 ON=1, OFF=0 EEPROM Address - AD0
2 ON=1, OFF=0 EEPROM Address - AD1
3 ON=1, OFF=0 EEPROM Address - AD2
4 ON=1, OFF=0 EEPROM Write Protect
Table 3-17: μC software configuration
Push Buttons
Button Status Description
S3 ON μC and Board Hardware Reset
S5 ON=1, OFF=0 Software Trigger
Table 3-18: Push Buttons
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3.1.8 Jumpers
JP4 Set μC ISP mode
Pins Status Description
1 - 2 closed Set ISP mode after hardware reset
1 - 2 open Disable ISP mode after hardware reset (default)
Table 3-19: μC ISP Mode
JP8 APIX2 Reset generation
Pins Status Description
1 - 2 closed APIX2 reset triggered from μC (default)
2 - 3 closed APIX2 reset active
1,2,3 open APIX2 reset (always) inactive
Table 3-20: APIX2 reset generation
SJ1, SJ2 Power down LVDS1, Power down LVDS2
Pins Status Description
1 - 2 closed Power down LVDS1 or LVDS2 converter
1 - 2 open Disable Power down LVDS1 or LVDS2 converter (default)
Table 3-21: μC ISP Mode
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4.0 Hardware Configurations
4.1 Power supply
4.1.1 12V Main Board supply
Normally the board is powered from a 12V DC voltage source. A DC/DC switcher generates 3.9V and 2.1V as
input to the different LDOs providing 3.3V and 1.8V.
Figure 4-1: 12 V Main Power Plug (RAPC722)
4.1.2 Low noise board supply
To support EMI measurements the DC/DC switchers, mentioned above, can be disabled by the dip switch S1.1
and S1.2. The LDO input voltages can be supplied directly through X1.
4.1.3 Power over APIX (PoA)
The AC-coupling of the serial APIX IOs opens the possibility to transmit power over the APIX serial data lines.
For details and consideration of PoA please see the application note AN202. The TX board provides a dedi-
cated 18V / 2A extreme low noise power supply to demonstrate this feature and allows to remotely power up
the RX application board.
4.2 Reset
After power up the board and especially the μC requires a hardware reset for proper function. The hardware
reset is applied by pressing S3.
After hardware reset on S3 the μC generates a board reset signal (DIGITAL_RESET_N) for all board compo-
nents, excluding APIX2. By placing a 0 ohm resistor on R189 and removing R190 the board reset
(DIGITAL_RESET_N) can be coupled directly to the hardware reset generated from S3. (Bypassing the μC
board reset generation)
Further, after hardware reset on S3 the μC generates a reset signal (APIX_RESET_N) for APIX2, if JP8.1 is
connected with JP8.2. A manual APIX2 hardware reset can be generated when JP8.2 is pulled low, f.e. con-
necting JP8.2 with JP8.3.
ATTENTION: As APIX2 needs to be configured after reset, a manual reset on JP8.2 brings APIX2 in default
mode, according the bootstrap settings. The μC does not handle the configuration of APIX2 in this case. To
avoid any collision on the interface between μC and APIX2, S4.1 is required to be ON! Otherwise the board
can be damaged!
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4.3 LED Indicators
LED LED Indicator
Name Color Description
LED1 red DC/DC switcher voltage 3.9V is on
LED2 red DC/DC switcher voltage 2.1V is on
LED3 red APIX2 reset is active
LED4 red APIX2 status signal is high
LED5 red μC hardware reset is active
LED6 red Board hardware reset is active
LED7 green μC USB LED
LED8 blue μC alive (blink 1 sec)
LED9 red tbd
LED10 yellow tbd
LED11 yellow μC suspend mode is active (All APIX interface signals high impedance)
LED12 yellow USB Tx LED
LED13 red USB Rx LED
Table 4-1: LED Indicators
Table of contents
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