InvenSense ICM-30630 Guide

This document contains information on a pre-production
product. InvenSense Inc. reserves the right to
changespecifications and information herein without
notice.
InvenSense Inc.
1745 Technology Drive, San Jose, CA 95110 U.S.A
[phone]
www.invensense.com
Document Number: AN-000023
Revision: 1.1
Revision Date: 05/07/2015
ICM-30630 System Hardware
Design Guide
Revision 1.1

ICM-30630
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Document Number: AN-000023
Revision: 1.1
TABLE OF CONTENTS
1. INTRODUCTION .................................................................................................................................................................................4
1.1 PURPOSE AND SCOPE..........................................................................................................................................................................4
1.2 PRODUCT OVERVIEW AND APPLICATIONS...............................................................................................................................................4
1.3 ICM-30630 SIMPLIFIED BLOCK DIAGRAM.............................................................................................................................................5
2SENSOR HUB APPLICATION SYSTEMS......................................................................................................................................................6
3HARDWARE DESIGN CONSIDERATIONS ..................................................................................................................................................7
3.1 POWER SUPPLIES..............................................................................................................................................................................7
3.2 PROGRAM/DEBUG INTERFACE AND EXTERNAL RESET ...............................................................................................................................8
3.3 CLOCK GENERATION UNIT AND EXTERNAL CLOCK SOURCE ...........................................................................................................................9
3.4 SERIAL INTERFACE DIGITAL LINE TERMINATIONS......................................................................................................................................11
3.4.1 SLAVE I2CINTERFACE ..........................................................................................................................................................11
3.4.2 SLAVE SPI INTERFACE..........................................................................................................................................................12
3.4.3 MASTER I2CINTERFACE.......................................................................................................................................................12
3.5 GPIO LINES ...................................................................................................................................................................................13
4. PCB DESIGN GUIDELINES...................................................................................................................................................................14
4.1 EXTERNAL CRYSTAL ..........................................................................................................................................................................14
4.2 I2CAND SPI LINES ...........................................................................................................................................................................14
4.3 POWER AND GND ..........................................................................................................................................................................14
4.4 MEMS COMPONENT PLACEMENT ......................................................................................................................................................14
5. REFERENCE DESIGN .........................................................................................................................................................................15
5.1 SCHEMATICS...................................................................................................................................................................................15
5.2 BILL OF MATERIALS...........................................................................................................................................................................16
REVISION HISTORY .................................................................................................................................................................................17
COMPLIANCE DECLARATION DISCLAIMER ........................................................................................................................................................18

ICM-30630
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Document Number: AN-000023
Revision: 1.1
TABLE OF FIGURES
Figure 1. ICM-30630 Block Diagram and Software Architecture Diagram........................................................................................4
Figure 2. ICM-30630 Simplified Block Diagram.................................................................................................................................5
Figure 3. Sensor HUB Solution with ICM-30630 ............................................................................................................................... 6
Figure 4. External Power Supply for VDD1P2....................................................................................................................................7
Figure 5. Internal Power Supply for VDD1P2 .................................................................................................................................... 8
Figure 6. Programming the ICM-30630 Flash Memory through a Total Phase Cheetah System With a Level Shifter .....................8
Figure 7. SWD Programming/Debugging Interface Connection .......................................................................................................9
Figure 8. External Crystal Oscillator Circuit.....................................................................................................................................10
Figure 9. ICM-30630 Operating in Slave I2C Mode.......................................................................................................................... 11
Figure 10. ICM-30630 Operating in Slave SPI Mode ....................................................................................................................... 12
Figure 11. ICM-30630 Master I2C Bus Connection .......................................................................................................................... 12
Figure 12. ICM-30630 Reference Design Schematics (SDK) ............................................................................................................ 15
TABLE OF TABLES
Table 1. I2C Bus Pullup Resistor Value Reference Table ................................................................................................................. 11
Table 2. Reference Design BOM .....................................................................................................................................................16

ICM-30630
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Document Number: AN-000023
Revision: 1.1
1. INTRODUCTION
1.1 PURPOSE AND SCOPE
This application note is intended for system designers who require an overview of hardware design considerations for
the ICM-30630 sensor built-in MCU/DMP.
Topics covered in this app note include how to use the ICM-30630 in smart motion detection devices, such as smart
phones, tablets, wearable activity monitors, and gaming machines, as well as potential design challenges for such
applications, including InvenSense’s system reference design called the ICM-30630 SDK (Software Development Kit).
Please note that this app note does not cover software architecture/development related topics.
1.2 PRODUCT OVERVIEW AND APPLICATIONS
The ICM-30630 is a MotionTracking device that combines a 3-axis gyroscope, 3-axis accelerometer, and tri-core
processors (an ARM Cortex M0 CPU, a DMP3 and a DMP4 Digital Motion Processor™) in a small 3 mm x 3 mm x 1 mm
LGA package. The device supports the following features:
ARM Cortex M0-based open platform optimized for motion applications with dual-DMP-based motion
accelerators
Supports Android L and beyond
Memory (DMP + FIFO): variable size FIFO based on DMP feature set
Runtime Calibration
The ICM-30630 serves as a sensor hub, supporting the collection and processing of data from internal and external
sensors. It can offload data processing from the Application Processor (AP) in a system, helping to save system power
and improve performance. The device includes a primary serial interface (I2C and 4-wire SPI) for communication from
the host processor. There is an auxiliary master I2C interface for external sensor communication.
ICM-30630 devices, with their 6-axis integration, ARM Cortex M0 CPU, DMPs, and run-time calibration firmware, enable
manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete
devices, guaranteeing optimal motion performance for consumers.
Figure 1. ICM-30630 Block Diagram and Software Architecture Diagram
InvenSense
Motion
Algorithms
Framework
Engine
Command Protocol
A G M P …
Developer Code
InvenSense Sensor Framework
Sensor Drivers
RTOS/
Scheduler
+
Power
Mgmt

ICM-30630
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Document Number: AN-000023
Revision: 1.1
1.3 ICM-30630 SIMPLIFIED BLOCK DIAGRAM
Figure 2. ICM-30630 Simplified Block Diagram
SELF TEST
SELF TEST
SELF TEST
SELF TEST
SELF TEST
X ACCEL ADC
Y ACCEL ADC
Z ACCEL ADC
X GYRO ADC
Y GYRO ADC
Z GYRO
TEMP
SENSOR
ADC
ADC
FIFO/
SRAM
FLASH
64 KB
USER &
CONFIG
REGISTERS
SENSOR
REGISTERS
ROM
32KB
INTERRUPT
STATUS
REGISTERS
COUNTERS
& TIMERS
SELF TEST
CHARGE
PUMP
MASTER I2C
SERIAL
INTERFACE


MUX
SERIAL WIRE DATA PORT OSC BIAS & LDOs
SLAVE I2C AND
SPI SERIAL
INTERFACE
GPIO (3X)
DMP4
DMP3
ARM
CORTEX M0
nCS
SDA/SDI
AD0/SDO
SCL/SCLK
AUX_CL
AUX_DA
SIGNAL CONDITIONING
GPIO/INT
SWDIO SWDCLK XTALI XTALO VDD VDD1P2 GND

ICM-30630
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Document Number: AN-000023
Revision: 1.1
2SENSOR HUB APPLICATION SYSTEMS
A sensor hub is a combination of a low-power MCU and embedded software that provides access to multiple sensors for use in
various applications. The hub executes motion sensor fusion, provides sensor drivers, motion algorithms, and provides real-
time information to offload the power hungry application processor (AP). Emerging sensor hubs for smart devices enable
efficient processing.
The ICM-30630 serves as an intelligent sensor hub that allows the data collection and processing of such data from internal and
external sensors. The multi-cores of ICM-30630 are designed to offload computing and processing tasks from the AP, thereby
saving system power and streamlining the overall performance. The device also integrates industry leading InvenSense 6-axis
Accel and Gyro MEMS.
Figure 3. Sensor HUB Solution with ICM-30630
Activities
Gestures
Environment
Sensor Data
Sensor Threshold
MotionTracking
Calibration
Sensor Drivers
Sensor Fusion
Power Mgmt
Master
Digital Serial
Interfaces
Slave
Digital Serial
Interfaces
3-Axis
Gyro
3-Axis
Accel
ICM-30630
AP
eCompass
ALS
Pressure Sensor
Temp. Sensor
Humidity Sensor
Other Sensors

ICM-30630
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Document Number: AN-000023
Revision: 1.1
3HARDWARE DESIGN CONSIDERATIONS
3.1 POWER SUPPLIES
ICM-30630 has four power blocks:
A 1.2 V digital power supply that can be applied externally or provided internally. Do not connect VDD1P2 to an
external source, if the internal power circuit is used.
A VDD core power supply for built-in sensors, MCU and DMPs. The supported voltage level range is 1.71 V to
3.6V.
A VDDIO digital supply to make the ICM-30630 digital interface compatible with the AP, wireless transceiver, and
external sensors I/O levels. VDDIO allows for a range of 1.71 V to 3.6 V to be applied. The VDDIO voltage must be
the same as the host AP, wireless transceiver, and external sensor I/O levels. All ICM-30630 digital I/O signal
voltage levels are referenced to VDDIO.
One of internal LDOs power blocks needs an external decoupling capacitor, applied to REGOUT. Usually a 0.1 µF
capacitor is sufficient for decoupling purposes.
Proper capacitor decoupling can reduce power supply noise, as capacitors act as a supplementing current source during
short transient events. InvenSense recommends using separate 0.1 µF decoupling capacitors for VDD, VDDIO and
REGOUT. If using external 1.2 V supply, a 0.1 µF decoupling capacitor is also needed. All decoupling capacitors must be
placed as close as possible to their respective power and ground pins. Ceramic capacitors with X5R material with a
change in capacitance of ±15% over a -55°C to +85°C temperature range are a good choice, covering the entire
operating temperature range of the ICM-30630 at an acceptable accuracy and at reasonable cost.
Power supply connections are displayed in Figure 4 and Figure 5.
Figure 4. External Power Supply for VDD1P2
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
0.1uF C1
0.1uF C2
0.1uF C3
0.1uF C4
GND
VDDIOVDD1V2

ICM-30630
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Document Number: AN-000023
Revision: 1.1
Figure 5. Internal Power Supply for VDD1P2
3.2 PROGRAM/DEBUG INTERFACE AND EXTERNAL RESET
The RESET signal can be controlled via a host (active low), or can be left pulled high, and the internal POR will provide
the reset. For sensor HUB application, we recommend host control the reset. In addition to the hardware RESET input, a
soft reset can be provided by the host via a serial interface register write.
There are two ways to program the ICM-30630’s internal flash memory:
Via the SPI / I2C host interface: The host AP or a SPI Host Controller tool, such as Total Phase’s Cheetah system,
can be used to program ICM-30630 FLASH. InvenSense will provide Android/Linux supported FLASH
programming execution software.
When using the Cheetah tool to program FLASH, a digital signal level shifter is required for VDDIO, as the digital
supply voltage level is not the same as Cheetah’s I/O level (3.3V). Figure 6 shows the suggested level shifter
circuit incorporated in the ICM-30630 SDK board.
Figure 6. Programming the ICM-30630 Flash Memory through a Total Phase Cheetah System With a Level Shifter
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
0.1uF C1
0.1uF C2
0.1uF C4
GND
VDDIOVDD
RESETL-H
SDI-H
VDDIO
SDO-H
nCS-H
SCLK-HSCLK-H
RESETL-H
VDDIO
SDI
SCLK SDI-H
nCS-H
SDO
nCS
SDO-H
U2 MAX3378EEUD
VL
1
IO-VL1
2
IO-VL2
3
IO-VL3
4
IO-VL4
5
NC
6
GND
7/Tri-State 8
NC 9
IO-VCC4 10
IO-VCC3 11
IO-VCC2 12
IO-VCC1 13
VCC 14
C26 0.1uF
C27 0.1uF
U3 MAX3378EEUD
VL
1
IO-VL1
2
IO-VL2
3
IO-VL3
4
IO-VL4
5
NC
6
GND
7/Tri-State 8
NC 9
IO-VCC4 10
IO-VCC3 11
IO-VCC2 12
IO-VCC1 13
VCC 14
C28
0.1uF
C29
0.1uF
HDR 5X2 2.54mmx2.54mm
CN2
SS2
1
SS3
3
MISO
5
SCLK
7
SS1
9
GND 2
5V 4
5V 6
MOSI 8
GND 10
3V3
GND
GND
5V
GND
Cheetah Host CNN
GND
GND
VDDIO
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
RESETL
GND
VDDIO

ICM-30630
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Document Number: AN-000023
Revision: 1.1
ICM-30630’s FLASH can also be programmed through the SWD interface by utilizing SWDCLK and SWDIO signal
lines. The same serial-wire debug interface also serves as debug interface port.
SWDP0 (pin-6) must be connected to GND in normal operation mode. When in debug/program mode, do not
connect the SWDP0 (pin-6) to GND.
Figure 7. SWD Programming/Debugging Interface Connection
3.3 CLOCK GENERATION UNIT AND EXTERNAL CLOCK SOURCE
The ICM-30630 offers three different clock sources:
1. Built-in high-frequency RC oscillator for the system clock
2. Built-in low-frequency RC oscillator for periodic wake up
3. External 32.768 kHz crystal for accurate time stamping.
An external crystal is connected to XTALI and XTALO (Pins 17 and 18). There is no need to mount crystal load
capacitors on PCB board because they are built in ICM-30630.
4. CMOS external 32.768 KHz clock.
For the ICM-30630, it is recommended to utilize precise external oscillators or crystals/ceramic resonators. The accuracy of
an external oscillator or crystals/ceramic resonator must be 30 ppm or better.
An external digital level clock input from a 32.768 kHz source often found on PMICs and other platform devices can be
connected to XTALI pin. We recommend this methodology as it allows ICM-30630 to be synchronized with other devices
(i.e. the host) who are also using the same reference clock.
VDDIO
VDDIO
GND
SWDIO
RESETL
R30
10K
FTSH-105-01-L-DV-K-A-P
CN7
1
3
5
7
9
2
4
6
8
10
J1
2X1 HEADER
1
2
GND
SWDCLK
SWDCLK
For normal operation, short J1 pin1-2
For programming and debugging, open J1 pin1-2
I2C(M)
SPI/I2C(S)
PWRs
CLOCK
PROGRAMMING
DEBUGGING
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24

ICM-30630
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Document Number: AN-000023
Revision: 1.1
Figure 8. External Crystal Oscillator Circuit
I2C(M)
SPI/I2C(S)
PWRs
CLOCK
PROGRAMMING
DEBUGGING
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
AH-32.768KDZF-T
X1

ICM-30630
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Document Number: AN-000023
Revision: 1.1
3.4 SERIAL INTERFACE DIGITAL LINE TERMINATIONS
The ICM-30630 has one master I2C, one slave I2C (shared with slave SPI) and one slave SPI (shared with slave I2C) serial
interface available for sensor and AP communications. I2C is a two-wire interface comprised of the signals serial data
(SDA) and serial clock (SCL). The lines are open-drain and pullup resistors (e.g. 10kΩ) are required.
3.4.1 Slave I2C interface
The ICM-30630 always operates as a slave device when communicating with the AP (master).
The slave address of the ICM-30630 is 7 bits long with the LSB (X) determining the final address. The LSB bit of
the 7-bit address is determined by the logic level on Pin AD0 (GND or VDDIO). The slave address is 0x6A (Pin AD0
is logic low) and 0x6B (Pin AD0 is logic high).
To use ICM-30630 in slave I2C mode, Pin 22 (nCS) must be set to the same level as VDDIO. Figure 9 shows the
ICM-30630 operating in slave I2C mode with its 7-bit device address set to 0x6A.
The I2C open-drain pullup resister value can be adjusted based on how many slave devices are connected and the
bus speed. The 10K ohm in the below circuit is just for reference. When the bus in fast and fast-plus mode, please
reference the Table 1 for the pullup resisters value.
Fscl = 400KHz
Fscl = 1MHz
Vddio (V)
Rp (min.) KOhm
0.867
0.867
3.0
0.480
0.480
1.8
Rp (max.) KOhm
2.356
1.131
3.0
2.548
1.223
1.8
Table 1. I2C Bus Pullup Resistor Value Reference Table
Figure 9. ICM-30630 Operating in Slave I2C Mode
SCL
SDA
From
Application
Processor
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
R32
10K R33
10K
VDDIOVDDIO
GND
From the AP

ICM-30630
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Document Number: AN-000023
Revision: 1.1
3.4.2 Slave SPI interface
The ICM-30630 always operates as a slave device when communicating with the AP (master). For SPI operation,
all logic levels are referenced to VDDIO.
Figure 10. ICM-30630 Operating in Slave SPI Mode
3.4.3 Master I2C Interface
The ICM-30630 offers one master I2C interface for communications with external sensors. The I2C open-drain
pullup resistor value can be adjusted based on the number of external sensors connected to the bus and the
overall desired/specified interface speed.
The I2C open-drain pullup resister value can be adjusted based on how many slave devices are connected and the
bus speed. The 10K ohm in the below circuit is just for reference. When the bus is in fast and fast-plus mode,
please reference the Table 1 for the pullup resistors value.
Figure 11. ICM-30630 Master I2C Bus Connection
SCLK From
Application
Processor
/CS
MOSI
MISO
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
To External
Sensors
R1
10K R2
10K
VDDIO
SDA
SCL
Compass
SDA
SCL
Pressure
SDA
SCL
Others
...
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
From the AP

ICM-30630
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Document Number: AN-000023
Revision: 1.1
3.5 GPIO LINES
The ICM-30630 supports three bidirectional GPIO lines that can be configured as general purpose I/O, interrupt input, or
interrupt output. All GPIO voltage levels are referenced to VDDIO.
We recommend the following GPIO usage assignment:
a. Use ICM-30630 GPIO0 as output to wakeup host MCU. Connect the GPIO0 to host MCU wake-up interrupt
input.
b. Use ICM-30630 GPIO1 as output for general (non-wakeup) interrupt of host MCU. Connect the GPIO1 to host
MCU interrupt input.
c. ICM-30630 GPIO2 is used as a sensor interrupt input or GPIO.
d. Host wakes up ICM-30630 with an interrupt write via digital serial interface.

ICM-30630
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Document Number: AN-000023
Revision: 1.1
4. PCB DESIGN GUIDELINES
To achieve maximum ICM-30630 performance, the following recommendations should be followed during the board design
process:
4.1 EXTERNAL CRYSTAL
Keep any PCB traces between the crystal and the ICM-30630 (Pins 16 and 17), as short as possible. Although currents
running through the crystal oscillator are very small, any long lines will make it more sensitive to EMI, ESD and crosstalk.
Long lines also add parasitic capacitance and some series resistance to the oscillator, which could impact the start-up
characteristics of the oscillator. It is recommended to shield the crystal traces with ground traces, and keep other fast
switching clock/signal lines as far away from the crystal connections as possible. Placing a ground plane underneath the
crystal will reduce interference from other layers.
4.2 I2C AND SPI LINES
Keeping signal speeds, skews, and rise times in mind for high-speed digital bus, all I2C and SPI data and clock lines should
be length and impedance matched. Keep the bus traces as short as possible to reduce bus capacitance. Avoid routing
high-energy traces near digital bus lines.
4.3 POWER AND GND
Although the ICM-30630 is low-power component, wider power and ground PCB traces are very helpful to reduce
system noise. It is recommended to design power and ground traces for PCBs with a least an 8 mil width in mind. Avoid
split ground and power planes, as they act as antennas and can radiate with detrimental effects on fast bus and/or
sensitive signals.
4.4 MEMS COMPONENT PLACEMENT
The gyroscope and accelerometer inside the ICM-30630 are MEMS-based designs, making the ICM-30630 placement
sensitive to mechanical strength. Placing MEMS sensors in areas where the board flexes puts unnecessary mechanical
stress on the MEMS sensor package, which leads to the possibility of higher offsets and damage to the sensor. For
details on proper sensor placement, please refer to InvenSense’s application notes MEMS Motion Handling and
Assembly Guide, Accelerometer and Gyroscope Design Guidelines and Compass Design Guidelines.

ICM-30630
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Document Number: AN-000023
Revision: 1.1
5. REFERENCE DESIGN
5.1 SCHEMATICS
Figure 12. ICM-30630 Reference Design Schematics (SDK)
R24
10K
VDDIO
INT
Test Pin Header
TotalPhase Cheetah Host CNN
300mA
USB PWR CNN
Local Power Gen.
PWR Selection and Measurement CNN
300mA
nCS
0.1uF C8
NM_0R
R32
NM_0R
R33
AH-32.768KDZF-T
X2
NM_0R
R44
1uF
C20
1K
R26
0.1uF C6
CN5
HDR 5X2, 2.54mmX2.54mm
2
4
6
8
10
1
3
5
7
9
NM_0R
R45
NM_0R
R35
TP9
HEADER 1X1
1
NM_0R
R39
0R
R10
HDR 7X2 2.54mmx2.54mm
CN3
1
3
5
7
9
2
4
6
8
10
12
14 11 13
NM_0R
R38
U7 MAX3378EEUD
VL
1
IO-VL1
2
IO-VL2
3
IO-VL3
4
IO-VL4
5
NC
6
GND
7/Tri-State 8
NC 9
IO-VCC4 10
IO-VCC3 11
IO-VCC2 12
IO-VCC1 13
VCC 14
NM_0R
R47
C19 0.1uF
0R
R5
NM_0R
R37
HDR 7X2 2.54mmx2.54mm
CN14
1
3
5
7
9
2
4
6
8
10
12
14 11 13
RESETL_SWD
NM_0R
R36
NM_0R
R41
C17 0.1uF
0.1uF
C15
C25
0.1uF
0R
R48
NM_0R
R43
CN6
HDR 5X2, 2.54mmX2.54mm
2
4
6
8
10
1
3
5
7
9
U8 MAX3378EEUD
VL
1
IO-VL1
2
IO-VL2
3
IO-VL3
4
IO-VL4
5
NC
6
GND
7/Tri-State 8
NC 9
IO-VCC4 10
IO-VCC3 11
IO-VCC2 12
IO-VCC1 13
VCC 14
HDR 15X2, 2.54mmx2.54mm
CN1 2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
HDR 7X2 2.54mmx2.54mm
CN13
1
3
5
7
9
2
4
6
8
10
12
14 11 13
NM_0R
R34
0R
R49
0R
R8
C24 0.1uF
SIP-3 2.54mm
JP1
1 2 3
CN11
HDR 5X2, 2.54mmX2.54mm
2
4
6
8
10
1
3
5
7
9
SOT235
TLV70218DBVT
U6
Vin
1OUT 5
GND
2
EN
3NC 4
0.1uF C10
1uF
C21
HDR 7X2 2.54mmx2.54mm
CN4
1
3
5
7
9
2
4
6
8
10
12
14 11 13
0.1uF C12 C23 0.1uF
0R
R11
1uF
C16
0.1uF
C22
0R
R6
0.1uF
C18
HDR 5X2, 2.54mmx2.54mm
CN8
SS2
1
SS3
3
MISO
5
SCLK
7
SS1
9
GND 2
5V 4
5V 6
MOSI 8
GND 10
NM_0R
R46
NM_0R
R42
CN12
HDR 5X2, 2.54mmX2.54mm
2
4
6
8
10
1
3
5
7
9
0R
R7
USB mini type-B
CN2
GND 5
ID 4
DP 3
VBUS 1
DM 2
NC3
6
NC4
7NC2 8
NC1 9
D1
LED0402_RED
12
U9
SN74LVC1G11DBVR
A
1
GND 2
B
3Y4
VCC 5
C
6
R31
10K
SOT235
TLV70233DBVR
U5
Vin
1OUT 5
GND
2
EN
3NC 4NM_0R
R40
R19
10K
SIP-3 2.54mm
JP2
1 2 3
3V3
GNDGND
GND
VDD
VIN
GND
VIN
GND
GND
VDDIO
GND GND
VIN
GNDGND
GND
VIN
GND GND
VDD
SW2
PTS645SM43SMTR92 LFS
23 1
4
GND GND
VDD
VDDIO
GND
VDDIO 3V3
GND
GND
VDDIOVIN
GNDGND
GND
1V8
3V3 VDDVDDIO
VDDIO
GND
1V8
GND
1V8VDD
VDD
VDDIO
GND
VDD
GND
VDDIO
GND
0.1uF
C27
GND
SDO
GPIO0
AUX_DA
AUX_CL
GPIO1
nCS
CNN for external Sensor
Daughter Brd
CNN for external Sensor
Daughter Brd
CNN for external Sensor
Daughter Brd
CNN for external Sensor
Daughter Brd
SCLK
SDI
nCS
SCLK
SDI
GPIO1
SDO
GPIO0
AUX_DA
AUX_CL
GND
I2C(M)
SPI/I2C(S)
PWRs
CLOCK
PROGRAMMING
DEBUGGING
U2 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
RESETL_SWD
VDDIO
VDDIO
GND
SWDIO
R30
10K
FTSH-105-01-L-DV-K-A-P
CN7
1
3
5
7
9
2
4
6
8
10
JP3
2X1 HEADER
1
2
GND
For normal operation, short J1 pin1-2
For programming and debugging, open J1 pin1-2
SWDCLK
SWDCLK
nCS
SCLK
SDI
GPIO1GPIO0
AUX_DA
AUX_CL
SDO
GPIO2
AUX_CL0
AUX_DA0
GPIO2
GPIO1
GPIO0
AUX_CL
AUX_DA
SDI
SDO
SCLK
nCS
SDI
GPIO1
RESETL-H
GPIO0-H
SDI-H
GPIO2
SCLK
SDO
GPIO0
AUX_DA
AUX_CL
SCLK
SDI
nCS
REGOUT
GPIO2 RESETL
GPIO0
SDO
GPIO1
RESETL_CT
SDO-H
nCS-H
SCLK-HSCLK-H
VDDIO
GPIO0 GPIO0-H
RESETL-H
VDDIO
RESETL_CT
RESETL
RESETL_SW
SDI-H
nCS-H
SDO
nCS
SDI
SCLK
SDO-H
LED1 LED0402_GRN
12
SW1
PTS645SM43SMTR92 LFS
23 1
4
R310K R410K
VDDIO
510R
R4
VDDIO
0.1uF
C26
GND GND

ICM-30630
Page 16 of 18
Document Number: AN-000023
Revision: 1.1
5.2 BILL OF MATERIALS
Table 2. Reference Design BOM
ITEM
QTY
REFERENCE
PART TYPE /VALUE
MANUFACTURER
MANUFACTURER PART
NUMBER
PCB FOOTPRINT
1
1
CN1
HDR 15X2,
2.54mmx2.54mm
Sullins
PREC015DAAN-RC
J100\30DF-VRA
2
1
CN2
USB mini type-B
On Shore Tech
USB-M26FTR
USB_MINI_B_F
3
4
CN3,CN4,CN13,CN14
HDR 7X2
2.54mmx2.54mm
FCI
67996-114HLF
J100\7X2
4
4
CN5,CN6,CN11,CN12
HDR 5X2,
2.54mmX2.54mm
FCI
67997-210HLF
HEADER2x5
5
1
CN7
FTSH-105-01-L-DV-K-A-P
Samtec
FTSH-105-01-L-DV-K-A-P
FTSH-105-01-L-DV-K-A-P
6
1
CN8
HDR 5X2,
2.54mmx2.54mm
FCI
67997-210HLF
CON2X5-100MIL
7
14
C6,C8,C10,C12,C15,C17,C18,C19,
C22,C23,C24,C25,C26,C27
0.1uF
Yageo
CC0402KRX5R6BB104
C0402
8
3
C16,C20,C21
1uF
TDK
C1005X5R0J105K
C0402
9
1
D1
LED0402_RED
Kingbright Corp
APHHS1005SURCK
LED0402
10
2
JP1,JP2
SIP-3 2.54mm
FCI
68000-103HLF
sip-3p
11
1
JP3
2X1 HEADER
Samtec
TS-102-T-A
sip-2p
12
1
LED1
LED0402_GRN
Kingbright Corp
APHHS1005CGCK
LED0402
13
6
R3,R4,R19,R24,R30,R31
10K
Yageo
RC0402JR-0710KL
R0402
14
1
R4
510R
Vishay
CRCW0402510RFKED
R0402
15
8
R5,R6,R7,R8,R10,R11,R48,R49
0R
Panasonic
ERJ-2GE0R00X
R0402
16
1
R26
1K
Panasonic
ERJ-2RKF1001X
R0402
17
16
R32,R33,R34,R35,R36,R37,R38,
R39,R40,R41,R42,R43,R44,R45,
R46,R47
NM_0R
Panasonic
ERJ-2GE0R00X
R0402
18
2
SW1,SW2
PTS645SM43SMTR92 LFS
C&K
PTS645SM43SMTR92 LFS
PTS645SM43SMTR92 LFS
19
1
TP9
HEADER 1X1
xx
xx
PAD9
20
1
U2
ICM-30630
InvenSense
Garnet+Ivory
24LGA_3X3_REV1BE
21
1
U5
TLV70233DBVR
TI
TLV70233DBVR
SOT235
22
1
U6
TLV70218DBVT
TI
TLV70218DBVT
SOT235
23
2
U7,U8
MAX3378EEUD
Maxim
MAX3378EEUD+
TSSOP14
24
1
U9
SN74LVC1G11DBVR
TI
SN74LVC1G11DBVR
R-PDSO-G6
25
1
X2
AH-32.768KDZF-T
TXC
CORPORATION
AH-32.768KDZF-T
2-SMD-3.2x1.5

ICM-30630
Page 17 of 18
Document Number: AN-000023
Revision: 1.1
REVISION HISTORY
REVISION DATE
REVISION
DESCRIPTION
11/21/2014
1.0
Initial Release
05/07/2015
1.1
Added SWDP0 operation and programming/debugging modes selections.
Removed external crystal load capacitors

ICM-30630
Page 18 of 18
Document Number: AN-000023
Revision: 1.1
COMPLIANCE DECLARATION DISCLAIMER
InvenSense believes the environmental and other compliance information given in this document to be correct but cannot
guarantee accuracy or completeness. Conformity documents substantiating the specifications and component characteristics
are on file. InvenSense subcontracts manufacturing and the information contained herein is based on data received from
vendors and suppliers, which has not been validated by InvenSense.
This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by
InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use.
Specifications are subject to change without notice. InvenSense reserves the right to make changes to this product, including
its circuits and software, in order to improve its design and/or performance, without prior notice. InvenSense makes no
warranties, neither expressed nor implied, regarding the information and specifications contained in this document.
InvenSense assumes no responsibility for any claims or damages arising from information contained in this document, or from
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InvenSense sensors should not be used or sold in the development, storage, production or utilization of any conventional or
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equipment, disaster prevention and crime prevention equipment.
©2015 InvenSense, Inc. All rights reserved. InvenSense, Sensing Everything, MotionTracking, MotionProcessing,
MotionProcessor, MotionFusion, MotionApps, DMP, and the InvenSense logo are trademarks of InvenSense, Inc. Other
company and product names may be trademarks of the respective companies with which they are associated.
©2015 InvenSense, Inc. All rights reserved.