InvenSense ICM-30630 Guide

This document contains information on a pre-production
product. InvenSense Inc. reserves the right to
changespecifications and information herein without
notice.
InvenSense Inc.
1745 Technology Drive, San Jose, CA 95110 U.S.A
[phone]
www.invensense.com
Document Number: AN-000023
Revision: 1.1
Revision Date: 05/07/2015
ICM-30630 System Hardware
Design Guide
Revision 1.1

ICM-30630
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Document Number: AN-000023
Revision: 1.1
TABLE OF CONTENTS
1. INTRODUCTION .................................................................................................................................................................................4
1.1 PURPOSE AND SCOPE..........................................................................................................................................................................4
1.2 PRODUCT OVERVIEW AND APPLICATIONS...............................................................................................................................................4
1.3 ICM-30630 SIMPLIFIED BLOCK DIAGRAM.............................................................................................................................................5
2SENSOR HUB APPLICATION SYSTEMS......................................................................................................................................................6
3HARDWARE DESIGN CONSIDERATIONS ..................................................................................................................................................7
3.1 POWER SUPPLIES..............................................................................................................................................................................7
3.2 PROGRAM/DEBUG INTERFACE AND EXTERNAL RESET ...............................................................................................................................8
3.3 CLOCK GENERATION UNIT AND EXTERNAL CLOCK SOURCE ...........................................................................................................................9
3.4 SERIAL INTERFACE DIGITAL LINE TERMINATIONS......................................................................................................................................11
3.4.1 SLAVE I2CINTERFACE ..........................................................................................................................................................11
3.4.2 SLAVE SPI INTERFACE..........................................................................................................................................................12
3.4.3 MASTER I2CINTERFACE.......................................................................................................................................................12
3.5 GPIO LINES ...................................................................................................................................................................................13
4. PCB DESIGN GUIDELINES...................................................................................................................................................................14
4.1 EXTERNAL CRYSTAL ..........................................................................................................................................................................14
4.2 I2CAND SPI LINES ...........................................................................................................................................................................14
4.3 POWER AND GND ..........................................................................................................................................................................14
4.4 MEMS COMPONENT PLACEMENT ......................................................................................................................................................14
5. REFERENCE DESIGN .........................................................................................................................................................................15
5.1 SCHEMATICS...................................................................................................................................................................................15
5.2 BILL OF MATERIALS...........................................................................................................................................................................16
REVISION HISTORY .................................................................................................................................................................................17
COMPLIANCE DECLARATION DISCLAIMER ........................................................................................................................................................18

ICM-30630
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TABLE OF FIGURES
Figure 1. ICM-30630 Block Diagram and Software Architecture Diagram........................................................................................4
Figure 2. ICM-30630 Simplified Block Diagram.................................................................................................................................5
Figure 3. Sensor HUB Solution with ICM-30630 ............................................................................................................................... 6
Figure 4. External Power Supply for VDD1P2....................................................................................................................................7
Figure 5. Internal Power Supply for VDD1P2 .................................................................................................................................... 8
Figure 6. Programming the ICM-30630 Flash Memory through a Total Phase Cheetah System With a Level Shifter .....................8
Figure 7. SWD Programming/Debugging Interface Connection .......................................................................................................9
Figure 8. External Crystal Oscillator Circuit.....................................................................................................................................10
Figure 9. ICM-30630 Operating in Slave I2C Mode.......................................................................................................................... 11
Figure 10. ICM-30630 Operating in Slave SPI Mode ....................................................................................................................... 12
Figure 11. ICM-30630 Master I2C Bus Connection .......................................................................................................................... 12
Figure 12. ICM-30630 Reference Design Schematics (SDK) ............................................................................................................ 15
TABLE OF TABLES
Table 1. I2C Bus Pullup Resistor Value Reference Table ................................................................................................................. 11
Table 2. Reference Design BOM .....................................................................................................................................................16

ICM-30630
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Revision: 1.1
1. INTRODUCTION
1.1 PURPOSE AND SCOPE
This application note is intended for system designers who require an overview of hardware design considerations for
the ICM-30630 sensor built-in MCU/DMP.
Topics covered in this app note include how to use the ICM-30630 in smart motion detection devices, such as smart
phones, tablets, wearable activity monitors, and gaming machines, as well as potential design challenges for such
applications, including InvenSense’s system reference design called the ICM-30630 SDK (Software Development Kit).
Please note that this app note does not cover software architecture/development related topics.
1.2 PRODUCT OVERVIEW AND APPLICATIONS
The ICM-30630 is a MotionTracking device that combines a 3-axis gyroscope, 3-axis accelerometer, and tri-core
processors (an ARM Cortex M0 CPU, a DMP3 and a DMP4 Digital Motion Processor™) in a small 3 mm x 3 mm x 1 mm
LGA package. The device supports the following features:
ARM Cortex M0-based open platform optimized for motion applications with dual-DMP-based motion
accelerators
Supports Android L and beyond
Memory (DMP + FIFO): variable size FIFO based on DMP feature set
Runtime Calibration
The ICM-30630 serves as a sensor hub, supporting the collection and processing of data from internal and external
sensors. It can offload data processing from the Application Processor (AP) in a system, helping to save system power
and improve performance. The device includes a primary serial interface (I2C and 4-wire SPI) for communication from
the host processor. There is an auxiliary master I2C interface for external sensor communication.
ICM-30630 devices, with their 6-axis integration, ARM Cortex M0 CPU, DMPs, and run-time calibration firmware, enable
manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete
devices, guaranteeing optimal motion performance for consumers.
Figure 1. ICM-30630 Block Diagram and Software Architecture Diagram
InvenSense
Motion
Algorithms
Framework
Engine
Command Protocol
A G M P …
Developer Code
InvenSense Sensor Framework
Sensor Drivers
RTOS/
Scheduler
+
Power
Mgmt

ICM-30630
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1.3 ICM-30630 SIMPLIFIED BLOCK DIAGRAM
Figure 2. ICM-30630 Simplified Block Diagram
SELF TEST
SELF TEST
SELF TEST
SELF TEST
SELF TEST
X ACCEL ADC
Y ACCEL ADC
Z ACCEL ADC
X GYRO ADC
Y GYRO ADC
Z GYRO
TEMP
SENSOR
ADC
ADC
FIFO/
SRAM
FLASH
64 KB
USER &
CONFIG
REGISTERS
SENSOR
REGISTERS
ROM
32KB
INTERRUPT
STATUS
REGISTERS
COUNTERS
& TIMERS
SELF TEST
CHARGE
PUMP
MASTER I2C
SERIAL
INTERFACE


MUX
SERIAL WIRE DATA PORT OSC BIAS & LDOs
SLAVE I2C AND
SPI SERIAL
INTERFACE
GPIO (3X)
DMP4
DMP3
ARM
CORTEX M0
nCS
SDA/SDI
AD0/SDO
SCL/SCLK
AUX_CL
AUX_DA
SIGNAL CONDITIONING
GPIO/INT
SWDIO SWDCLK XTALI XTALO VDD VDD1P2 GND

ICM-30630
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Document Number: AN-000023
Revision: 1.1
2SENSOR HUB APPLICATION SYSTEMS
A sensor hub is a combination of a low-power MCU and embedded software that provides access to multiple sensors for use in
various applications. The hub executes motion sensor fusion, provides sensor drivers, motion algorithms, and provides real-
time information to offload the power hungry application processor (AP). Emerging sensor hubs for smart devices enable
efficient processing.
The ICM-30630 serves as an intelligent sensor hub that allows the data collection and processing of such data from internal and
external sensors. The multi-cores of ICM-30630 are designed to offload computing and processing tasks from the AP, thereby
saving system power and streamlining the overall performance. The device also integrates industry leading InvenSense 6-axis
Accel and Gyro MEMS.
Figure 3. Sensor HUB Solution with ICM-30630
Activities
Gestures
Environment
Sensor Data
Sensor Threshold
MotionTracking
Calibration
Sensor Drivers
Sensor Fusion
Power Mgmt
Master
Digital Serial
Interfaces
Slave
Digital Serial
Interfaces
3-Axis
Gyro
3-Axis
Accel
ICM-30630
AP
eCompass
ALS
Pressure Sensor
Temp. Sensor
Humidity Sensor
Other Sensors

ICM-30630
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Document Number: AN-000023
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3HARDWARE DESIGN CONSIDERATIONS
3.1 POWER SUPPLIES
ICM-30630 has four power blocks:
A 1.2 V digital power supply that can be applied externally or provided internally. Do not connect VDD1P2 to an
external source, if the internal power circuit is used.
A VDD core power supply for built-in sensors, MCU and DMPs. The supported voltage level range is 1.71 V to
3.6V.
A VDDIO digital supply to make the ICM-30630 digital interface compatible with the AP, wireless transceiver, and
external sensors I/O levels. VDDIO allows for a range of 1.71 V to 3.6 V to be applied. The VDDIO voltage must be
the same as the host AP, wireless transceiver, and external sensor I/O levels. All ICM-30630 digital I/O signal
voltage levels are referenced to VDDIO.
One of internal LDOs power blocks needs an external decoupling capacitor, applied to REGOUT. Usually a 0.1 µF
capacitor is sufficient for decoupling purposes.
Proper capacitor decoupling can reduce power supply noise, as capacitors act as a supplementing current source during
short transient events. InvenSense recommends using separate 0.1 µF decoupling capacitors for VDD, VDDIO and
REGOUT. If using external 1.2 V supply, a 0.1 µF decoupling capacitor is also needed. All decoupling capacitors must be
placed as close as possible to their respective power and ground pins. Ceramic capacitors with X5R material with a
change in capacitance of ±15% over a -55°C to +85°C temperature range are a good choice, covering the entire
operating temperature range of the ICM-30630 at an acceptable accuracy and at reasonable cost.
Power supply connections are displayed in Figure 4 and Figure 5.
Figure 4. External Power Supply for VDD1P2
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
0.1uF C1
0.1uF C2
0.1uF C3
0.1uF C4
GND
VDDIOVDD1V2

ICM-30630
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Document Number: AN-000023
Revision: 1.1
Figure 5. Internal Power Supply for VDD1P2
3.2 PROGRAM/DEBUG INTERFACE AND EXTERNAL RESET
The RESET signal can be controlled via a host (active low), or can be left pulled high, and the internal POR will provide
the reset. For sensor HUB application, we recommend host control the reset. In addition to the hardware RESET input, a
soft reset can be provided by the host via a serial interface register write.
There are two ways to program the ICM-30630’s internal flash memory:
Via the SPI / I2C host interface: The host AP or a SPI Host Controller tool, such as Total Phase’s Cheetah system,
can be used to program ICM-30630 FLASH. InvenSense will provide Android/Linux supported FLASH
programming execution software.
When using the Cheetah tool to program FLASH, a digital signal level shifter is required for VDDIO, as the digital
supply voltage level is not the same as Cheetah’s I/O level (3.3V). Figure 6 shows the suggested level shifter
circuit incorporated in the ICM-30630 SDK board.
Figure 6. Programming the ICM-30630 Flash Memory through a Total Phase Cheetah System With a Level Shifter
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
0.1uF C1
0.1uF C2
0.1uF C4
GND
VDDIOVDD
RESETL-H
SDI-H
VDDIO
SDO-H
nCS-H
SCLK-HSCLK-H
RESETL-H
VDDIO
SDI
SCLK SDI-H
nCS-H
SDO
nCS
SDO-H
U2 MAX3378EEUD
VL
1
IO-VL1
2
IO-VL2
3
IO-VL3
4
IO-VL4
5
NC
6
GND
7/Tri-State 8
NC 9
IO-VCC4 10
IO-VCC3 11
IO-VCC2 12
IO-VCC1 13
VCC 14
C26 0.1uF
C27 0.1uF
U3 MAX3378EEUD
VL
1
IO-VL1
2
IO-VL2
3
IO-VL3
4
IO-VL4
5
NC
6
GND
7/Tri-State 8
NC 9
IO-VCC4 10
IO-VCC3 11
IO-VCC2 12
IO-VCC1 13
VCC 14
C28
0.1uF
C29
0.1uF
HDR 5X2 2.54mmx2.54mm
CN2
SS2
1
SS3
3
MISO
5
SCLK
7
SS1
9
GND 2
5V 4
5V 6
MOSI 8
GND 10
3V3
GND
GND
5V
GND
Cheetah Host CNN
GND
GND
VDDIO
I2C(M)
SPI/I2C(S)
GPIOsCLOCK
PROGRAMMING
DEBUGGING
PWRs
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
RESETL
GND
VDDIO

ICM-30630
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Document Number: AN-000023
Revision: 1.1
ICM-30630’s FLASH can also be programmed through the SWD interface by utilizing SWDCLK and SWDIO signal
lines. The same serial-wire debug interface also serves as debug interface port.
SWDP0 (pin-6) must be connected to GND in normal operation mode. When in debug/program mode, do not
connect the SWDP0 (pin-6) to GND.
Figure 7. SWD Programming/Debugging Interface Connection
3.3 CLOCK GENERATION UNIT AND EXTERNAL CLOCK SOURCE
The ICM-30630 offers three different clock sources:
1. Built-in high-frequency RC oscillator for the system clock
2. Built-in low-frequency RC oscillator for periodic wake up
3. External 32.768 kHz crystal for accurate time stamping.
An external crystal is connected to XTALI and XTALO (Pins 17 and 18). There is no need to mount crystal load
capacitors on PCB board because they are built in ICM-30630.
4. CMOS external 32.768 KHz clock.
For the ICM-30630, it is recommended to utilize precise external oscillators or crystals/ceramic resonators. The accuracy of
an external oscillator or crystals/ceramic resonator must be 30 ppm or better.
An external digital level clock input from a 32.768 kHz source often found on PMICs and other platform devices can be
connected to XTALI pin. We recommend this methodology as it allows ICM-30630 to be synchronized with other devices
(i.e. the host) who are also using the same reference clock.
VDDIO
VDDIO
GND
SWDIO
RESETL
R30
10K
FTSH-105-01-L-DV-K-A-P
CN7
1
3
5
7
9
2
4
6
8
10
J1
2X1 HEADER
1
2
GND
SWDCLK
SWDCLK
For normal operation, short J1 pin1-2
For programming and debugging, open J1 pin1-2
I2C(M)
SPI/I2C(S)
PWRs
CLOCK
PROGRAMMING
DEBUGGING
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24

ICM-30630
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Document Number: AN-000023
Revision: 1.1
Figure 8. External Crystal Oscillator Circuit
I2C(M)
SPI/I2C(S)
PWRs
CLOCK
PROGRAMMING
DEBUGGING
U1 ICM-30630
RESETL
1
RESV 2
RESV 3
RESV 4
SWDP1(DATA)
5
SWDP0(CLK)
6
AUX_CL 7
VDDIO
8
SDO/AD0 9
REGOUT
10
FSYNC/GPIO1 11
GPIO2 12
VDD
13
RESV 14
VDD1P2
15
XTALO
16 XTALI
17
GND
18
GPIO0 19
RESV 20
AUX_DA 21
nCS 22
SCL/SCLK 23
SDA/SDI 24
AH-32.768KDZF-T
X1