IPMobileNet F32700N25 User manual

IPSeries
F32700N25 Fixed Radio
Product Owner‟s Manual
Date Released: March 16, 2011
Document #: 516-80618-POM Rev B
Copyright 2011 IPMobileNet, LLC.
1221 East Dyer Road, Suite # 250 Santa Ana CA 92705
Voice: [phone] Fax: [phone]

F32700N25.doc Page ii
The term “IC”: before the radio certification number only signifies that Industry of
Canada technical specifications were met.
Operation is subject to the following two (2) conditions: (1) this devise may not cause
interference, and (2) this device must accept any interference, including interference
that may cause undesired operation of this device.
The following U.S. Patents apply to this product:
5,640,695
6,018,647
6,243,393
Information contained in this document is subject to change without notice.
All rights reserved. Reproductions, adaptations, or translation without prior written
permission is prohibited, except as allowed under copyright laws.

TABLE OF CONTENTS
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SECTION 1: THEORY OF OPERATION.....................................................................3
General Block Diagram....................................................................................3
General Block Diagram Definitions..........................................................3
F32700N25 Fixed Radio Section Descriptions...............................................5
Microcontroller.........................................................................................5
Support Circuitry..........................................................................5
Inputs/Outputs .........................................................................................5
Modem.....................................................................................................6
VLogic and Digital Ground.......................................................................6
Receiver 1 Front-End...............................................................................7
Receiver 1 IF ...........................................................................................7
Transmit Modulation ................................................................................7
Injection Synthesizer................................................................................8
Transmitter/TR Switch .............................................................................8
Power and Analog Ground.......................................................................8
SECTION 2: FACTORY TEST PROCEDURE.............................................................9
Equipment List..................................................................................................9
Programming and Configuring Fixed Radio ................................................10
Adjustment / Alignment Procedures.............................................................11
Receiver Injection ..................................................................................11
Receiver.................................................................................................11
Transmit Data........................................................................................12
Transmit Power Control.........................................................................12
Receive Data.........................................................................................13
Final Test...............................................................................................13
Uplink Hardware Timing Verification......................................................15
Downlink Hardware Timing Verification .................................................17
SECTION 3: FCC LABEL..........................................................................................19
F32700N25 Data Transceiver FCC Label Placement ...................................19
F32700N25 Data Transceiver FCC Label ......................................................19
APPENDIX A: F32700N25 CIRCUIT BOARD DIAGRAMS ......................................20
APPENDIX B: F32700N25 TEST DATA SHEET ......................................................21

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
Section 1: Theory of Operation
Digital Board
Inputs/
outputs Micro- controller Injection synthesizer Receiver
Transmit
modulation Transmitter
Modem
Antenna
TR
Switch
RF Board
Transmit
Processing
Figure 1: Block Diagram
Block Diagram Definitions
For increased data security, the modem supports the Federal Government
developed Digital Encryption Standard (DES) data encryption and decryption
protocols. This capability requires installation of third party, Internet Protocol
(IP) compliant DES encryption and decryption software on the system.
The F32700N25 Fixed Radio is comprised of two (2) circuit boards, the digital board
and the RF board.
The digital circuit board contains the following sections:
Input/Output Circuitry associated with the radio’s DB9 data connector
providing all the RS232 data and handshake functions,
including the necessary level changes.

F32700N25.doc Page 4
RJ45 Ethernet 10 Base T Interface Connector
For further details on the Ethernet Controller, refer to the
Crystal LAN Ethernet Controller Product Bulletin
(CS8900A-EthernetCtrlr.pdf) available on the Product
Documentation CD.
Microcontroller Manages the operation of the radio, the modem, and provides
transmit time-out protection in the event a fault causes the
radio to halt in the transmit mode. Further, uses feedback data
from the base and adjust the frequency to lock to the base
within 0.1 ppm.
Modem Converts serial data into an analog audio waveform for
transmission and analog audio from the receiver to serial data.
Within a single chip it provides forward error detection and
correction, bit interleaving for more robust data
communications, and third generation collision detection and
correction capabilities.
Power Supply The power supply creates the various voltages required by the
digital portion of the fixed radio.
The RF Circuits board contains the following sections:
Transmit Processing Circuitry that amplifies the analog audio signal from the
modem and uses it to modulate the voltage controlled
oscillator (VCO) and 12 MHz reference oscillator in the
injection synthesizer section. Modulating the VCO and
reference oscillator simultaneously results in a higher quality
FM signal.
Injection Synthesizer Provides programmable, ultra stable signals for the radio.
Synthesizer incorporates phase lock loop technology used for
both receiving and transmitting.
Injection In the receive mode, the synthesizer provides a local oscillator
signal of 45 MHz above the selected receive channel
frequency.
Transmitter Consists of an exciter and power amplifier module. The
transmitter covers the various frequency bands in segments.
A different power amplifier module is required for each
segment. The transmitter circuitry includes a T/R switch

F32700N25.doc Page 5

switching the antenna between transmitter and receiver
(TX/RX).
Receiver The receiver is a double-conversion super-heterodyne with a
first intermediate frequency (IF) of 45 MHz and a second IF
frequency of 455 KHz. The receiver consists of band-pass
filters, an RF amplifier, a MMIC mixer, crystal filters, and a
one-chip IF system. The injection synthesizer provides the
first local oscillator signal. Outputs from the receiver include
RSSI and analog audio for the baseband routing circuitry and
modem.
Power Supply Consists of circuitry that derives the various operating voltages
for the RF portion of the fixed radio
F32700N25 Fixed Radio Section Descriptions
The F32700N25 Fixed Radio works in the frequency range of 764-776 MHz RX
and 794-806 TX and requires an antenna connected to the RF port.
This section provides detailed descriptions of each of the sections within the
F32700N25 Fixed Radio. Refer to Appendix A to view the F32700N25 Fixed Radio
Circuit Board Diagram.
Microcontroller
The microcontroller (U30) is a major component of the radio as it manages the
operation of the radio. It also controls the operation of the modem, and provides
transmit time-out protection in the event a fault causes the radio to halt in the transmit
mode. It utilizes a reduced instruction set computer (RISC) architecture which provides
low power operation and a powerful instruction set. Other features include a watchdog
timer, serial universal asynchronous receiver/transmitter (UART), two 8-bit timers, and 2
KB of electrically erasable programmable read only memory (EEPROM) storage.
NOTE: The EEPROM Random Access Memory (RAM) stores the setup data entered
by the technician even if there is a loss of power.
Support circuitry
The support circuitry consists of the following:

F32700N25.doc Page 6
A Supervisor Control Chip (U25) provides power-on reset.
The clock controls microcontroller operation and is generated by crystal Y3 and a
Pierce oscillator circuit (inside the U30-microcontroller).
The latch (U28) decodes low order address bits (A0-A7) from the address/data bits
(AD0-AD7). It is controlled by Address Latch Enable (ALE) output of U30 and the
bits are used by the modem.
A 512Kx8 Static RAM Chip (U31) provides temporary storage of the radio’s
configuration data facilitating the technician with access to make changes.
Control logic is also an important part in the microcontroller section. The RAM chip
select (RAMCS*) and modemchip select (MODEMCS*) command lines are created
by U26A, U27BCD, and U44ABC. These gates decode four (4) high order address
bits (A11-A15). The RAM is addressed by five (5) memory addresses (MA14-MA18)
bits decoded by U26D, U27A, and U24. This logic decodes port address bits (PA14-
PA18) to produce memory address bits (MA14-MA18) for the RAM chip.
Input/Output
Input/output components convert serial and handshake data from the modem section to
RS232 levels, and vice-versa. Chip U22 is an RS232 transmitter and receiver. It
converts data in 5-volt logic form to data in +/-12-volt form, as required by the RS232
standard. A charge pump power supply on the chip converts the +5-volt DC logic power
on pin 26 to the +12-volt and –12-volt levels required. Capacitors C106-C109 generate
these voltages by a charge pump. These values determine the operating voltages.
U42 is a full duplex 10base-T Ethernet controller which includes physical and MAC layer
of the protocol. Transformer T1 is the interface between analog 10 base-T signal from
the RJ45 connector and the Ethernet controller, this analog signal is then converted to
parallel data for driving the FSK modem.
Modem
The single-chip modem circuit converts parallel data to an analog audio waveform for
transmission and analog audio from a receiver to parallel data. In addition to the
modem functions, the chip provides forward error detection and correction (FEC), bit
interleaving and Viterbi Soft Decision Algorithms for more robust data communications.

F32700N25.doc Page 7
The microcontroller section controls the modem operation. Address bus, address/data
bus, and control lines operate the modem chip. The modem circuitry is also run by a
crystal-controlled clock, which consists of crystal Y1 and an internal Pierce oscillator.
The received audio signal is demodulated into digital data appearing on the AD0-AD07
lines when the MODEMCS* and RD* lines are low. The data goes to the
microcontroller section for futher processing, and then to the input/output section for
conversion to RS232 or Ethernet signal levels.
During a transmission, outgoing data appearing on the AD0-AD07 lines is converted
into a 4-level FSK analog signal by the modem chip. This operation takes place when
the MODEMCS* and WR* lines are low. Data from the user’s DTE passes through the
input/output section and microcontroller section to the AD0-AD07 bus. After processing,
data passes through a root raised cosine filter and is output to TXMOD.
This modem supports 115.2 KBPS (serial port) and 32 KBPS (over-the-air) data
transmission rates.
VLogic and Digital Ground
The VLogic and Digital Ground section consists of a pulse-width modulation (PWM)
step-down DC-DC converter (U20) that provides an adjustable output. It also reduces
noise in sensitive communications applications and minimizes drop out voltage.
An external Schottky diode (D2) is required as an output rectifier to pass inductor
current during the second half of each cycle to prevent the slow internal diode of the N-
channel MOSFET from turning on. This diode operates in pulse-frequency modulation
(PFM) mode and during transition periods while the synchronous rectifier is off.
Receiver Front-End
This section contains components that include several RF Band-pass filters, a low-noise
amplifier, and a MMIC mixer.
Incoming signals pass through one (1) pre-selector filter (FLT3) that selectively provides
a high degree of out-of-band signal rejection. A low MMIC amplifier (U4) amplifies the
selected signals and is followed by an image and noise reject filter (FLT6). The output
from FLT6 passes through a gain stage amplifier (U7) then passes through a mixer
(U8). U8 is a MMIC mixer which mixes the receive injection (RXINJ1) signal from the
synthesizer and the RF signal from the antenna to produce a 45 MHz IF signal. This 45
MHz signal passes through crystal filters (FLT3 and FLT4) to the Receiver IF section to
provide the bulk of the Receiver’s selectivity.

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Receiver IF
The major contributor of the IF subsystem (U13) a complete 45 MHz super-heterodyne
receiver chip incorporating a mixer/oscillator, two limiting intermediate frequency
amplifiers, quadrature detector, logarithmic received signal strength indicator (RSSI),
voltage regulator and audio and RSSI op amps.
Incoming 45 MHz signals appearing at RX1_45MHz pass through the low-voltage high
performance monolithic FM IF system. Within U13, the signals pass through a simple
LC filter and are boosted by the RF amplifier. The output of the RF amplifier drives a
mixer. A crystal oscillator is controlled by crystal Y2 and provides the injection
frequency for the mixer. The mixer output passes through a 455 KHz ceramic filter
(FL8). It is then amplified and passed through another ceramic filter (FL7) to a second
gain stage. One of the outputs of U13 is BRSSI1 that is the measure of receive signal
strength.
The audio is amplified by two (2) op amps (U9C and U9B) and delivered to the power
and analog ground circuitry via the RXMOD1 output. High frequency de-emphasis is
provided by a filter consisting of a resistor and a capacitor. In order to match the audio
signal levels with the other circuitry, a gain control is included. A (RV3) is necessary to
adjust gain and pot (RV4) is used to adjust the level.
Transmit Processing
The audio DC level is adjusted through OPAMP (U19), then the signal is delivered to
the transmit modulator. The reference frequency correction data is applied to DAC
(U21). The output B of the DAC then scaled down to fine tune the frequency adjustment
to about 10 ppm over the entire range of the DAC. This DC signal is applied to the OP
amps as a reference voltage.
Transmit Modulation
The analog circuitry in this section modulates the Transmitter. The data-bearing audio
signal from the modem appears at TXMOD. The audio is amplified by op amp (U23D).
The output of U23D drives two (2) amplifiers (U23B and U23C).
The transmitter uses dual-point modulation meaning the modulation is applied both to
the VCO as well as the reference oscillator (VCTXO).
The upper amplifier (U23B) has adjustable gain. The output drives op amp (U23A),
which inverts the phase of the signal. Upon the start of a transmission, the modulating
signal passes through to the VCTXO reference oscillator in the synthesizer. Some
makes of VCTXO oscillators do not require the modulation signal to be inverted and a
jumper block (JMP1) is provided to accommodate the oscillators.

F32700N25.doc Page 9
The lower op amp (U23C) amplifies the signal from the low pass filter and applies it to
the VCO via the VCOMOD output. Pots RV5 and RV5 are used to adjust maximum
deviation.
Injection Synthesizer
The fractional synthesizer chip (U17) is the major contributor of the receiver and
transmitter injection oscillator. This device contains the key components of a phase
locked loop (PLL), including a prescaler, programmable divider, and phase detector.
The selected frequencies are loaded into U17 as a clocked serial bit stream via the
PLL_DATA, PLL_CLOCK, and PLL_ENABLE signals.
Frequency stability is determined by a temperature-compensated crystal oscillator
module (VCTCXO) (TCXO1) at a frequency stability of 1 PPM from –30C to +60C.This
device has an input (REFMOD) that accepts transmit modulation and voltage from the
scaled down output of the DAC (U21). At the factory the frequency adjusted to the
nearest frequency of than 0.05 ppm accuracy and maintains the accuracy when is
locked to the base station through the correction values determined by the base station.
a voltage control oscillator (VCO1) is formed by integrated low-noise oscillators The
VCO’s generate receiver and transmit injection signals. The output of VCO1 is split by
two two-way power dividers (U16, U18) leading to outputs RXINJ1 and RXINJ2. One of
the outputs of a third two-way divider (U18) is returned to the synthesizer RFIN input.
This completes the loop signal path. The other one is the input to the driver amp of the
transmitter.
Transmitter/TR Switch
The transmitter section consists of an amplifier (U10). The output of the driver is applied
to the power amplifier (U11) to boost the power to 5 watts Max. Output A of DAC (U21)
through an Op amp. (U22A) is applied to the gain control of U11 to adjust the output
power. VBATT is applied to the Drain of U11. Harmonic suppression is provided by
C11, L10, C14, C12 and C15. Control signal TRSW is applied to pin diodes CR1, CR2
and CR3 and associated circuits to switch radio between receive and transmit mode.
Power and Analog Ground
These sections consist of the power supplies and transmit control circuitry. Power from
the vehicle’s battery appears at VBATT. Diode D1 protects the voltage regulators by
clamping any transient spikes on the supply line. Such spikes typically occur while the
engine is started. The supply line powers a series of voltage regulators and the
transmitter control circuitry, as follows:
Voltage regulator VR3 provides 8-volt power for most other sections in the radio.