ITS Telecom 1700264 User manual

September 29, 2020
MITS JANUS TIME ENGINE
PART NUMBER 1700264
OPERATION MANUAL

MITS Janus Time Engine
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Copyright© Instrumentation Technology Systems 2020 20200929
TABLE OF CONTENTS
CHANGE HISTORY ................................................................................................................................................... 4
1.0 GENERAL DESCRIPTION ............................................................................................................................ 5
1.1 JANUS TIME ENGINE MASTER CONTROLLER (JTEMC) ................................................................................................. 5
1.1.1 Time Master .................................................................................................................................... 5
1.1.2 IRIG B Inputs .................................................................................................................................. 7
1.1.3 1PPS Inputs ..................................................................................................................................... 7
1.1.4 GPS Time Reference ....................................................................................................................... 8
1.1.5 PTPV2 Master Clock Function ....................................................................................................... 8
1.1.6 Time of Day Clock .......................................................................................................................... 9
1.1.7 Time Zone Offset ............................................................................................................................ 9
1.1.8 Ethernet ........................................................................................................................................... 9
1.1.9 Settings Flash ................................................................................................................................ 10
1.1.10 I/O Interface .................................................................................................................................. 10
1.2 PHOTO-SONICS INTERFACE (PSI/O) ...................................................................................................................... 11
1.2.1 Time code and frequency output ports .......................................................................................... 11
1.3 IRIG B TIME CODE GENERATOR ............................................................................................................................. 12
1.3.1 An IRIG B127 output buffer ......................................................................................................... 12
1.3.2 An IRIG B007 output buffer ......................................................................................................... 12
1.4 PROGRAMMABLE FREQUENCY GENERATORS ............................................................................................................ 12
1.4.1 Clock A ......................................................................................................................................... 12
1.4.2 Clock B ......................................................................................................................................... 12
2.0 NETWORK TIME SYNCRHONIZATION...................................................................................................... 12
2.1 NTP DECODE/CORRECTION ................................................................................................................................. 13
2.2 PTP SYNCHRONIZER ALGORITHM .......................................................................................................................... 13
3.0 WEBSERVER ........................................................................................................................................... 13
3.1 HOME PAGE ...................................................................................................................................................... 14
3.1.1 Time frame .................................................................................................................................... 14
3.2 ADMIN PAGE ..................................................................................................................................................... 15
3.2.1 Session Control frame ................................................................................................................... 15
3.3 CHANGE LOGIN PAGE .......................................................................................................................................... 16
3.4 INPUTS PAGE ..................................................................................................................................................... 16
3.4.1 Priority frame ................................................................................................................................ 16
3.4.2 TCP/IP Frame ............................................................................................................................... 17
3.4.3 Network Time Reference .............................................................................................................. 18
3.4.4 IRIG Reference ............................................................................................................................. 18

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3.4.5 IRIG Delay Compensation ............................................................................................................ 19
3.4.6 1PPS Reference ............................................................................................................................. 19
3.4.7 GPS Reference .............................................................................................................................. 19
3.5 OUTPUTS PAGE .................................................................................................................................................. 20
3.5.1 IRIG Frame ................................................................................................................................... 20
3.5.2 Clocks Frames ............................................................................................................................... 20
3.5.3 Time Frame ................................................................................................................................... 21
3.5.4 Leap Second Adjust ...................................................................................................................... 21
3.6 NETWORK REFERENCE SETTINGS PAGE ................................................................................................................... 22
3.6.1 PTP Frame .................................................................................................................................... 22
3.6.2 Timers Frame ................................................................................................................................ 22
3.7 PTP MASTER/SLAVE MODE BEHAVIOR .................................................................................................................. 23
4.0 ASCII COMMAND SET ............................................................................................................................. 24
5.0 PHYSICAL CHARACTERISTICS .................................................................................................................. 33
5.1 I/O CONNECTORS .............................................................................................................................................. 34
5.1.1 J3 Differential Inputs, PS I/O board .............................................................................................. 34
5.1.2 J4 Differential Outputs, PS I/O board ........................................................................................... 35
5.1.3 J9 Power Connector, PS I/O board ............................................................................................... 35
5.2 SWITCHES AND INDICATORS .................................................................................................................................. 36
6.0 SPECIFICATIONS ..................................................................................................................................... 37

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Copyright© Instrumentation Technology Systems 2020 20200929
CHANGE HISTORY
Release
Date
Change
6/1/2020
Preproduction Release
6/
9
/2020
Modified commands
per Engineering inputs
; added return responses to queries.
6/2
5
/2020
Production Release
9/25/2020 Updated the PTP Master commands, ^Y??x (two places as PTP mode and PTP Master
settings). Expanded the introduction to the Webserver to explain when updates are
suspended by the user mouse pointer. Added IRIG prop delay controls and Manual
leap second in
put.

MITS Janus Time Engine
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Copyright© Instrumentation Technology Systems 2020 20200929
1.0 GENERAL DESCRIPTION
The MITS Janus Time Engine (MJTE) consists of a two-board set compliant with the physical
dimensions of the PC104 standard.
1. The Janus Time Engine Master Controller (JTEMC), part number 1412413
2. Photo-Sonics Interface (PSI/O), part number 1412414
There is a stack interface connector between the two boards. This interface is not compliant with
the PC104 specification and may not be used as part of a PC104 stack.
The GigE interface present on the JTEMC the I/O is used to control and receive status from the
MJTE. Similarly, it provides the control and status for the embedded webserver functions.
A block diagram of the aggregate MJTE is shown below.
1.1 Janus Time Engine Master Controller (JTEMC)
The JTEMC receives both IRIG B12x and IRIG B00x (single-ended1) time reference inputs, a
single-ended 1PPS reference input. There is a GigE Ethernet interface that enables the MJTE
Master Controller to slave to a PTP (IEEE1588) master clock or synchronize with an NTP
server.
1.1.1 Time Master
The JTE Master Controller will accurately synchronize its internal time master to a user selected
external time source. The time master is driven by a numerically controlled oscillator (NCO)
1 Differential inputs for both IRIG B00x and 1PPS are available on the Interface board.

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Copyright© Instrumentation Technology Systems 2020 20200929
oscillator that disciplines an OXCO crystal. Disciplining strategy calibrates out any crystal
frequency error (absolute and aging) and adjusts the drive clock to deliver a fixed number of
counts between one-second ticks (fractional seconds). The scale of the fractional seconds is 25
nano seconds. NCO disciplining of the OXCO oscillator delivers time master unlocked drift of
36 µsec/hr. after an hour locked to one of the time references listed below.
The time master may be synchronized by one of the following time references:
1. IRIG B12x (coax); B120-B003 require a manual YY2 input.
2. IRIG B00x (single-ended or differential); B000-B003 require a YY manual input.
3. 1PPS (single-ended or differential); requires a manual YY, MM, DD, HH, MM, SS input.
4. Network Time (PTP or NTP mutually exclusive).
5. Internal GPS receiver (Optional); requires a powered (3.3-5 VDC GPS antenna).
These references may be arranged in a priority order should the primary time reference fail or
synchronization be lost. The priority order will be used to select the next available reference
source for synchronization.
Progress through the priority list continues in a rotating fashion until a valid reference is found
and the MJTE can be synchronized to it. Should none be available, time will continue to be
generated driven by the NCO. At the moment a valid source does become available, that time
reference will be used to synchronize the time master.
The accuracy of the time master varies with the reference used as described in the table below.
Reference 1 Sec Tick
alignment
Notes
IRIG B12x
2
±
2
µ
sec
Dependent
on signal quality
IRIG B00x 25±50 µsec This input may be configured to receive a single ended or
differential TTL time code signal.
1PPS 25±25 nanosec This signal is used to align the time master 1-second
rollover. The absolute YY,DDD,HH,MM,SS must be set by
command.
This input may be configured to receive a single ended or
differential TTL time co
de signal.
NTP Range from
5 µsec to
milliseconds
Depends on network configuration, number of nodes and
location of the NTP server selected.
A command is available to set the IP address of the desired
NTP server with which to synchronize.
PTP 75±50 nanosec Each node between the grand master clock and the MJTE
must be PTP compliant to deliver this time accuracy. The
MJTE will not synchronize to an PTP clock on the network
when set to function as a PTP Master clock.
2 The century value is assumed to be 20 which the first two digits of a 4-digit year value.

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Reference 1 Sec Tick
alignment
Notes
GPS
(optional)
10±15 nanosec Not less than 3 satellites in view as reported by the GPS to
establish a fix. One satellite required to maintain lock.
1.1.2 IRIG B Inputs
The JTE Master Controller includes both IRIG B 12x or IRIG B 00x time code inputs. The
system parses and decodes these streams when available to extract the year (if available), day,
hours minutes and seconds that are encoded by the IRIG B time code signal (all ‘Control
Function’ and ‘Straight Binary Seconds’ bits are ignored). If a decodable signal is available, it
will be marked as “available” and can be selected for use in the reference priority list.
The JTE Master Controller will also extract the 1PPS signal embedded in the time code and use
it as a transfer standard to adjust the NCO clock to synchronize the fractional seconds of the time
master.
If the year data is not available in the IRIG time code (B122 or B002 for example), the year must
be entered by command (see 4.0 ASCII Command Set page 24).
The IRIG B12x input is transformer isolated by a 600Ω input impedance audio transformer
offering complete isolation from all other inputs to the system. A modulated input signal of
3 Vp-p to 10 Vp-p having a 2:1 to3:1 encoding modulation is required for proper
synchronization.
The IRIG B00x input has an impedance >1KΩ. The input signal must meet the requirements of
a standard TTL input (threshold and noise margin) and shall have a jitter of less than 25
nanoseconds.
1.1.3 1PPS Inputs
The MJTE can receive both a single-ended TTL and differential pair (RS485) 1 PPS input.
This one second tick is used to adjust the NCO clock to synchronize the fractional seconds of the
time master.
On power up, the time master will be set to the value of the TOD clock.
Since 1PPS has no value of time content, it is recommended that once the MJTE reports
synchronization to the current 1PPS reference, a complete time value, YY,DDD, HH,MM.SS be
sent at some time between the one-second ticks. This will correct for any cumulative error that
may occur prior to synchronization of the time master and any cumulative drift error of the TOD
clock while the MJTE is powered down.
1.1.3.1 Leap Seconds Requirement
When using 1PPS as the transfer standard when the MJTE is functioning as a PTP Master clock,
the manual time entered MUST be UTC and not local time. A current value (37 since January 1,
2017) must be entered for the Leap Second value (see 3.5.4 Leap Second Adjust on page 21 for
details about leap seconds) as well when the MJTE is performing as a master clock.

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Copyright© Instrumentation Technology Systems 2020 20200929
1.1.4 GPS Time Reference
The optional GPS receiver will track up to 12 satellites and provide the absolute time and a 1PPS
signal that is aligned to UTC within 30 nanoseconds when locked. When used, the time master
may be synchronized to the internal GPS as the time reference. When the GPS is present, it is
included in the priority list.
When it is intended to use the MJTE as a PTP Master Clock it is highly recommended to include
the GPS receiver on the system or an external 1PPS. While the MJTE will operate as a PTP
master clocking using an IRIG B12x time reference, accuracy is severely diminished.
If the GPS option has been purchased, it is important to ensure that the primary cell is properly
installed to retain the GPS Ephemeris. If the Ephemeris is lost, GPS lock may take several
minutes to achieve lock to GPS time.
1.1.5 PTPV2 Master Clock Function
When synchronized using a 1PPS reference or the optional internal GPS receiver, the JTE
Master Controller may be set up to function as a PTPV2 master clock. The JTE Master
Controller will then announce itself as a master clock periodically. The sync packet rate will be
programmable from 1/32 seconds to 8/sec in 15 steps. The system will be capable of
synchronizing up to 10 PTPV2 slaves.
All announce and slave-master communications will be accomplished via the GigE Ethernet port
on the JTE Master Controller. There is no separate PTP Ethernet port. Photo-Sonics Interface
(PSI/O)
As the PTP Master Clock, or PTP Best Master Clock, the JTEMC will synchronize its internal
master clock to a reference such as the internal GPS (optional) or external 1PPS.
If the MJTE is the PTP Master or Best Master clock, the internal time master will always be
indicated as LOCKED and the source shall be PTP.
If GPS (optional) or 1PPS is used as the transfer standard and lock is lost to them is during
operation as a PTP Master or Best Master clock, MJTE will continue to generate PTP signaling,
but time will drift from the transfer standard by up to 36 µS/hr. If the MJTE was selected as the
Best Master Clock, it may lose this status amongst the PTP clocks on the network (if any) and
revert to perform as a slave (terminal device) to the newly designated Best Master Clock. When
connected to a network with other PTP master capable devices, the MJTE will behave as
described in 3.7 PTP Master/Slave Mode Behavior on page 23.
Be aware that if lock is reestablished with the active transfer standard(s), resynchronization may
result in a jam sync event to all devices using the MJTE as a synchronized time source.
When the MJTE is operating as a PTP master clock it will announce itself as a master clock
periodically. The sync packet rate will be programmable from 1/32 seconds to 8/sec in 15 steps.
All announce and slave-master communications will be accomplished via the 100/1000 Ethernet
port.
When the MJTE is used as a PTP Master clock, the time reported with which to synchronize
shall be UTC and will ignore any Time Zone Offset in slave packets synchronization.

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The JTE Master Clock uses the IEEE1588 default profile.
1.1.6 Time of Day Clock
A Time Of Day (TOD) clock is provided that when the primary lithium cell is properly installed
will maintain YYYY, MM, DD, HH, MM and SS values when powered down. TOD is not a
low drift clock. The value of TOD is used to set the time master at power up. Time master
accuracy is achieved after it has been synchronized to one of the available time reference
sources.
The TOD is updated to equal the value of the time master once per second. This assures that the
TOD clock is reasonably accurate even after long periods without powering up the MJTE.
Power up accuracy will depend on the length of the power outage, variation in storage
temperatures and the state of synchronization on last update from the time master.
If the primary cell fails or is removed, TOD will start at 00,001,00,00,00,00.
1.1.7 Time Zone Offset
When locked to GPS (option), NTP or PTP a time zone off set function is provided to localize
the time reported, if desired. The time zone offset adds or subtracts 12 hours (15-minute
corrections to the time are also available) to the UTC time reported by these references. Time
Zone Offset is not applied when the reference is any IRIG source or 1PPS.
1.1.8 Ethernet
The Ethernet interface will support 100/1000 base-T transfer rates is set to auto-negotiate to the
highest rate the network node will support.
Address assignment may either be determined by a DHCP switch or router or may be set to a
fixed IP, port, gateway, and subnet mask. The factory default fixed IP address is
192.168.150.90; gateway of 192.168.150.100 and subnet mask of 255.255.255.0.
The socket functions support TCP/IP, UDP unicast and multi-cast protocols. TCP/IP ports are
intended for commands, status and JSON objects. Appropriate UDP ports are used to support
IEEE 1588 (PTP) communications.
The Ethernet interface also integrates a PTP hardware timestamping function for use when set to
synchronize to or function as a PTP master clock.
The MJTE does not support IEEE 802.3/Ethernet PTP modes of communications.

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1.1.9 Settings Flash
The following settings are saved to MJTE system flash such that each will survive a power cycle.
1. Amplitude setting of IRIG B127 carrier output
2. DHCP enabled/disabled state
3. Network Time selection as NTP or PTP (slave)
4. Output frequency of each clock (two)
5. Polarity of 1PPS input edge alignment
6. Polarity of both IRIG B00x inputs and outputs
7. Polarity of Clock A, Clock B, 1PPS output edge alignment
8. Preferred Time Reference
9. Propagation delay offsets for IRIG and NTP inputs
10. PTP terminal device or master clock setting
11. Static IP Address, Port, Gateway, and subnet Mask
12. Time Reference failover order
13. Time Zone Offset
1.1.10 I/O Interface
There is a 40-pin interface header that provides signals to the and from the Photo-Sonics
Interface (PSI/O) PWA and the JTE Master Controller. Power for the JTE Master Controller, 12
VDC, comes from the PSI/O.
Differential IRIG B00x and 1PPS reference signals come from the PSI/O.
Controls and signals used to manage the PSI/O route through this interface.
This interface is NOT PC104 compliant and shall never be attached to a PC104 stack.