ITS-5523
SYSTEM DESCRIPTION
The ITS-5523 Digital Transmitter is designed to operate in conjunction with a QAM digital IF modulator. The
Modulator used with this model is a Comstream CM720M. The ITS-5523 incorporates Automatic Level Control
(ALC) and Automatic Gain Control (AGC), which serve to maintain a constant output power level.
Combining the latest in GaAsFET amplifier technology and space saving design, the ITS-5523 delivers an output
power of 5 watts (average).
The unit's circuitry is enclosed in a tray assembly designed for mounting in a standard 19" equipment rack. The unit
comes complete with slide rail mounting hardware to allow the tray to move in and out of the rack for ease of service.
The outside dimensions of the tray assembly are 19" x 21" x 8.75" (W x D x H).
The ITS-5523 is factory calibrated for a front panel power meter reading of 100%, which represents the rated output
power of the unit (unless otherwise specified).
THEORY OF OPERATION
The 64 QAM digital IF signal, derived from the digital IF modulator, is applied to the rear of the tray (J2).
The input signal is fed to the IF Amplifier Board (1521-1101), which provides impedance matching and
amplification of the IF input signal. The output of the Impedance Matching Board is fed to a SAW Filter
Board (1600-1209), which attenuates any spurious signals outside the channel bandwidth. The output of
the SAW Filter Board is connected to the IF Delay Board (1165-1018), which contains two sections of delay
equalization to compensate for Group Delay created by external filters.
The IF Delay Board output is fed to the Response Corrector Board (1034-1205). On this board are three
adjustable notch filters which correct for nonlinearities in the IF response. The output signal (J5) is
connected to the input of the ALC/AGC Board (1022-1102).
The signal enters the board on J1, and after a 2 dB pad, a IF band-pass filter, and a second 2 dB pad, is
adjusted in level by PIN Diode Attenuator/ALC circuitry. This circuitry takes a peak-detected sample of the
IF signal and generates an ALC voltage, which biases the PIN Diode Attenuator. The ALC circuitry senses
any change in the IF level and automatically adjust the loss of the PIN attenuator to compensate, thereby
maintaining a constant IF output level regardless of minor changes in the input signal.
Next, the IF signal is fed to a loop through at J2 to a series of two boards. The first, the Linearity Corrector
Board (1034-1201) pre-distorts the IF signal to compensate for compression in later stages of the system.
The second board, the IF Phase Corrector Board (1227-1250) corrects for any phase error, which may be
introduced by the amplifiers later in the system. The phase and linearity corrected signal reenters the
ALC\AGC Board at J3 and after an IF filter identical to that used on the main input of the board (J1), is
applied to a Wilkinson Splitter. The main output of the splitter is fed to an AGC pin diode attenuator circuit.
The AGC pin diode attenuator, which functions in the same manner as the ALC pin attenuator diode
attenuator uses a DC level generated externally by a peak-detected sample of the output to adjust the loss of
the attenuator. The AGC circuitry maintains a constant level regardless of minor changes in the IF signal.
The AGC circuit can be bypassed by switch S2. When the AGC is disabled, the loss through the AGC PIN
attenuator is adjusted by the Manual Gain potentiometer R101, which directly controls the output in a
manual fashion. The AGC/AGC output (J4) is fed to the input of the Response Corrector Board (1034-1205),
with form and function identical to the response corrector above. The Response Corrector Board output
(J4) is connected to the IF input of the Upconverter Module (1519-1125).
