JVC SR-MV50US Administrator Guide

DVD VIDEO RECORDER & VIDEO CASSETTE RECORDER
200
SR-MV50US
For disassembling and assembling of MECHANISM ASSEMBLY, refer to the SERVICE MANUAL No.86700(MECHANISM ASSEMBLY).
Regarding service information other than these sections, refer to the service manual No. YD006 (DR-MV1SUS).
Also, be sure to note important safety precautions provided in the service manual.
EJECTEJECTTBC
OPERATE
VCR/DVD REC MODE DUBB
S-VIDEO
IN F-1
VIDEO (MONO)L - AUDIO - R
RECDVDDUBBTBCRECVCR
DV IN
RECPAUSEPLAY
… CH + FFREWSTOP
DVDVCR DVDVCR
PROG/CHECK DISPLAY ON SCREEN
DVD
TIMER VCR /DVD
VCR
TIMER
SLOW
PREVIOUS NEXT
CLEAR
SLOW
PAUSESTOP/
PLAY/SELECT
REMAIN REC
CH
AUDIO
SUBTITLE ANGLE
TV/VCR
REC MODE
LIVE CHECK
DVDTV CABLE/DBS
ABC DEF
JKL MNO
TUV
GHI
PQRS WXYZ
NUMBER / TV CH / DVD CHNUMBER / T V CH / DVD CH
MEMO/MARK
PROGRESSIVE
SCAN
VCR PLUS +
AUX
SET UP
RETURN
CANCEL
NAVIGA
TION
TOPMENU
MENU
TV
VOL.
TV/ CB L/ D V D
TV/ D V D
TV
TV / CBL/DBS
/DVD
1
4
7
2
5
8
0
3
6
9
ENTER
SR-MV50US [D3RS29]
CD-ROM No.SML200501
COPYRIGHT © 2005 Victor Company of Japan, Limited. No.YD045SCH
2005/1
SCHEMATIC DIAGRAMS

A
1
2
3
4
5
BCD
CN3001
CN7202
CN6201 CN3107
CN2301
CN6202 CN7503
CN6001CN6203
CN2001 CN2002 CN1 CN3104
CN7505
CN6701
CN1901
CN501
CN3106
CN6204
CN7502
CN503 CN502 CN504
CN2 CN3
FW7505
CN7201
BOARD INTERCONNECTIONS
CHARTS AND DIAGRAMS
2-1

DE F G
CN7107
CN4104
CN7501
CN2601 CN8001
CN3103
CN7202
CN7124
CN7104
CN5302
CN5001
CN501
FW7001
CN7103CN7002
CN2201
CN3901
CN7105
CN7109
CN7108
CN7102
CN7401
CN5304CN5501
CN8501
CN5301
CN7001 CN3102
CN7505
CN1404
CN5303
CN5311
FW7504 FW7505
CN7507
p10712001a_rev0
2-2

A
1
2
3
4
5
BCD
DANGEROUS VOLTAGE
T5001
R5326
D5201
C5002
D5209
D5104
R5305
D5001
D5306
D5204
D5309
C5206
R5301
R5303
L5207
R5306
C5104
R5109
C5302
C5301
C5203
D5207
C5001
IC5301
L5202
R5304
IC5302
D5212
D5210
D5307
R5103
D5101
C5209
C5303
R5107
B5001
C5202
D5301
D5308
C5102
PC5101
LF5002
C5003
R5108
C5105
R5106
C5103
R5105
D5103
R5101
D5213
C5204
CP5301
VA5001
R5302
C5101
B5302
C5304
L5201
C5307
D5208
C5313
C5210
R5318
C5004
R5325
C5308
R5001
C5315
F5001
D5205
C5207
C5306
C5314
L5206
D5211
R5324
L5205
C5201
D5202
L5302
Q5301
D5302
C5316
CN5001
C5106
IC5101
R5307
C5005
C5309
D5206
R5319
L5204
C5208
D5203
C5205
C5305
D5105
D5106 R5102
R5104
C5107
VA5003
SG5001
47
0.022
24k
1200
220
1.5k
33
µ
3.9k
470p
47
0.033
0.15
1200
0.068
33
µ
6.8k
68k
18
100
680
4.7
4700p
330
0.33
470p
3.9k
27
68
68k
680
1.5A
4.7k
100p
100
33
µ
100
470p
220
47k
472
18
100
4.7M
0.01
1.6A
4700
100
100
33
µ
47k
33
µ
120
0.01
4.7k
100p
47
4.7k
33
µ
1000
1500
100
1.2k
1k
220p
!
!
!
!
!
!
!
GROUND POINT FOR
PRIMARY VOLTAGE
GROUND POINT FOR
SECONDARY VOLTAGE
!!
!
!
!
!
!
!
SWITCHING REGULATOR AND JUNCTION SCHEMATIC DIAGRAMS
2-3

DE F G
IC5501
IC5502
IC5503
D5501
C5512
C5515
C5503
C5506
C5509
C5507
C5504
C5501
B5505
B5501
GND
D5V
B5508
D3.3V
V3.3V
SW12V
SW-7V
-29V
DC[-]
DC[+]
C5510
C5513
IC5504
C5511
C5514
C5508
C5505
C5502
Q5501
R5501 R5503R5502
D5502 D5503
R5504
Q5503
B5502
R5505
D5505
Q5506
Q5504
Q5502
Q5505
SW5V[2]
B5504
IC5505
B5503
B5511
D2.5V
D1.8V
B5509
B5510
B5507
CN5501
470p
470p
470p
470p
470p
1
1
1
1
1
100
100
100
100
100
820 1k680
1k
2.2k
Q5306
Q5309
0
6
2
03
5
202
R5309
Q5304
B5305
C5303
R5311
B5301
R5313
Q5313
Q5303
B5302
CN5303
R5308
Q5314
CN5304
C5304
5
201
R5328
R5329
R5327
Q5310
Q5305
R5330
R5314
D5304
CN5302
CN5301
R5323
R5320
R5321
D5312
B5303
C5306
Q5307
R5315
R5316
Q5308
5
205
B5304
R5322
L5301
Q5315
C5316
D5313
5
307
C5309 Q5302
C5312
C5310
D5303
R5312
R5310
C5311
5
204
R5317
C5305
0
0
3
3 µ
1k
100
27k
10k
1.2k
100
3
3 µ
470
10k
10k
470
470
5.6k
100
39
10k
3
3 µ
1k
.
7k
47
100
2.2
10k
27k
100
3
3 µ
1k
100
p10713001a_rev0
2-4

A
1
2
3
4
5
BCD
C1432
R1406
C1416
R1404
Q1408
R1413
R1416
R1418
L1403
C1417
C1414
C1424
R1427
R1428
L1401
C1403
C1413
C1412
R1410
R1415
R1412
C1466
R1411
C1411
C1406
R1442
Q1402
LC1402
LC1401
C1454
C1455
C1430
CN501
R1421
L1404
C1420 C1422
C1405
C1421
Q1410
R1426
C1423
C1410
R1445
Q1418
R1459
B1416
CN503
R1408
Q1419
C1434
R1434
R1435
R1436
Q1412
R1430
R1429
C1471
C1425
C1463
R1460
R1453
R1448
R1452
R1451
R1447
R1449
R1450
C1460
C1415
L1402
C1409
C1407
C1408
C1404
C1464
C1433
C1459
C1461
R1417
Q1414
R1441
C1462
C1465
Q1401
R1402
R1401
C1401
C1402
D1401
R1446
L1405
C1429
B1409
C1467
C1469
C1468
Q1406
R1405
Q1404
IC1401
R1454
C1438
C1437
C1442
C1443
C1435
C1441
C1440 C1436
C1472
C1473
C1439
/16
2SC4081( S)
CH
OPEN
/6.3
CH
OPEN
OPEN
OPEN
QQR0657-010
QQR0657-013
CHARA_DATA
SW5V
V_FROM_OSD
GND
GND
GND
C_OUT
Y_OUT
SELD_YV/F_IN
GND
SELD_C_IN
CH
OPEN
CH
/25
OPEN
SLOW_PULSE
TRICK[H]
D.FF
V.REF
V.P_CTL
GND
I2C_DATA_A/V
I2C_CLK_A/V
P.MUTE_VHS[L]
OPEN
DTC124TUA
OPEN
C
/6.3
OPEN
OPEN
CH OPEN
CH
OPEN
CH
OPEN
OPEN
OPEN
OPEN
OPEN
CH
OPEN
2SC1317(RS)
/16
RD4.3ES/B3
/6.3
OPEN
OPEN
OPEN
OPEN
OPEN
VDD25
AVDD1
AVSS1
TRICK
SLOWP
SCLK
SDATA
DFFI
VPLS
VSS
MON2
MON1
MON0
KILLER
YOUT
COUT
COMP
IREF
VR
VDD33
JCP8026
OPEN
CH
CH
OPEN
CH
CH
CH CHCH
VDD25
AVDD2 AVSS2 AVDD3 TCPOUT AVSS3 FSCIN
VSS
MCO7 MCO6 MCO5 MCO4
CWE
MCO3 MCO2 MCO1 MCO0
VSS
SWRCK
MON3VREF
CLAMP YVIN VRTY VRTC VRBY VRBC CIN
PIREF
PCOMP RFSC PFSC
VDD33
VDD33
AVDD4
VSS25
DRAMTE
TS1
1
470
10
1.8k
220
100k
470
6.8µ
0.1
0.01
33k
39k
10µ
330
33p
68p
270
220
1.5k
0.1
0.01
0.1
0.1
0.1
330 6.8µ
68p
0.1
33p
560
0.1
4.7
39k
680
15k
22k
6.8k
2.2k
1.5k
0.1
0.01
33
27k
1k
1k
470
1k
1k
1k
0.1
6.8µ
68p
33p
0.1
0.1
100
100
180
33
0.01
1k
100µ
330
100p
0.1
0.1
1
0.1
0.1
0.1 0.1
0.1
0.1
1
S-SUB/3D SCHEMATIC DIAGRAM
2-5

DE F G
L1409
CN502
CN504
Q1416
B1412
Q1415
R1457
C1448
C1453C1454
IC501
C539
R1456
B1417
R1439
C1445
R1431
B501
C1444
Q1412
R1430
R1429
L1406
C1428C1426
C1427
R1433
C1425
Q501
R512
C542
C522
Q502
C508
R511
R522
R521
C546
C504
D502
C523
C529
R508
C513
C515
C518
C514
R1455
R501
C524
C516
L501
C520 C511
R503
R505
C503
C528
R504
C538
R506
R507
C525 C517
C541
C521
C509
C519
C1470
C507
L1407
C1446
L502
C1450
L503
C1452
C1449
C1447
C510
C506
R1440
C1451
D1402
D501
C530
C502
C501
B503
R510
C537
0
1
C548
C1442
R1437 C1443 C1441
C1440
R1438
OPEN
GND
GND
PB_COLOR
Fsc
KILLER
TO_SUB_EMPH
FROM_SUB_EMPH
V_FROM_AV
GND
GND
GND
Y_TO_SUB
VHS[H]
SYNC_OUT
REC_COLOR
Y_TO_AV
V_TO_OSD_SSUB
DTC114EU
DTC114EUA
/6.3
JCP8058
OPEN
CHCH
OPEN
/50
OPEN
OPEN
OPEN
OPEN
OPEN
/50
OPEN
/50/25 /50 / 6.3
/50
CH
OPEN
/50
/50
CH
CH
OPEN
/6.3
OPEN
OPEN
/25
1SS133
OPEN
/6.3
OPEN
VDD25
VOUT
MINTEST
VSS
MCI0
MCI1
MCI2
MCI3
CRE
MCI4
MCI5
MCI6
MCI7
RSTR
RST
MTO
TCLK
CKMODE
VDD33
VDD33
8
026
OPEN
CH
CH CH CH CH
CH
AVDD3 TCPOUT AVSS3
FSCIN
VSS
MCO7 MCO6 MCO5 MCO4
CWE
SWRCK
RSTWPVREF
PIREF PCOMP RFSC PFSC
VDD33
VDD33
AVDD4
0Ω
1k
47
0.10.1
0.01
12k
27k
0.1
820
0.1
2.2k
1.5k
33µ
22p39p
51
0.01
820
0.01
4.7
0.1
2.2
0.01
0.01
1k
220p
120p
2.2
270p
680
220
10
270p
100µ
2.2 330
1.5k
1k
2.2
0.1
560
3.9k
3.9k
0.01 4.7
4.7
0.01
0.01
270p
0.01
100µ
47
10µ
0.1
0.1
0.1
0.1
0.01
47k
4.7
0.01
0.01
100
4.7M
100p
1
3.9k
0.1
0
.
1
1
47k
GND
p10605001a_rev0
2-6

A
1
2
3
4
5
BCD
C7001
C7007
C7008
CN70
S7022
R7021
R7016
C7006
IC7001
R7003
C7002
D7046
FW7
0
D7047
S7002
D7043
D7041 D7044D7042
CN7
0
IC7002
S7023
D7003
S7024
DI7001
S7012
S7032
S7005 S7004S7015
S7033S7035 S7034
S7014 S7013
R7013
D7033
D7034
R7015
R7007
R7006
R7005
L7001
C7004
C7005
R7009
D7001
R7002
R7001 R7014
D7032
D7035
D7031
R7041 R7042 R7043 R7044 R7046 R7047
D7012
D7004 D7005
D7015 D7013 D7014
D7002
D7021
C7010 C7011 C7003
R7010
0.1 220 220
82k
0.1
33k
1k
1k
4.7k
4.7k
10k
10k
10k 33k
330 330 330 330 330 330
0.047 0.047 10
10k
OPERATION JACK,SWITCH DISPLAY AND JACK SCHEMATIC DIAGRAMS
2-7

DE F G
OPE/JACK
CN4104
K4105
K4106
J4112
K4101
KA4101
KA4102
B4121
B4122
B4123
B4124K4107
K4102
K4103
K4104
CN7001
FW7001
CN7002
C7207
S7218
D7204
C7202
C7204
C7203
C7205
D7203D7202
L7202
L7203 L7201
L7204
C7201
R7206R7207
C7206
J7204
R7202
J7201
S7217 S7216
CN7202
CN7201
7575
0.01
75
p10696001a_rev0
2-8

A
1
2
3
4
5
BCD
IC7
4
J7401
C7401
C7403
C7402
C7404
0.1
0.1
0.1
0.1
BNC(RS232C) SCHEMATIC DIAGRAM
2-9