Figure 15 Rising and falling edges of digital signals.............................................30
Figure 16 Digital Trigger Paraments.....................................................................31
Figure 17 Digial Trigger Acquisition .....................................................................32
Figure 18 Start Trigger Mode...............................................................................33
Figure 19 Start Trigger Paraments.......................................................................34
Figure 20 Reference Trigger mode ......................................................................35
Figure 21 Retrigger mode ....................................................................................36
Figure 22 Retrigger Paraments ............................................................................36
Figure 23 Retrigger in Reference Trigger Mode ..................................................37
Figure 24 Retrigger Complete State.....................................................................37
Figure 25 SSI Connector in PCIe-6301..................................................................38
Figure 26 DIP Switch in PCIe-6301.......................................................................39
Figure 27 PCIe/PXIe-6301 System Diagram .........................................................42
Figure 28 Resistance Measurement noise (4-wire, Level 0)................................45
Figure 29 Resistance Measurement noise (4-wire, Level 1)................................45
Figure 30 Resistance Measurement noise (4-wire, Level 2)................................46
Figure 31 Resistance Measurement noise (4-wire, Level 3)................................46
Figure 32 Resistance Measurement noise (4-wire, Level 4)................................47
Figure 33 Resistance Measurement noise (4-wire, Level 5)................................47
Figure 34 Resistance Measurement noise (3-wire, Level 0)................................48
Figure 35 Resistance Measurement noise (3-wire, Level 1)................................48
Figure 36 Resistance Measurement noise (3-wire, Level 2)................................49
Figure 37 Resistance Measurement noise (3-wire, Level 3)................................49
Figure 38 Resistance Measurement noise (3-wire, Level 4)................................50
Figure 39 Resistance Measurement noise (3-wire, Level 5)................................50
Figure 40 Typical Drift (250 Ω Input) ...................................................................51
Figure 41 Typical Drift (Different Inputs).............................................................51
Figure 42 Typical Error (4-wire,100Ω Input)........................................................52
Figure 43 Typical Error (4-wire,250Ω Input)........................................................52
Figure 44 Typical Error (3-wire,100Ω Input)........................................................53
Figure 45 Typical Error (3-wire,250Ω Input)........................................................53
Figure 46 Typical Error (2-wire,100Ω Input)........................................................54
Figure 47 Typical Error (2-wire,250Ω Input)........................................................54
Table 1 PCIe/PXIe-6301 Channel Group ................................................................1
Table 2 6301 on different buses ............................................................................4
Table 3 Analog Input Performance ........................................................................8