LG 42PT350R User manual

PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PP11K
MODEL : 42PT350R 42PT350R-TD
42PT351R 42PT351R-TC
North/Latin A erica http://aic.lgservice.co
Europe/Africa http://eic.lgservice.co
Asia/Oceania http://biz.lgservice.co
Internal Use Only
Printed in Korea
P/NO : MFL67002503 (1102-REV00)

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Only or training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
BLOCK DIAGRAM ...................................................................................................................12
EXPLODED VIEW ..................................................................................................................13
CIRCUIT DIAGRAM .....................................................................................................................

- 3 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only or training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special sa ety-related characteristics. These parts are identi ied by in
the Schematic Diagram and Exploded View.
It is essential that these special sa ety parts should be replaced with the same components as recommended in this manual to
prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modi y the original design without permission o manu acturer.
G n ral Guidanc
An isolation Transform r should always b us d during the
servicing o a receiver whose chassis is not isolated rom the AC
power line. Use a trans ormer o adequate power rating as this
protects the technician rom accidents resulting in personal injury
rom electrical shocks.
It will also protect the receiver and it's components rom being
damaged by accidental shorts o the circuitry that may be
inadvertently introduced during the service operation.
I any use (or Fusible Resistor) in this monitor is blown, replace it
with the speci ied.
When replacing a high wattage resistor (Oxide Metal Film
Resistor, over 1W), keep the resistor 10mm away rom PCB.
Keep wires away rom high voltage or high temperature parts.
Due to high vacuum and large sur ace area o picture tube,
extreme care should be used in handling th Pictur Tub .
Do not li t the Picture tube by it's Neck.
L akag Curr nt Cold Ch ck(Ant nna Cold Ch ck)
With the instrument AC plug removed rom AC source, connect
an electrical jumper across the two AC plug prongs. Place the
AC switch in the on position, connect one lead o ohm-meter to
the AC plug prongs tied together and touch other ohm-meter
lead in turn to each exposed metallic parts such as antenna
terminals, phone jacks, etc.
I the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be in inite.
An other abnormality exists that must be corrected be ore the
receiver is returned to the customer.
L akag Curr nt Hot Ch ck (S b low Figur )
Plug the AC cord directly into the AC outlet.
Do not us a lin Isolation Transform r during this ch ck.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC
voltage measurements or each exposed metallic part. Any
voltage measured must not exceed 0.75 volt RMS which is
corresponds to 0.5mA.
In case any measurement is out o the limits speci ied, there is
possibility o shock hazard and the set must be checked and
repaired be ore it is returned to the customer.
L akag Curr nt Hot Ch ck circuit
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF

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Only for training an service purposes
SPECIFICATION
NOTE : Specifications an others are subject to change without notice for improvement .
VApplication Range
This spec is applie to PDP TV use PP11K Chassis.
V Specification
Each part is teste as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humi ity: 65 % ± 10 %
(3) Power Voltage: Stan ar Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Stan ar Voltage of each pro uct is marke by mo els.
(4) Specification an performance of each parts are followe each rawing an specification by part number in accor ance with
SBOM.
(5) The receiver must be operate for about 20 minutes prior to the a justment.
VTest Method
(1) Performance : LGE TV test metho followe .
(2) Deman e other specification
Safety : CE, IEC specification
EMC : CE, IEC
VModule Specification
(1) 42” -2D HD
42PT350R-TA
42PT351R-TC
NON-EU LG
Mo el Name Market Place Bran
Mo el Name
42PT350R-TA
42PT351R-TC
Remark
Safety : IEC/ EN60065, EMI : CISPR13
Market
NON-EU
Appliance
TEST
No Item Specification Remark
1 Display Screen Device 106 cm (42 inch) wi e Color Display Mo ule PDP
2 Aspect Ratio 16:9
3 PDP Mo ule PDP42T3####,
RGB Close (Well) Type, Glass Filter (38%)
Pixel Format: 1024 horiz. By 768 ver
4 Operating Environment 1) Temp. : 0 eg ~ 40 eg
2) Humi ity : 20 % ~ 80 %
5 Storage Environment 3) Temp. : -20 eg ~ 60 eg LGE SPEC
4) Humi ity : 10 % ~ 90 %
6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG

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Only or training and service purposes
VMod l G n ral Sp cification
(1) NON - EU Spec.(TA)
No Item Speci ication Remark
1. Market NON EU
2. Broadcasting system PAL/SECAM-BG/I/DK, NTSC-M
3. Available Channel BAND PAL NTSC China(DK) Australia(BG)
VHF/UHF E2 ~ C69 2~78 VHF/UHF C1~C62 C1~C75
CATV S21 ~ S41 1~71 CATV S1~S41 S2~S44
4. Receiving system Upper Heterodyne
5. Video Input (2EA) PAL,SECAM, NTSC Rear 1EA, Side 1EA
6. Component Input (2EA) Y/Cb/Cr, Y/ Pb/Pr
7. RGB Input (1EA) RGB-PC
8. HDMI Input 2ea HDMI-DTV , Only PCM MODE Side HDMI(1), Rear HDMI(1)
: 42/50PT250R-TA only
3ea Side HDMI(1), Rear HDMI(2)
9. Audio Input (5EA) L/R Input(PC 1EA, Component 2EA,
Rear 1EA, Side 1EA)
10. RS-232C (1EA) Remote control
11. USB Input (1EA) SD DivX, MP3, JPEG,

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Only or training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Rang
This spec sheet is applied to all o the PP11K chassis.
2. Sp cification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation trans ormer. However, the use o isolation
trans ormer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be per ormed in the circumstance o
25 °C ± 5 °C o temperature and 65 % ± 10 % o relative
humidity i there is no speci ic designation.
(4) The input voltage o the receiver must keep 100 V
~ 240 V, 50 / 60 Hz.
(5) The receiver must be operated or about 5 minutes prior to
the adjustment when module is in the circumstance o over
15 °C
- In case o keeping module is in the circumstance o 0 °C,
it should be placed in the circumstance o above 15 °C
or 2 hours
- In case o keeping module is in the circumstance o below
-20 °C, it should be placed in the circumstance o above
15 °C or 3 hours,.
3. S/W Program Download
3-1. Profil
This is or downloading the s/w to the lash memory o the
IC402
3-2. Equipm nt
(1) PC
(2) ISP_tool program
(3) Download jig
3-3. Conn ction Structur
3-4. Conn ction Condition
(1) IC name and circuit number : Flash Memory and IC402
(2) Use voltage : 3.3V (5 pin)
(3) SCL : 15 pin
(4) SDA : 12 pin
(5) Tact time : about 2min and 30seconds
3-5. Download M thod (By using MSTAR JIG)
- Preliminary Steps
(1) Download method (PCB Ass’y)
- HD
1) Connect the download jig to D-sub jack
2) Connect the PC to USB jack
(2) Download Steps
1) Execute ‘ISP Tool’ program in PC, then a main window
will be opened
2) Click the connect button and con irm “Dialog Box”
Double click

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Only or training and service purposes
3) Click the Con ig button and Change speed
E2PROM Device setting : over the 350Khz
4) Read and write bin ile
Click “(1)Read” tab, and then load download
ile(XXXX.bin) by clicking “Read”.
5) Click “Auto(2)” tab and set as below
6) Click “Run(3)”.
7) A ter downloading, check “OK(4)” message.
3-6. Download M thod (By using USB
M mory Stick)
* Caution
- Using ‘power on’ button o the control R/C, power on TV.
- USB ile (EPK) version must be bigger than downloaded
version o main B/D.
- It should be only one SW binary ile in USB Stick
(1) Using ‘Power ON’ button o the control R/C, Power on TV.
(2) Insert the USB memory stick to the SET.
(3) Display USB loding message then, push the ‘Exit’ Key o
control R/C
(4) Push the ‘MENU’ Key and move the cusor ‘OPTION’ o
OSD ( Fig. 1)
* Caution : Don’t push the ‘OK’ key.Just cusor is on the
‘OPTION’ menu.
(5) Push the “7” key o control R/C continuously.
Then, Display “TV So tware Update” Pop-up menu. (Fig. 2)
(6) Select SW ile (XXXX.bin) you want, push the “OK” Key.
(7) S/W download process is excuted automatically.
( Fig. 1)
( Fig. 2)

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Only or training and service purposes
4. PCB Ass mbly Adjustm nt M thod
4-1. Option Adjustm nt Following BOM
Tool Option
Area Option
Option 1
Option 2
Option 3(Available or EU & Non EU model)
* Pro ile: Must be changed the option value because being
di erent with some setting value depend on module,
inch and market
* Equipment : Adjustment Remote Controller
(1) Push the IN-START key in the Adjust R/C.
(2) Enter Password number. The value o Password is “0 0 0
0”.
(3) Input the Option Number that was speci ied in the BOM,
into the Shipping area.
(4) Select “Tool Option” by using D/E(CH+/-) key, and press
the number key(0~9) consecutively
ex) I the value o Tool Option1 is 4, input the data using
number key “4” (Fig. 3)
(5) i it is EU model ( such as 42/50PJ**R-ZA ), select “Area
option” by using D/E(CH+/-) key , and press the number
key(0~9) consecutively.
ex) I the value o Area Option is 40, input the data using
number key “40” (Fig. 3)
Caution
- Don’t Push “IN-STOP” key a ter PCB assembly
adjustment.
* PP01A/B/C Tool option
(6) EDID D/L Method
- A ter so tware D/L or PCBA manu acturing, you can
download EDID Data.
- When you adjust Tool Option, H6 Model EDID download
process is executed automatically
* I the model don’t have HDMI 3, HDMI 3 will be disappeared
at OSD Window.
[Caution]
- When you adjust tool option, don’t connect HDMI or D-
sub cable.
- I you connect some cable, EDID D/L process will be
ailed.
(7) Adjustment method
Be ore PCBA check, have to change the Tool option and
Area option
[About PDP
A ter done all adjustments, Press IN-START button and
compare Tool option and Area option value with its BOM, i
it is correctly same then Change “RF mode” and then
unplug the AC cable.
I it is not same, then correct it same with BOM and unplug
AC cable.
For correct it to the model’s module rom actory JIG
model.
[Don’t push The IN-STOP KEY a ter completing the unction
inspection.
5. EDID(Th Ext nd d Display
Id ntification Data)
Caution
- Never Use the cable( HDMI or D-sub cable) or EDID
Writing.
- Automatically PP01A/B/C Model EDID download process
is executed when you adjust Tool Option.
( Fig. 3)
Model Tool option Area Option
42PT250R-TA 13 1
Inch
Tool
SIDE AV 0/1
HDMI 0/1/2/3
Side HDMI 0/1
COMP2 0/1
RGB 0/1
RS232C 0/1
Local Key 0 (7KEY) / 1 (8KEY)
LED TYPE 0 (RED) / 1 (RED/White) / 2 (Reserve)
USB TYPE 0 (NONE) / 1 (PHOTO, MUSIC)
/ 2 (PHOTO, MUSIC, DivX)

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Only for training an service purposes
<NON-EU AREA>
5-1. EDID Data
OXGA EDID DATA ( 42 inch)
<Analog(RGB) : 128bytes>
<HDMI 1 : 256bytes>
<HDMI 2 : 256bytes>
<HDMI 3 : 256bytes> SIDE HDMI(HDMI 3)
6. HDCP(High-Bandwidth Digital
Contents Protection) Download
HDCP ownloa process is elete in PP01A/B/C Chassis
In PP01A/B/C Chassis, it is usi g the EEPROM masking
HDCP Key
7. Man al ADC Adj stment
(Component 1, RGB)
Caution
- Do not connect external input cable
- A justment result is applie to SET On/Off later.
* A justment is one using internal ADC, so input signal is not
necessary.
NO Item Con ition Hex Data
1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03
Inch 42PT350R-TA
Tool option 15
INCH 42
TOOL PT350R
SIDE AV 1
HDMI 3
Si e HDMI 1
COMP2 1
RGB 1
RS232C 1
Local Key 0
LED TYPE 0
USB TYPE 2
RF input
NO SIGNAL or White noise
AV / Component / RGB input
NO SIGNAL

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Only or training and service purposes
7-1. COMPONENT input ADC (SD / HD),
RGB input ADC
(1) Press ADJ key on R/C or adjustment. Need not convert
input mode.
(2) Enter Password number. The value o Password is “0 0 0
0”.
(3) Select “0. ADC calibration” by using D/E(CH +/-) and press
ENTER(V).
(4) Start ADC adjustment by using F/G(VOL +/-) or press
ENTER(V).
(5) Both component and RGB ADC adjustment are executed
automatically
When ADC adjustment is inished, this OSD appear.
Notice : A ter All mode check, set the Speaker Volume “0”.
Caution : Don’t Press the Power Key on Remote Controller.
Just AC Power O . ( Not DC o )
Notice : From this sentence, All working is mass production.
8. POWER PCB Assy Voltag
Adjustm nt
(Vs voltag Adjustm nt)
8-1. T st Equipm nt: D.M.M 1EA
8-2. Conn ction Diagram for M asuring
Re er to (Fig. 4)
8-3. Adjustm nt M thod
(1) Vs Adjustment
1) Connect + terminal o D. M..M. to Vs pin o P811,
connect -terminal to GND pin o P811.
2) A ter turning VR901, voltage o D.M.M adjustment as
same as Vs voltage which on label o panel right/top
( deviation ; ±0.5V)
(2) Va Adjustment
1) Connect + terminal o D. M..M. to Va pin o P811,
connect -terminal to GND pin o P811.
2) A ter turning VR502, voltage o D.M.M adjustment as
same as Va voltage which on label o panel right/top
( deviation ; ± 0.5 V)
8-4. Adjustm nt of Ar a option.
(1) Area Option Adjustment ollowing BOM
(Including SKD models )
Tool Option
Area Option
Option 1
Option 2
Option 3 ( Available or EU & Non EU model )
* Pro ile : Must be changed the option value because being
di erent with some setting value depend on module,
inch and market
* Equipment : Adjustment Remote Controller
1) Push the IN-START key in the Adjust R/C.
2) Enter Password number. The value o Password is “0 0
0 0”.
3) Input the Area Option Number that was speci ied in the
BOM, into the Shipping area.
4) Select “Area Option” by using D/E(CH+/-) key, and
press the number key(0~9) consecutively
ex) I the value o Area Option 40, input the data using
number key “40” (Fig. 3)
Caution:
- Although it is SKD model, adjust area option in SET
assemmbly process.
- Don’t Push “IN-STOP” key a ter PCB assembly
adjustment.
9. Adjustm nt of Whit Balanc
9-1. R quir d Equipm nt
(1) Remote controller or adjustment
(2) Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
produc : CH 10 (PDP)
lease adjust CA-210, CA-100+ by CS-1000 be ore
measuring
(3) Auto W/B adjustment instrument(only or Auto adjustment)
(Fig. 4)
.
.

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Only or training and service purposes
9-2. AUTO Whit Balanc Proc ss.
Be ore Adjust o White Balance, Please press POWER ONLY
key
Adjust Process will start by execute RS232C Command.
OCS-1000/CA-100+/CA-210(CH 10) White balance adjustment
coordinates and color temperature.
9-3. Manual W/B proc ss (using adjusts
R mot control)
(1) Enter ‘PICTURE RESET’ on Picture Mode, then turn o
Fresh Contrast and Fresh colour in Advanced Control
(2) A ter enter Service Mode by pushing “ADJ” key,
(3) Enter White Pattern o o service mode, and change o ->
on.
(4) Enter “W/B ADJUST” by pushing “G” key at “3. W/B
ADJUST”.
(5) Adjust W/B DATA, or all CSM, choose ‘COPY ALL’
* Gain Max Value is 192. So, Never make any Gain Value
over 192 and please ix one Value on 192, between R, G
and B.
* Auto-control inter ace and directions
(1) Adjust in the place where the in lux o light like loodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust a ter sticking the Color Analyzer (CA-
100+, CA210 ) to the side o the module.
(3) Aging time
A ter aging start, keep the Power on (no suspension o
power supply) and heat-run over 5 minutes
* Above optical characteristics are should be measured by
ollowing condition.
ODDC Adjustment Command Set
10. D fault Valu in Adjustm nt
mod
10-1. Whit Balanc
(De ault values maybe modi ied the module condition)
10-2. Syst m control condition
1. AC on time on only one a ter assembled automatically
CSM Color Coordinate Temp Color Coordinate
xy
Cool 0.276 0.283 11000K 0.002
Medium 0.285 0.293 9300K 0.002
Warm 0.313 0.329 6500K 0.002
Min Tpy Max
R-GAIN 0 192 192
G-GAIN 0 192 192
B-GAIN 0 192 192
Measured Mode
Picture Mode Vivid
Fresh Contrast O
Fresh Color O
Smart Power Saving O
Adjustment
Adjustment
Adjustment

- 12 - LGE Internal Use OnlyCopyright ©2011 LG Electronics Inc. All rights reserved.
Only or training and service purposes
BLOCK DIAGRAM

- 13 - LGE Internal Use Only
EXPLODED VIEW
900
910
203
590
204
601
207
520
400
200
240
580
301
305
120
300
206
202
205
302
303
304
501
602
201
570
Many electrical and mec anical parts in t is c assis ave special safety-related c aracteristics. T ese
parts are identified by in t e Sc ematic Diagram and EXPLODED VIEW.
It is essential t at t ese special safety parts s ould be replaced wit t e same components as
recommended in t is manual to prevent X-RADIATION, S ock, Fire, or ot er Hazards.
Do not modify t e original design wit out permission of manufacturer.
IMPORTANT SAFETY NOTICE
A10 A9
LV1
A12
A21
A2
A4

USB DOWN STREAM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
INPUT
HPD_MST_2
+5V_HDMI_1
R110
100
DDC_SCL2
R109
100
+5V_HDMI_1
R118
100
CEC
IC103
MAX3232CDR
3C1-
2V+
4C2+
1C1+
6V-
5C2-
7DOUT2
8RIN2 9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
D101
KDS184S
A1
C
A2
+5V_HDMI_3
Q101
2SC3875S
RT1C3904-T112
E
B
C
R162
10K
SIDE_HDMI
DDC_SCL1
+5V_HDMI_2
+5V_ST
+5V_HDMI_2
R160
100
SIDE_HDMI
D102
KDS184S
SIDE_HDMI
A1
C
A2
R161
100
SIDE_HDMI
CEC
+3.3V_MPLL
+5V_ST
DDC_SCL3
+5V_ST
DDC_SDA1
D100
KDS184S
A1
C
A2
DDC_SDA2
DDC_SDA3
R103
10K
R102
1K
R122
4.7K
R114
100
R115
100
R116
10K
R101
1K
BOT_HDMI R129
4.7K
R104
10K
BOT_HDMI
HPD_MST_1
R119
10K R163
10K
SIDE_HDMI
+5V_ST
R117
100
Q100
2SC3875S
BOT_HDMI
RT1C3904-T112
E
B
C
TXD
R120
4.7K C103
68pF
C104
68pF
R111
75
R128
68
R113
75
R112
75
R127
68
R132
10K
R121
4.7K
C105
0.1uF
C106
0.1uF
C107
0.1uF
C108
0.1uF
JK111
SPG09-DB-009
1
2
3
4
5
6
7
8
9
10
R159
12K
R145
75
R147
220K
R152
10K
R146
220K
R153
10K
R158
12K
JK110
SPG09-DB-010
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
IR_OUT
C110
0.01uF
25V
SIDE_HDMI
C101
0.01uF
25V
C109
0.01uF
25V
C100
0.01uF
25V
C102
0.01uF
25V
R124
220K
R125
10K
R131
12K
R123
220K R130 12K
R126
10K
R539
0HOTEL
R535
1K
NONE_HOTEL
R529
470K
MUTE_LINE
MNT_LOUT
C114
10uF
16V
NONE_HOTEL
SPK_R-_HOTEL
C111
10uF
16V
SPK_R+_HOTEL
MNT_ROUT
R540
0
HOTEL
MUTE_LINE
R528
470K
R532
0HOTEL
Q502
2SC3875S(ALY)E
B
C
Q504
2SC3875S(ALY)
E
B
C
R533
1K
NONE_HOTEL
R514
12K
R505
10K
R508
75
R506
10K
R503
220K
R515
12K
R504
220K
R133
100
R134
100
R135
10K R136 10K
JK100
YKF45-7058V
BOT_HDMI
14
13
5
20
12
11
2
19
18
10
4
1
17
9
8
3
16
7
6
15
JK101
YKF45-7054V
14
13
5
20
12
11
2
19
18
10
4
1
17
9
8
3
16
7
6
15
JK106
PPJ235-01
4A
5A
3A
4B
3C
4C
5C
+5V_MULTI
JK112
KJA-UB-4-0004
1234
5
R100
1K
SIDE_HDMI HPD_MST_3
Q102
2SC3875S
SIDE_HDMI
RT1C3904-T112
E
B
C
CEC
JK102
KJA-ET-0-0032
SIDE_HDMI
14 NC
13 CEC
5DATA1_SHIELD
20
JACK_GND
12 CLK-
11 CLK_SHIELD
2DATA2_SHIELD
19 HPD
18 +5V_POWER
10 CLK+
4DATA1+
1DATA2+
17 DDC/CEC_GND
9DATA0-
8DATA0_SHIELD
3DATA2-
16 SDA
7DATA0+
6DATA1-
15 SCL
R105
10K
SIDE_HDMI
+5V_HDMI_3
JK103
PEJ027-01
6B
7B
5
4
7A
6A
3
R142 100
NONE_RGB
R143 100
NONE_RGB
R144 100
NONE_RGB
R150 100
NONE_RGB
R180
5.1
R181
5.1
R148
10K
R174
10K
R179
12K
R178
12K
R154
12K
R165
75
R137
75
R169
220K
R138
75
R166
75
R175
10K
R139
75
R140
220K
R167
75
R155
12K
R168
220K
R149
10K
R141
220K
JK107
PPJ239-01
5J
6J
4J
7K
5K
7L
5L
5M
4N [RD2]CONTACT
5N [RD2]O-SPRING_2
6N [RD2]E-LUG
6D [GN1]E-LUG
5D [GN1]O-SPRING
4D [GN1]CONTACT
7E [BL1]E-LUG-S
5E [BL1]O-SPRING
7F [RD1]E-LUG-S
5F [RD1]O-SPRING_1
4F [RD1]CONTACT_1
5G [WH1]O-SPRING
4H [RD1]CONTACT_2
5H [RD1]O-SPRING_2
6H [RD1]E-LUG
IC101
CAT24C02WI-GT3
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
IC102
CAT24C02WI-GT3
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
IC100
CAT24C02WI-GT3
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
CEC
D103
30V
MMBD301LT1G
D104
10V
BSS83
Q103
S
B
D
GR106
56K
CEC_C
+3.3V_MPLL
EYE_SDA
EYE_SCL
R543 100
READY
R544 100
READY
JK116
PPJ241-02
3[WH]L_OUT
5[WH]GND
4[RD]R_OUT
6FIX_TER
COMP2_PR
TMDS1_RXC-
TMDS1_RX0+
TMDS1_RX2+
TMDS1_RXC+
TMDS1_RX0-
DDC_SDA2
TMDS2_RX2+
DDC_SCL2
TMDS1_RX2-
TMDS2_RX1+
TMDS2_RX1-
DDC_SDA1
TMDS2_RXC+
DDC_SCL1
TMDS2_RX2-
RXD
TMDS1_RX1-
TMDS2_RX0-
TMDS2_RXC-
TMDS1_RX1+
TMDS2_RX0+
DSUB_SCL
ROM_SDA
DSUB_SDA
PC_HS
ROM_SCL
PC_B
PC_VS
PC_G
PC_R
ISP_RX
SIDE_VIN
SIDE_LIN
SIDE_RIN
PC_AUD_R
PC_AUD_L
AUDIO_R
SC1_VIN
SC1_RIN
SC1_LIN
USB_DN
USB_DP
TMDS3_RX2-
DDC_SDA3
TMDS3_RX1-
TMDS3_RX0+
TMDS3_RXC-
TMDS3_RX0-
DDC_SCL3
TMDS3_RX2+
TMDS3_RXC+
TMDS3_RX1+
ROM_SDA
ROM_SCL
DSUB_SDA
DSUB_SCL
COMP1_PR
COMP2_R
COMP1_Y
COMP1_PB
COMP2_PB
COMP1_R
COMP2_Y
COMP2_L
COMP1_L
D115
5.6V
D116
5.6V
D113
5.6V
D114
5.6V
D126
5.6V
D127
5.6V
D125
5.6V
D124
5.6V
D108
5.6V
D105
5.6V
JK113
PPJ233-01
4A [YL]O-SPRING
5A [YL]E-LUG
3A [YL]CONTACT
4B [WH]C-LUG
5C [RD]E-LUG
4C [RD]O-SPRING
3C [RD]CONTACT
1 4INPUT
[ Slim Jack : 6630TGA004Q ] [ Slim Jack : 6630G00001E ]
[ Slim Jack : EAG59023302 ]
[ Slim Jack : EAG59023301_SCREW ]
[ Slim Jack : EAG42463001]
[ EAG41945401 ]
EAX64103901(BPR)
H6 Revolution Circuit Diagram
[ SIDE HDMI ]
H6RR 2010/11/1
HDMI CEC
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Key / Power / LVDS / Option
TXCE0-
TXCE0+
TXCE1-
TXCE1+
TXCE2-
TXCE2+
TXCLKE-
TXCLKE+
TXCE3-
TXCE3+
TXCE4+
TXCO0-
TXCO0+
TXCO1-
TXCO1+
TXCO2-
TXCO2+
TXCLKO-
TXCLKO+
TXCO3-
TXCO3+
TXCO4-
TXCO4+
TXCE4-
TXCE0-
TXCE0+
TXCE1-
TXCE1+
TXCE2-
TXCE2+
TXCLKE-
TXCLKE+
TXCE3-
TXCE3+
TXCE4-
TXCE4+
TXCO0-
TXCO0+
TXCO1-
TXCO1+
TXCO2-
TXCO2+
TXCLKO-
TXCO3+
TXCO4-
TXCO4+
R217 110 1/10W 1%
R243
100K
IR
C234
22uF
16V
3225
R213
3.6K
C226
330uF
4V
R215
10K
1/16W
5%
+3.3V_MPLL
TXCLKO+,TXCLKO-,TXCO0+,TXCO0-,TXCO1+,TXCO1-,TXCO2+,TXCO2-,TXCO3+,TXCO3-,TXCO4+,TXCO4-
C224
0.1uF
16V
C214
10uF
16V
ROM_RX ROM_RX
EYE_SCL
SPK_R+_HOTEL
+1.2V_MST
ROM_SDA
R212
40.2
1/10W
1%
R227
4.7K
HOTEL
R232
22
HOTEL
IC204
MP2305DS
3
SW
2
IN
4
GND
1
BS
5FB
6COMP
7EN
8SS
R246
10.5K
1%
L803
10uH
C235
0.1uF
AC_DET
ROM_TX
RL_ON/POWER_ON
+17V_TI
C232 READY
C221
0.1uF
C204
READY
R200 4.7K 1/16W 5%
C228
0.1uF
HOTEL
+5V_TU
C237
100uF
16V
C231
0.01uF
ZD200
READY
R224
4.7K
HOTEL
R223
10K
C233
4700pF
50V
IR_OUT
C210
0.01uF
R201
10K
1/16W
5%
R211
75
1%
1/16W
C236
READY
ROM_SDA
AUDIO_R
Q200
RT1C3904-T112
E
BC
R245
3.6K
ROM_SCL
C218
22uF
16V
3225
R207
100K
P_SDA
C227
0.01uF
25V
ZD201
READY
C201
0.01uF
25V
Q201
RTR030P02
S D
G
C206
22uF
16V
R202 10K 1/16W 5%
C200
22uF
16V
L202
33uH
C216
0.01uF
25V
ROM_SCL
C229
10uF
16V
TXCLKO+,TXCLKO-,TXCO0+,TXCO0-,TXCO1+,TXCO1-,TXCO2+,TXCO2-,TXCO3+,TXCO3-,TXCO4+,TXCO4-
C219
100uF
16V
P_SDA
+5V_ST
DISP_EN
SW_RESET
P_SCL
IC202
AZ1117H-ADJTRE1(EH11A)
2
OUTPUT
3
INPUT 1ADJ/GND
+17V_TI
+5V_ST
C217
4700pF
50V
+5V_ST
C223
READY
C215 READY
+3.3V_MPLL
P603
12507WS-15L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
KEY2
C211
0.01uF
25V
C222
100uF
16V
R225
330
1/10W
1%
+3.3V_MPLL
C205
0.01uF
25V
R219
10K
KEY1
L203
0
1/4W
5%
M5V_ON
R226
4.7K
R221
4.7K
L201
MLB-201209-0120P-N2
120-ohm
ERROR_DET
P200
SMAW200-H18S1
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
15
10
5
19
+5V_MULTI
+5V_MULTI
+5V_ST
IC201
MP2305DS
3
SW
2
IN
4
GND
1
BS
5FB
6COMP
7EN
8SS
R236
100
+17V_TI
R222
4.7K
R247
READY
+1.8V_DDR
+3.3V_MPLL
C208
100uF
16V
IC200
AP2121N-3.3TRE1
1
GND
2VOUT 3
VIN
+3.3V_MPLL
C212
0.01uF
25V
+3.3V_MST
C238
READY
DISP_EN
R231
100
C213
READY
P204
12507WS-08L
HOTEL
1
2
3
4
5
6
7
8
9
R203 100
+3.3V_MPLL
RL_ON/POWER_ON
LED_R
AC_DET
IC205
AZ1117BH-ADJTRE1
2
OUTPUT
3
INPUT 1ADJ/GND
R216
READY
TOUCH_VER_CHK
ROM_TX
R240
10K
P201
TF05-51S
HD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
C209
0.01uF
25V
SPK_R-_HOTEL
C202
10uF
25V
IC203
AZ1085S-3.3TR/E1
1
ADJ/GND
2OUTPUT 3
INPUT
C225
100uF
16V
C230
READY
R208
68K
5%
R230
100
Q202
2SC3052
HOTEL
E
B
C
R220
10K
R209
1K
READY
+3.3V_MPLL
EYE_SDA
C207
10uF
16V
L200
CB3216PA501E
C220
0.01uF
25V
R244
3.9K
1%
P_SCL
P205
104060-8017
FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
Hotel Option
KEY/IR Interface
MAX 300mA
12mA
16mA MAIN SUB MICOM
MAIN I2C PULL UP
RS232C-TRANCEIVER
CEC LEVEL SHIFT
DDR2 & Vref
85mA
1391mA
MAX 1A
TYPICAL 3A
59mA
MAIN IC : 4 PAGE
1420mA 1420mA
3.2A / P-CHANNEL
356mA
1.899V
Power Block
2 4Key / Power
LVDS Block
HOTEL OPTION
EAX64103901(BPR)
H6 Revolution Circuit Diagram
H6RR
 

 
2010/11/1
C7
R4 C1
R1
C5
C8C2
 

 
C9
R5
R3
V=0.923X(1+R1/R3)=7.2V
THE RECOMMANDED VALUE OF R3 IS 10K
R2
D1
L1
TUNER
C6
D1
V=0.923X(1+R1/R3)=1.266V
THE RECOMMANDED VALUE OF R3 IS 10K
R1
MAIN IC CORE
C2
R2
C5
C6
R5
C9
R4
OUT:1.27V
C8
L1
C7C1
930mA
R3
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Tuner / Amp / DDR
DDR2_A[11]
DDR2_D[9]
DDR2_A[9] DDR2_A[4]
DDR2_D[1]
DDR2_A[10] DDR2_A[12]
DDR2_D[14] DDR2_D[4] DDR2_D[2]
DDR2_A[2]
DDR2_D[13] DDR2_D[6]
DDR2_A[0] DDR2_A[1]
DDR2_D[10] DDR2_D[0]
DDR2_A[3] DDR2_A[8] DDR2_A[7]
DDR2_D[12] DDR2_D[15] DDR2_D[11]
DDR2_A[6]
DDR2_D[8] DDR2_A[5] DDR2_D[5] DDR2_D[7] DDR2_D[3]
SPK_L-
C306
4.7uF
10V
R309
18K
C337
0.1uF
C366
0.1uF
SPK_R+
R320
3.3
C353
0.033uF
50V
SPK_L+
C369
0.1uF
R323
3.3
L309
120-ohm
C367
0.1uF
+3.3V_AVDD
C333
0.1uF
R321
3.3
L310
120-ohm
+17V_TI
AVSS
C374
0.01uF
C373
0.01uF
R314 470
+17V_TI
SPK_R-
C340
0.1uF
AVSS
R302
0
C372
0.01uF
SPK_R+
SPK_L+
SPK_R-
I2S_WS
C331 0.033uF
50V
R313
470
A_SDA
AC_DET
AVSS
R322
3.3
AVSS
SW_RESET
+3.3V_DVDD
SPK_L-
A_SCL
+17V_TI
C315
10uF 16V
R315 22K
R308
200
1%
C370
0.1uF
C300
10uF 16V
+3.3V_AVDD
+3.3V_DVDD
C332
0.033uF
50V
I2S_SDO
C341
0.1uF
C359
0.033uF
50V
I2S_MCLK
I2S_SCK
+3.3V_MST
+1.8V_DDR
+1.8V_DDR
R324
1K
R325
1K
V_REF
DDR2_MCLK
DDR2_A[0-12]
DDR2_DQS1M
DDR2_BA0
DDR2_DQM1
R338
56
DDR2_DQS1P
DDR2_BA1
DDR2_RASZ DDR2_DQM0
V_REF
DDR2_DQS0M
R336
56
DDR2_CKE
IC303
H5PS5162FFR-S6C
Hynix
J2 VREF J8 CK
H2
VSSQ2
B7 UDQS N8 A4 P8 A8 L1 NC4 L2 BA0 R8 NC3 K7 RAS
F8
VSSQ3
F3 LDM P3 A9 M3 A1 N3 A5 K8 CK
R3 NC5 L3 BA1 J7 VSSDL L7 CAS
F2
VSSQ4
B3 UDM M2 A10/AP K2 CKE R7 NC6 M7 A2 N7 A6 M8 A0 J1 VDDL K3 WE
E8 LDQS P7 A11 K9 ODT A2 NC1 N2 A3 P2 A7
H8
VSSQ1
F7 LDQS A8 UDQS
R2 A12 L8 CS E2 NC2
E7
VSSQ5 D8 VSSQ6 D2 VSSQ7 A7 VSSQ8 B8 VSSQ9 B2
VSSQ10
P9
VSS1 N1 VSS2 J3 VSS3 E3 VSS4 A3 VSS5
G9
VDDQ1 G7 VDDQ2 G3 VDDQ3 G1 VDDQ4 E9 VDDQ5 C9 VDDQ6 C7 VDDQ7 C3 VDDQ8 C1 VDDQ9 A9
VDDQ10
R1
VDD1 M9 VDD2 J9 VDD3 E1 VDD4 A1 VDD5
B9
DQ15 B1 DQ14 D9 DQ13 D1 DQ12 D3 DQ11 D7 DQ10 C2
DQ9 C8 DQ8 F9 DQ7 F1 DQ6 H9 DQ5 H1 DQ4 H3 DQ3 H7 DQ2 G2 DQ1 G8 DQ0
DDR2_D[0-15]
DDR2_CASZ
R340
56
R341
56
+1.8V_DDR
DDR2_ODT
R339
56
R342
READY
DDR2_WEZ DDR2_MCLKZ
+1.8V_DDR
R337
56
DDR2_DQS0P
C371
0.01uF
IC300
TAS5709PHPR
1
OUT_A
2
PVDD_A_1
3
PVDD_A_2
4
BST_A
5
GVDD_OUT_1
6
SSTIMER
7
OC_ADJ
8
NC
9
AVSS
10
PLL_FLTM
11
PLL_FLTP
12
VR_ANA
13
AVDD
14
TESTOUT
15
MCLK
16
OSC_RES
17
DVSS_1
18
VR_DIG
19
PDN
20
LRCLK
21
SCLK
22
SDIN
23
SDA
24
SCL
25
RESET
26
STEST
27
DVDD
28
DVSS_2
29
GND
30
AGND
31
VREG
32
GVDD_OUT_2
33
BST_D
34
PVDD_D_1
35
PVDD_D_2
36
OUT_D
37 PGND_CD_1
38 PGND_CD_2
39 OUT_C
40 PVDD_C_1
41 PVDD_C_2
42 BST_C
43 BST_B
44 PVDD_B_1
45 PVDD_B_2
46 OUT_B
47 PGND_AB_1
48 PGND_AB_2
C301
1000pF
50V
C302
0.1uF
C304
0.1uF
C313
0.047uF
C316 4700pF
C317
0.1uF
C318
1000pF
C319 4700pF
C320
0.047uF
C321 2200pF
C322
0.1uF
C380
0.1uF
C381
0.1uF
C382
0.1uF
C383
0.1uF
C384
0.1uF
C385
0.1uF
C386
0.1uF
C387
0.1uF
C388
0.1uF C389 0.1uF
C395
0.1uF
16V
R304
22
R306
22
R305
22
R307
22
C309
0.1uF
+5V_TU
C305
27pF
READY S_SDA
R311
330
R312
330 S_SCL
C308
27pF
READY
C314
0.1uF
50V TV_MAIN
Q301
ISA1530AC1
E
B
C
+5V_TU
C323
READY
MAIN_SIF
R301
4.7K
R303
READY
+17V_TI
L302
120-ohmC324
0.1uF
+17V_AMP
IC303-*1
K4T51163QG-HCE7
Samsung
J2
VREF
J8
CK
H2 VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8 VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ_4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8 VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7 VSSQ_5
D8 VSSQ_6
D2 VSSQ_7
A7 VSSQ_8
B8 VSSQ_9
B2 VSSQ_10
P9 VSS_1
N1 VSS_2
J3 VSS_3
E3 VSS_4
A3 VSS_5
G9 VDDQ_1
G7 VDDQ_2
G3 VDDQ_3
G1 VDDQ_4
E9 VDDQ_5
C9 VDDQ_6
C7 VDDQ_7
C3 VDDQ_8
C1 VDDQ_9
A9 VDDQ_10
R1 VDD_1
M9 VDD_2
J9 VDD_3
E1 VDD_4
A1 VDD_5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
P300
SMAW250-H04R
1
2
3
4
R318
270
R319
270
+17V_AMP
R334
6.8K
R332
5.6K
R335
6.8K
C392
33pF
R327
4.7K
R326
4.7K
C390
6800pF
50V
MNT_ROUT
MNT_L_AMP
C393
33pF
+17V_AMP
Q302
2SC3875S(ALY)
E
B
C
MNT_R_AMP
IC302
LM324D
3
IN1+
2
IN1-
4
VCC
1
OUT1
6
IN2-
5
IN2+
7
OUT2 8OUT3
9IN3-
10 IN3+
11 VEE/GND
12 IN4+
13 IN4-
14 OUT4
+17V_AMP
MNT_LOUT
Q303
2SC3875S(ALY)
E
B
C
R328
1K
R329
1K
C391
6800pF
50V
R333
5.6K
L307
AD-9060
EAP61008401
2S
1S 1F
2F
L308
AD-9060
EAP61008401
2S
1S 1F
2F
R330
15K 1/16W
5%
R33115K
1/16W
5%
C307
100uF
25V
C326
100uF
25V
C303
100uF
25V
C325
100uF
25V
R300
1K
C355
0.1uF
C327 1uF
C328
1uF
TU300
TAFJ-Z001D(P)
5MOPLL_AS
11 VIDEO
2NC_2
10 NC_4
4RF_AGC
1NC_1
9SIF
8NC_3
3+B[5V]
7SDA
6SCL
12 GND
13
SHIELD
TU300-*1
TAFJ-S001D(P)
PAL EU Tuner
5MOPLL_AS
11 VIDEO
2NC_2
10 NC_4
4RF_AGC
1NC_1
9SIF
8NC_3
3+B[5V]
7SDA
6SCL
12 GND
13
SHIELD
TU300-*2
TAFJ-H001F(P)
5MOPLL_AS
11 VIDEO
2NC_2
10 NC_4
4RF_AGC
1NC_1
9SIF
8NC_3
3+B[5V]
7SDA
6SCL
12 GND
13
SHIELD
C364
0.47uF
C363
0.47uF
This parts are Located
on AVSS area.
Separate DGND AND AVSS
Close to DDR2 IC
DDR Memory for Main IC
Audio Amp Tuner(7mm)
Gaim Amp for MNT out
EAX64103901(BPR)
H6 Revolution Circuit Diagram
3 4Tuner/Amp/DDR
H6RR
AMP :GAIN X 4
2010/11/1
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Main
DDR2_D[3]
DDR2_D[1]
DDR2_D[6]
DDR2_A[0] DDR2_A[2] DDR2_A[4] DDR2_A[6] DDR2_A[1] DDR2_A[10]
DDR2_D[11]
DDR2_A[5]
DDR2_D[12]
DDR2_D[9]
DDR2_D[14]
DDR2_A[3] DDR2_A[7] DDR2_A[12] DDR2_A[9]
DDR2_D[15]
DDR2_D[8]
DDR2_D[10]
DDR2_D[13]
DDR2_D[7]
DDR2_D[0]
DDR2_D[2]
DDR2_D[5]
DDR2_A[8] DDR2_A[11]
DDR2_D[4]
TXCO4-
TXCO3+
TXCLKO+
TXCLKO-
TXCO2+
TXCO2-
TXCO3-
TXCO1+
TXCO1-
TXCO0+
TXCO0-
TXCO4+
TXCE4- TXCE3+ TXCE3- TXCLKE+ TXCLKE- TXCE2+ TXCE2- TXCE1+ TXCE4+
TXCE1-
TXCE0+ TXCE0-
R410
22
1/16W
5%
+3.3V_MST
TMDS1_RX0+
C425 0.047uF
PC_R
DDR2_DQS0P
TMDS3_RX0+
C465
0.1uF
C410 0.1uF
A_SDA
C431 0.047uF
C459 0.01uF 25V
AR409
56
SYS_RESET
C417 2.2uF
C422 0.047uF
R438 100
+3.3V_MST
+3.3V_MST
DDC_SDA3
AR406
56
HPD_MST_3
COMP1_L
TMDS3_RX0-
TMDS2_RXC-
R448 100
R468 4.7K
DDR2_D[0-15]
P_SDA
R442
100
+3.3V_MST
SIDE_RIN
+3.3V_MPLL
TV_MAIN
DDR2_DQM0
M_SCL
C424 0.047uF
C453
0.01uF
25V
R440100
R427 470
SPI_CZ
C434 0.047uF
R473
1K
READY
TXD
C405
0.1uF
16V
C423 0.047uF
SIDE_LIN
C428 0.047uF
SC1_LIN
TMDS1_RX2+
TMDS3_RX2- SW_RESET
COMP2_R
AR405
10
1/16W
COMP2_PB
C457
0.01uF
25V
TMDS1_RX0-
PC_VS
FLASH_WP
C436 0.047uF
25V
R451
22
1/10W
5%
PC_AUD_R
AR411 56
C460
0.01uF
25V
C440 1000pF
R401
4.7K
SPI_CZ
M_SCL
C471
0.1uF
16V
R435 22K
C427 0.047uF
R467 22
1/16W
5%
DDC_SCL1
R476
1K
READY
DISP_EN
TOUCH_VER_CHK
DDC_SCL3
C421 0.047uF
C467
0.1uF
TMDS2_RX2-
COMP1_PR
R452 4.7K
DDR2_MCLKZ
COMP2_L
+1.8V_DDR
P_SCL
C411
0.1uF
DDR2_DQS1M
RL_ON/POWER_ON
IC403-*2
LGE4765A (Matrix basic_NON_SRS)
MATRIX BASIC
1
RXBCKN
2
RXBCKP
3
RXB0N
4
RXB0P
5
HOTPLUGB
6
RXB1N
7
RXB1P
8
AVDD_33_1
9
RXB2N
10
RXB2P
11
RXACKN
12
RXACKP
13
RXA0N
14
RXA0P
15
AVDD_33_2
16
RXA1N
17
RXA1P
18
GND_1
19
RXA2N
20
RXA2P
21
HOTPLUGA
22
REXT
23
VCLAMP
24
REFP
25
REFM
26
BIN1P
27
SOGIN1
28
GIN1P
29
RIN1P
30
BINM
31
BIN0P
32
GINM
33
GIN0P
34
SOGIN0
35
RINM
36
RIN0P
37
AVDD_33_3
38
GND_2
39
BIN2P
40
GIN2P
41
SOGIN2
42
RIN2P
43
CVBS6
44
CVBS5
45
CVBS4
46
CVBS3
47
CVBS2
48
CVBS1
49
VCOM1
50
CVBS0
51
VCOM0
52
AVDD_33_4
53
CVBSOUT
54
GND_3
55
SIF0P
56
SIF0M
57
VDDC_1
58
AUL5
59
AUR5
60
AUVRM
61
AUOUTL2
62
AUOUTR2
63
AUOUTL1
64
AUOUTR1
65
AUL0
66
AUR0
67
AUL1
68
AUR1
69
AUL2
70
AUR2
71
AUL3
72
AUR3
73
AUCOM
74
AUL4
75
AUR4
76
GND_4
77
AUVRP
78
AUVAG
79
AVDD_AU
80
GND_5
81
VDDC_2
82
DDCA_CK
83
DDCA_DA
84
DDCDA_CK
85
DDCDA_DA
86
DDCDB_CK
87
DDCDB_DA
88
GPIO20
89
VDDP_1
90
VDDC_3
91
UART2_RX
92
UART2_TX
93
DDCDC_CK
94
RXCCKN
95
RXCCKP
96
DDCDC_DA
97
RXC0N
98
RXC0P
99
GND_6
100
RXC1N
101
RXC1P
102
AVDD_DM
103
RXC2N
104
RXC2P
105
HOTPLUGC
106
USB1_DM
107
USB1_DP
108
SCK
109
SDI
110
SDO
111
SCZ
112
PWM0
113
PWM1
114
PWM2
115
PWM3
116
LVA4P
117
LVA4M
118
LVA3P
119
LVA3M
120
LVACKP
121
LVACKM
122
LVA2P
123
LVA2M
124
LVA1P
125
LVA1M
126
LVA0P
127
LVA0M
128
VDDP_2
129 LVB4P
130 LVB4M
131 LVB3P
132 LVB3M
133 LVBCKP
134 LVBCKM
135 LVB2P
136 LVB2M
137 LVB1P
138 LVB1M
139 LVB0P
140 LVB0M
141 AVDD_LPLL
142 GND_7
143 VDDC_4
144 GPIO150/I2C_OUT_MUTE
145 GPIO151/I2C_OUT_SD2
146 GPIO152/I2C_OUT_SD3
147 GND_8
148 GPIO51
149 GPIO52
150 GPIO53
151 GPIO54
152 GPIO55
153 GPIO56
154 GPIO57
155 GPIO58
156 VDDP_3
157 VDDC_5
158 B_MDATA[4]
159 B_MDATA[3]
160 GND_9
161 B_MDATA[1]
162 B_MDATA[6]
163 AVDD_DDR_1
164 B_MDATA[11]
165 B_MDATA[12]
166 GND_10
167 B_MDATA[9]
168 B_MDATA[14]
169 AVDD_DDR_2
170 B_DDR2_DQM[1]
171 B_DDR2_DQM[0]
172 GND_11
173 B_DDR2_DQS[0]
174 B_DDR2_DQSB[0]
175 AVDD_DDR_3
176 VDDP_4
177 GND_12
178 B_DDR2_DQS[1]
179 B_DDR2_DQSB[1]
180 AVDD_DDR_4
181 B_MDATA[15]
182 B_MDATA[8]
183 GND_13
184 B_MDATA[10]
185 B_MDATA[13]
186 AVDD_DDR_5
187 B_MDATA[7]
188 B_MDATA[0]
189 B_MDATA[2]
190 B_MDATA[5]
191 B_MCLK
192 B_MCLKZ
193 GND_14 194 AVDD_MEMPLL 195 MVREF 196 A_ODT 197 A_RASZ 198 A_CASZ 199 A_MADR[0] 200 A_MADR[2] 201 A_MADR[4] 202 GND_15 203 A_MADR[6] 204 A_MADR[8] 205 A_MADR[11] 206 A_WEZ 207 A_BADR[1] 208 A_BADR[0] 209 A_MADR[1] 210 A_MADR[10] 211 AVDD_DDR_6 212 A_MADR[5] 213 A_MADR[9] 214 A_MADR[12] 215 A_MADR[7] 216 A_MADR[3] 217 A_MCLKE 218 VDDC_6 219 I2S_IN_WS/GPIO67 220 I2S_IN_BCK/GPIO68 221 I2S_IN_SD 222 I2S_OUT_MCK 223 I2S_OUT_WS 224 VDDP_5 225 GND_16 226 VDDC_7 227 I2S_OUT_BCK 228 I2S_OUT_SD 229 SPDIFO 230 UART2_RX/I2CM_SDA 231 UART2_TX/I2CM_SCK 232 UART1_RX/GPIO86 233 UART1_TX/GPIO87 234 GND_17 235 GND_18 236 USB0_DM 237 USB0_DP 238 SAR0 239 SAR1 240 SAR2 241 SAR3 242 AVDD_MPLL 243 XOUT 244 XIN 245 GPIO134 246 GPIO135 247 GPIO138 248 GPIO139 249 GPIO140 250 IRIN 251 HSYNC0 252 VSYNC0 253 HSYNC1 254 VSYNC1 255 CEC 256 HWRESET
C461
0.1uF 16V
TMDS3_RX1-
PC_B
C439 0.1uF
R411
4.7K
C442 1000pF
C438
1000pF
TMDS2_RX2+
EYE_SCL
R405
33K
C472
0.01uF
25V
TMDS2_RX0+
COMP1_PB
+3.3V_MST
RXD
R454
22
1/10W
5%
M_SDA
C470
0.01uF
25V
C420 0.1uF
+3.3V_MST
R413 47
C429 0.047uF
R418 47
R460
100
C419 0.1uF
C415
0.1uF
DDR2_DQS0M
M5V_ON
C402
0.1uF
R439
100
ERROR_DET
C435 0.047uF
C468
0.01uF
25V
AR401
10
1/16W
TMDS2_RX1+
TMDS1_RXC-
C412
10uF
DDR2_A[0-12]
R412 47
C407 0.1uF
DDR2_MCLK
R459 22
1/16W 5%
R428
47
DDR2_RASZ
C414 0.01uF
25V
+3.3V_MPLL
C406 0.1uF
C462
0.01uF
25V
C408 0.1uF
R432 47
SPI_CLK
SPI_DI
R463
22
KEY1
C403
4.7uF
10V
SPI_DO
R447
22
SC1_RIN PC_AUD_L
C458
0.01uF
25V
C464
0.01uF
25V
S_SCL
C452 0.1uF
IC401
CAT24WC08W-T
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
USB_DN
C432 0.047uF
AR414
56
SC1_VIN
D401
KDS181
R465
100
READY
IC403-*1
LGE4766A (Matrix Only MP3_NON SRS)
MATRIX_ONLY MP3
1
RXBCKN
2
RXBCKP
3
RXB0N
4
RXB0P
5
HOTPLUGB
6
RXB1N
7
RXB1P
8
AVDD_33_1
9
RXB2N
10
RXB2P
11
RXACKN
12
RXACKP
13
RXA0N
14
RXA0P
15
AVDD_33_2
16
RXA1N
17
RXA1P
18
GND_1
19
RXA2N
20
RXA2P
21
HOTPLUGA
22
REXT
23
VCLAMP
24
REFP
25
REFM
26
BIN1P
27
SOGIN1
28
GIN1P
29
RIN1P
30
BINM
31
BIN0P
32
GINM
33
GIN0P
34
SOGIN0
35
RINM
36
RIN0P
37
AVDD_33_3
38
GND_2
39
BIN2P
40
GIN2P
41
SOGIN2
42
RIN2P
43
CVBS6
44
CVBS5
45
CVBS4
46
CVBS3
47
CVBS2
48
CVBS1
49
VCOM1
50
CVBS0
51
VCOM0
52
AVDD_33_4
53
CVBSOUT
54
GND_3
55
SIF0P
56
SIF0M
57
VDDC_1
58
AUL5
59
AUR5
60
AUVRM
61
AUOUTL2
62
AUOUTR2
63
AUOUTL1
64
AUOUTR1
65
AUL0
66
AUR0
67
AUL1
68
AUR1
69
AUL2
70
AUR2
71
AUL3
72
AUR3
73
AUCOM
74
AUL4
75
AUR4
76
GND_4
77
AUVRP
78
AUVAG
79
AVDD_AU
80
GND_5
81
VDDC_2
82
DDCA_CK
83
DDCA_DA
84
DDCDA_CK
85
DDCDA_DA
86
DDCDB_CK
87
DDCDB_DA
88
GPIO20
89
VDDP_1
90
VDDC_3
91
UART2_RX
92
UART2_TX
93
DDCDC_CK
94
RXCCKN
95
RXCCKP
96
DDCDC_DA
97
RXC0N
98
RXC0P
99
GND_6
100
RXC1N
101
RXC1P
102
AVDD_DM
103
RXC2N
104
RXC2P
105
HOTPLUGC
106
USB1_DM
107
USB1_DP
108
SCK
109
SDI
110
SDO
111
SCZ
112
PWM0
113
PWM1
114
PWM2
115
PWM3
116
LVA4P
117
LVA4M
118
LVA3P
119
LVA3M
120
LVACKP
121
LVACKM
122
LVA2P
123
LVA2M
124
LVA1P
125
LVA1M
126
LVA0P
127
LVA0M
128
VDDP_2
129 LVB4P
130 LVB4M
131 LVB3P
132 LVB3M
133 LVBCKP
134 LVBCKM
135 LVB2P
136 LVB2M
137 LVB1P
138 LVB1M
139 LVB0P
140 LVB0M
141 AVDD_LPLL
142 GND_7
143 VDDC_4
144 GPIO150/I2C_OUT_MUTE
145 GPIO151/I2C_OUT_SD2
146 GPIO152/I2C_OUT_SD3
147 GND_8
148 GPIO51
149 GPIO52
150 GPIO53
151 GPIO54
152 GPIO55
153 GPIO56
154 GPIO57
155 GPIO58
156 VDDP_3
157 VDDC_5
158 B_MDATA[4]
159 B_MDATA[3]
160 GND_9
161 B_MDATA[1]
162 B_MDATA[6]
163 AVDD_DDR_1
164 B_MDATA[11]
165 B_MDATA[12]
166 GND_10
167 B_MDATA[9]
168 B_MDATA[14]
169 AVDD_DDR_2
170 B_DDR2_DQM[1]
171 B_DDR2_DQM[0]
172 GND_11
173 B_DDR2_DQS[0]
174 B_DDR2_DQSB[0]
175 AVDD_DDR_3
176 VDDP_4
177 GND_12
178 B_DDR2_DQS[1]
179 B_DDR2_DQSB[1]
180 AVDD_DDR_4
181 B_MDATA[15]
182 B_MDATA[8]
183 GND_13
184 B_MDATA[10]
185 B_MDATA[13]
186 AVDD_DDR_5
187 B_MDATA[7]
188 B_MDATA[0]
189 B_MDATA[2]
190 B_MDATA[5]
191 B_MCLK
192 B_MCLKZ
193 GND_14 194 AVDD_MEMPLL 195 MVREF 196 A_ODT 197 A_RASZ 198 A_CASZ 199 A_MADR[0] 200 A_MADR[2] 201 A_MADR[4] 202 GND_15 203 A_MADR[6] 204 A_MADR[8] 205 A_MADR[11] 206 A_WEZ 207 A_BADR[1] 208 A_BADR[0] 209 A_MADR[1] 210 A_MADR[10] 211 AVDD_DDR_6 212 A_MADR[5] 213 A_MADR[9] 214 A_MADR[12] 215 A_MADR[7] 216 A_MADR[3] 217 A_MCLKE 218 VDDC_6 219 I2S_IN_WS/GPIO67 220 I2S_IN_BCK/GPIO68 221 I2S_IN_SD 222 I2S_OUT_MCK 223 I2S_OUT_WS 224 VDDP_5 225 GND_16 226 VDDC_7 227 I2S_OUT_BCK 228 I2S_OUT_SD 229 SPDIFO 230 UART2_RX/I2CM_SDA 231 UART2_TX/I2CM_SCK 232 UART1_RX/GPIO86 233 UART1_TX/GPIO87 234 GND_17 235 GND_18 236 USB0_DM 237 USB0_DP 238 SAR0 239 SAR1 240 SAR2 241 SAR3 242 AVDD_MPLL 243 XOUT 244 XIN 245 GPIO134 246 GPIO135 247 GPIO138 248 GPIO139 249 GPIO140 250 IRIN 251 HSYNC0 252 VSYNC0 253 HSYNC1 254 VSYNC1 255 CEC 256 HWRESET
DDR2_WEZ
MNT_R_AMP
R429
47
1/16W
5%
C400
0.01uF
25V
TMDS2_RX1-
HPD_MST_2
R450 4.7K
V_REF
C418 2.2uF
IR
COMP2_Y
R469
100
C430 0.047uF
R455
1K
SPI_DO
R421 47
R414 22K
+3.3V_MST
R400
4.7K
TMDS2_RX0-
KEY2
MUTE_LINE
C441 1000pF
IC403-*3
LGE4768A (Matrix Only SD Divx_RM_NON SRS)
MATRIX_SD DIVX_RM
1
RXBCKN
2
RXBCKP
3
RXB0N
4
RXB0P
5
HOTPLUGB
6
RXB1N
7
RXB1P
8
AVDD_33_1
9
RXB2N
10
RXB2P
11
RXACKN
12
RXACKP
13
RXA0N
14
RXA0P
15
AVDD_33_2
16
RXA1N
17
RXA1P
18
GND_1
19
RXA2N
20
RXA2P
21
HOTPLUGA
22
REXT
23
VCLAMP
24
REFP
25
REFM
26
BIN1P
27
SOGIN1
28
GIN1P
29
RIN1P
30
BINM
31
BIN0P
32
GINM
33
GIN0P
34
SOGIN0
35
RINM
36
RIN0P
37
AVDD_33_3
38
GND_2
39
BIN2P
40
GIN2P
41
SOGIN2
42
RIN2P
43
CVBS6
44
CVBS5
45
CVBS4
46
CVBS3
47
CVBS2
48
CVBS1
49
VCOM1
50
CVBS0
51
VCOM0
52
AVDD_33_4
53
CVBSOUT
54
GND_3
55
SIF0P
56
SIF0M
57
VDDC_1
58
AUL5
59
AUR5
60
AUVRM
61
AUOUTL2
62
AUOUTR2
63
AUOUTL1
64
AUOUTR1
65
AUL0
66
AUR0
67
AUL1
68
AUR1
69
AUL2
70
AUR2
71
AUL3
72
AUR3
73
AUCOM
74
AUL4
75
AUR4
76
GND_4
77
AUVRP
78
AUVAG
79
AVDD_AU
80
GND_5
81
VDDC_2
82
DDCA_CK
83
DDCA_DA
84
DDCDA_CK
85
DDCDA_DA
86
DDCDB_CK
87
DDCDB_DA
88
GPIO20
89
VDDP_1
90
VDDC_3
91
UART2_RX
92
UART2_TX
93
DDCDC_CK
94
RXCCKN
95
RXCCKP
96
DDCDC_DA
97
RXC0N
98
RXC0P
99
GND_6
100
RXC1N
101
RXC1P
102
AVDD_DM
103
RXC2N
104
RXC2P
105
HOTPLUGC
106
USB1_DM
107
USB1_DP
108
SCK
109
SDI
110
SDO
111
SCZ
112
PWM0
113
PWM1
114
PWM2
115
PWM3
116
LVA4P
117
LVA4M
118
LVA3P
119
LVA3M
120
LVACKP
121
LVACKM
122
LVA2P
123
LVA2M
124
LVA1P
125
LVA1M
126
LVA0P
127
LVA0M
128
VDDP_2
129 LVB4P
130 LVB4M
131 LVB3P
132 LVB3M
133 LVBCKP
134 LVBCKM
135 LVB2P
136 LVB2M
137 LVB1P
138 LVB1M
139 LVB0P
140 LVB0M
141 AVDD_LPLL
142 GND_7
143 VDDC_4
144 GPIO150/I2C_OUT_MUTE
145 GPIO151/I2C_OUT_SD2
146 GPIO152/I2C_OUT_SD3
147 GND_8
148 GPIO51
149 GPIO52
150 GPIO53
151 GPIO54
152 GPIO55
153 GPIO56
154 GPIO57
155 GPIO58
156 VDDP_3
157 VDDC_5
158 B_MDATA[4]
159 B_MDATA[3]
160 GND_9
161 B_MDATA[1]
162 B_MDATA[6]
163 AVDD_DDR_1
164 B_MDATA[11]
165 B_MDATA[12]
166 GND_10
167 B_MDATA[9]
168 B_MDATA[14]
169 AVDD_DDR_2
170 B_DDR2_DQM[1]
171 B_DDR2_DQM[0]
172 GND_11
173 B_DDR2_DQS[0]
174 B_DDR2_DQSB[0]
175 AVDD_DDR_3
176 VDDP_4
177 GND_12
178 B_DDR2_DQS[1]
179 B_DDR2_DQSB[1]
180 AVDD_DDR_4
181 B_MDATA[15]
182 B_MDATA[8]
183 GND_13
184 B_MDATA[10]
185 B_MDATA[13]
186 AVDD_DDR_5
187 B_MDATA[7]
188 B_MDATA[0]
189 B_MDATA[2]
190 B_MDATA[5]
191 B_MCLK
192 B_MCLKZ
193 GND_14 194 AVDD_MEMPLL 195 MVREF 196 A_ODT 197 A_RASZ 198 A_CASZ 199 A_MADR[0] 200 A_MADR[2] 201 A_MADR[4] 202 GND_15 203 A_MADR[6] 204 A_MADR[8] 205 A_MADR[11] 206 A_WEZ 207 A_BADR[1] 208 A_BADR[0] 209 A_MADR[1] 210 A_MADR[10] 211 AVDD_DDR_6 212 A_MADR[5] 213 A_MADR[9] 214 A_MADR[12] 215 A_MADR[7] 216 A_MADR[3] 217 A_MCLKE 218 VDDC_6 219 I2S_IN_WS/GPIO67 220 I2S_IN_BCK/GPIO68 221 I2S_IN_SD 222 I2S_OUT_MCK 223 I2S_OUT_WS 224 VDDP_5 225 GND_16 226 VDDC_7 227 I2S_OUT_BCK 228 I2S_OUT_SD 229 SPDIFO 230 UART2_RX/I2CM_SDA 231 UART2_TX/I2CM_SCK 232 UART1_RX/GPIO86 233 UART1_TX/GPIO87 234 GND_17 235 GND_18 236 USB0_DM 237 USB0_DP 238 SAR0 239 SAR1 240 SAR2 241 SAR3 242 AVDD_MPLL 243 XOUT 244 XIN 245 GPIO134 246 GPIO135 247 GPIO138 248 GPIO139 249 GPIO140 250 IRIN 251 HSYNC0 252 VSYNC0 253 HSYNC1 254 VSYNC1 255 CEC 256 HWRESET
R403
100
DDR2_BA0
DDR2_DQS1P
PC_HS
R475
1K
IC402
W25X64VSFIG
3
NC_1
2
VCC
4
NC_2
1
HOLD
6
NC_4
5
NC_3
7
CS
8
DO 9WP
10 GND
11 NC_5
12 NC_6
13 NC_7
14 NC_8
15 DIO
16 CLK
+3.3V_MST
IC403
LGE4767A (Matrix SD Divx_ Non RM_NON SRS)
SD Divx_NON RM/SRS
1
RXBCKN
2
RXBCKP
3
RXB0N
4
RXB0P
5
HOTPLUGB
6
RXB1N
7
RXB1P
8
AVDD_33_1
9
RXB2N
10
RXB2P
11
RXACKN
12
RXACKP
13
RXA0N
14
RXA0P
15
AVDD_33_2
16
RXA1N
17
RXA1P
18
GND_1
19
RXA2N
20
RXA2P
21
HOTPLUGA
22
REXT
23
VCLAMP
24
REFP
25
REFM
26
BIN1P
27
SOGIN1
28
GIN1P
29
RIN1P
30
BINM
31
BIN0P
32
GINM
33
GIN0P
34
SOGIN0
35
RINM
36
RIN0P
37
AVDD_33_3
38
GND_2
39
BIN2P
40
GIN2P
41
SOGIN2
42
RIN2P
43
CVBS6
44
CVBS5
45
CVBS4
46
CVBS3
47
CVBS2
48
CVBS1
49
VCOM1
50
CVBS0
51
VCOM0
52
AVDD_33_4
53
CVBSOUT
54
GND_3
55
SIF0P
56
SIF0M
57
VDDC_1
58
AUL5
59
AUR5
60
AUVRM
61
AUOUTL2
62
AUOUTR2
63
AUOUTL1
64
AUOUTR1
65
AUL0
66
AUR0
67
AUL1
68
AUR1
69
AUL2
70
AUR2
71
AUL3
72
AUR3
73
AUCOM
74
AUL4
75
AUR4
76
GND_4
77
AUVRP
78
AUVAG
79
AVDD_AU
80
GND_5
81
VDDC_2
82
DDCA_CK
83
DDCA_DA
84
DDCDA_CK
85
DDCDA_DA
86
DDCDB_CK
87
DDCDB_DA
88
GPIO20
89
VDDP_1
90
VDDC_3
91
UART2_RX
92
UART2_TX
93
DDCDC_CK
94
RXCCKN
95
RXCCKP
96
DDCDC_DA
97
RXC0N
98
RXC0P
99
GND_6
100
RXC1N
101
RXC1P
102
AVDD_DM
103
RXC2N
104
RXC2P
105
HOTPLUGC
106
USB1_DM
107
USB1_DP
108
SCK
109
SDI
110
SDO
111
SCZ
112
PWM0
113
PWM1
114
PWM2
115
PWM3
116
LVA4P
117
LVA4M
118
LVA3P
119
LVA3M
120
LVACKP
121
LVACKM
122
LVA2P
123
LVA2M
124
LVA1P
125
LVA1M
126
LVA0P
127
LVA0M
128
VDDP_2
129 LVB4P
130 LVB4M
131 LVB3P
132 LVB3M
133 LVBCKP
134 LVBCKM
135 LVB2P
136 LVB2M
137 LVB1P
138 LVB1M
139 LVB0P
140 LVB0M
141 AVDD_LPLL
142 GND_7
143 VDDC_4
144 GPIO150/I2C_OUT_MUTE
145 GPIO151/I2C_OUT_SD2
146 GPIO152/I2C_OUT_SD3
147 GND_8
148 GPIO51
149 GPIO52
150 GPIO53
151 GPIO54
152 GPIO55
153 GPIO56
154 GPIO57
155 GPIO58
156 VDDP_3
157 VDDC_5
158 B_MDATA[4]
159 B_MDATA[3]
160 GND_9
161 B_MDATA[1]
162 B_MDATA[6]
163 AVDD_DDR_1
164 B_MDATA[11]
165 B_MDATA[12]
166 GND_10
167 B_MDATA[9]
168 B_MDATA[14]
169 AVDD_DDR_2
170 B_DDR2_DQM[1]
171 B_DDR2_DQM[0]
172 GND_11
173 B_DDR2_DQS[0]
174 B_DDR2_DQSB[0]
175 AVDD_DDR_3
176 VDDP_4
177 GND_12
178 B_DDR2_DQS[1]
179 B_DDR2_DQSB[1]
180 AVDD_DDR_4
181 B_MDATA[15]
182 B_MDATA[8]
183 GND_13
184 B_MDATA[10]
185 B_MDATA[13]
186 AVDD_DDR_5
187 B_MDATA[7]
188 B_MDATA[0]
189 B_MDATA[2]
190 B_MDATA[5]
191 B_MCLK
192 B_MCLKZ
193 GND_14 194 AVDD_MEMPLL 195 MVREF 196 A_ODT 197 A_RASZ 198 A_CASZ 199 A_MADR[0] 200 A_MADR[2] 201 A_MADR[4] 202 GND_15 203 A_MADR[6] 204 A_MADR[8] 205 A_MADR[11] 206 A_WEZ 207 A_BADR[1] 208 A_BADR[0] 209 A_MADR[1] 210 A_MADR[10] 211 AVDD_DDR_6 212 A_MADR[5] 213 A_MADR[9] 214 A_MADR[12] 215 A_MADR[7] 216 A_MADR[3] 217 A_MCLKE 218 VDDC_6 219 I2S_IN_WS/GPIO67 220 I2S_IN_BCK/GPIO68 221 I2S_IN_SD 222 I2S_OUT_MCK 223 I2S_OUT_WS 224 VDDP_5 225 GND_16 226 VDDC_7 227 I2S_OUT_BCK 228 I2S_OUT_SD 229 SPDIFO 230 UART2_RX/I2CM_SDA 231 UART2_TX/I2CM_SCK 232 UART1_RX/GPIO86 233 UART1_TX/GPIO87 234 GND_17 235 GND_18 236 USB0_DM 237 USB0_DP 238 SAR0 239 SAR1 240 SAR2 241 SAR3 242 AVDD_MPLL 243 XOUT 244 XIN 245 GPIO134 246 GPIO135 247 GPIO138 248 GPIO139 249 GPIO140 250 IRIN 251 HSYNC0 252 VSYNC0 253 HSYNC1 254 VSYNC1 255 CEC 256 HWRESET
M_SCL
+3.3V_MST
R425 47
DDC_SCL2
C401
0.1uF
DDR2_CKE
R471 22
+1.2V_MST
R466
100
SPI_CLK
ISP_RX
C4472.2uF
R434 47
R420 47
M_SDA
R449 100
RXD TXD
R424 47
M_SDA
+3.3V_MST
USB_DP
+1.8V_DDR
C413 0.01uF
25V
R443
100
C409
10uF
MAIN_SIF
AR403
10
1/16W
C450
2.2uF
R477 4.7K
AR402
10
1/16W
PC_G
DSUB_SCL
R408
100
TMDS3_RXC+
R461 56
C45420pF
+1.2V_MST
A_SCL
C404
0.01uF
25V
DDR2_BA1
C4452.2uF
C426 0.047uF
COMP1_Y
TMDS1_RX2-
MNT_L_AMP
AR412
56
AR408
56
R417 47
ROM_TX
R445
100
R436 390
SIDE_VIN
AR404
10
1/16W
R487 4.7K
R422 47
AR400
10
1/16W
R474
1K
R470 22
1/16W
5%
R441100
ROM_RX
TMDS3_RXC-
R419 470
R426 47
AR407 22
1/16W
SYS_RESET
R431 47
TMDS3_RX1+
R444
1M
+3.3V_MST
DSUB_SDA
R456 4.7K
R415 47
AR415
56
I2S_MCLK
X400
12MHz
R446 100
COMP1_R
R430 47
I2S_SCK I2S_SDO
CEC_C
I2S_WS
DDR2_DQM1
C416 0.01uF
25V
C4482.2uF C4462.2uF
HPD_MST_1
DDC_SDA2
C433 0.047uF
TMDS1_RX1-
R464
100
S_SDA
EYE_SDA
R416 47
IC400
AT24C64CN-SH-T
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
AR410
56
R433 470
R458 4.7K
C437 0.047uF
25V
+3.3V_MST
R453 100
TMDS1_RXC+
FLASH_WP
LED_R
C45520pF
DDR2_CASZ
R437 100
C443
4.7uF
AR413
56
C466
0.01uF
25V
C456
0.01uF
25V
C469
0.1uF
16V
R472 22
R423 47
COMP2_PR
TMDS2_RXC+
R409
100
R478 4.7K
TMDS1_RX1+
R457 22
1/16W 5%
C463
0.1uF
DDR2_ODT
C451
2.2uF
+3.3V_MST
C4492.2uF
DDC_SDA1
TMDS3_RX2+
SPI_DI
C444
2.2uF
5V
SCART_AUDIO IN
3.3V
Close to IC
with width trace
HDMI_2
scart RGB INPUT
I2S_OUT
3.3V
MOVING LED
HDMI_3
SCART H\V SYNC
PCM 5V
USB PART T2
[MODE SELECTION]
3.3V
Close to IC as close as
possible with width trace
3.3V
S-VIDEO
Close to IC as close as possible
HDMI_1
Close to IC as close as possible
SCART_CVBS
FLASH
3.3V
5V
5V
3.3V
5V
5V5V
SUB MICOM
SCART_AUDIO out
Main Flash Memory
Main EEPROM
HDCP EEPROM
4 4Main
ROM D/L
RX,TX
FHD LVDS
HD LVDS
EAX64103901(BPR)
H6 Revolution Circuit Diagram
H6RR 2010/11/1
MStar Reset
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only

Making
Repair Process
Revision
PDP TV Symptom A. Picture Problem
No Picture/Sound OK
1
Check Module pattern
by using “TILT” key
on SVC R/C Normal
N
Check
Vs, Va Y
Normal
N
Check voltage
. -VY
. VSC
. VZB
※Refer to the Module label for each voltage
Y
N
1. Check Y-Sus/ Z-Sus Board
2. Replace defective B/D
Check B+ Voltage
on Power Board
/ Control Board
.Check B+(5V)
Y
1.Check Control Board
. LED on
. Crystal(X400)
. 1.8V, 3.3V,1.2V 5V FET
. Rom update
2.Replace Control B/D
<SVC R/C & Pattern>
Check
Sound Sound
OK
YClose Y
Move
No Picture/No sound
Section
Check
LVDS Cable
Replace
Main B/D
Normal
N
Y
N
Move
Power problem
Section
Normal Normal
Move
Power problem
Section
N
-VYVSC VZB
First of all, Check whether all of cable between board was inserted properly or not.
(Main B/D↔Power B/D, Power B/D↔Y-sus B/D,Y-Sus B/D ↔Z-Sus B/D,LVDS Cable,Speaker Cable,IR B/D Cable,,,)

Check IR operation
Power
LED ON?
Latest S/W update
from GCSC
(Firmware Management)
N
YOSD
appear? Y
N
Y
N
Close
Making
Revision
PDP TV Symptom A. Picture Problem
No Picture/No Sound
Repair Process
Check Module pattern
by using “TILT” key
on SVC R/C Normal
N
Check
Sound Sound
OK
Y
N
Move
No Picture/ Sound Ok
Section
Close
YCheck
LVDS Cable
Replace
Main B/D
Normal Y
N
Replace
Main B/D
Normal
Check Input signal
. RF Cable connection
. SCART Cable connection
. HDMI Cable connection
. Component Cable …
2
Normal
Y
NRepair/Replace
IR B/D