Linear Technology LTM4636 User manual

LTM4636
1
4636f
For more information www.linear.com/LTM4636
Typical applicaTion
DescripTion
40A DC/DC µModule
Regulator
The LTM
®
4636 is a 40A step-down µModule (power
module) switching regulator with a stacked inductor as a
heat sink for quicker heat dissipation and cooler operation
in a small package. The exposed inductor permits direct
contact with airflow from any direction. The LTM4636
can deliver 40W(12VIN, 1VOUT, 40A, 200LFM) with only
40°C rise over the ambient temperature. Full-power 40W
is delivered, up to 83°C ambient and half-power 20W is
supported at 110°C ambient.
The LTM4636 operates at 92%, 90% and 88% efficiency,
delivering 15A, 30A and 40A, respectively, to a 1V load
(12VIN). The µModule regulator is scalable such that four
µModules in current sharing mode deliver 160W with only
40°C rise and 88% efficiency (12VIN, 1VOUT, 400LFM).
The LTM4636 is offered in a 16mm × 16mm × 7.07mm
BGA package.
L, LT, LTC, LTM, PolyPhase, Burst Mode, µModule, Linear Technology, LTpowerCAD and the
Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners. Protected by U.S. Patents, including 5481178,
5847554, 6580258, 6304066, 6476589, 6774611, 6677210, 8163643.
1V, 40A DC/DC µModule Regulator
FeaTures
applicaTions
nStacked Inductor Acts as Heat Sink
nWide Input Voltage Range: 4.7V to 15V
n0.6V to 3.3V Output Voltage Range
n±1.3% Total DC Output Voltage Error Over Line,
Load and Temperature (–40°C to 125°C)
nDifferential Remote Sense Amplifier for Precision
Regulation
nCurrent Mode Control/Fast Transient Response
nFrequency Synchronization
nParallel Current Sharing (Up to 240A)
nInternal or External Compensation
n88% Efficiency (12VIN, 1VOUT) at 40A
nOvercurrent Foldback Protection
n16mm ×16mm ×7.07mm BGA Package
nTelecom Servers and Networking Equipment
nIndustrial Equipment and Medical Systems
12VIN , 1VOUT Efficiency
vs Output Current
RUNC
RUNP
HIZREG
FREQ
TEMP+TEMP–SGND
VIN
1V
34.8k
22µF
0.1µF
22µF
16V
×5
4.70V TO
15V
100µF
25V
INTVCC
PVCC
V
IN
≤ 5.5V, TIE V
IN
, INTV
CC
AND PV
CC
TOGETHER, TIE RUNP TO GND.
VIN > 5.5V, THEN OPERATE AS SHOWN
OPTIONAL TEMP MONITOR
INTVCC
INTVCC
PVCC
LTM4636
PVCC
PGND
VOUTS1+
VOUT
VOUTS1–
VFB
+
470µF
6.3V
×3
+
7.5k
100µF
6.3V
×4
VOUT
1V,
40A
4636 TA01a
PINS NOT USED IN THIS CIRCUIT:
CLKOUT, GMON, PGOOD, PHMODE, PWM,
SW, TEST1, TEST2, TEST3, TEST4, TMON
COMPA
COMPB
SNSP1
SNSP2
MODE/PLLIN
TRACK/SS
15k
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
90
95
100
15 25
4636 TA01b
85
80
5 10 20 30
40
35
75
70

LTM4636
2
4636f
For more information www.linear.com/LTM4636
absoluTe MaxiMuM raTings
VIN, SW, HZBREG, RUNP ........................... –0.3V to 16V
VOUT.......................................................... –0.3V to 3.5V
PGOOD, RUNC, TMON, PVCC, MODE/PLLIN, PHMODE,
FREQ, TRACK/SS, TEST1, TEST2, VOUTS1–, VOUTS1+,
SNSP1, SNSP2, TEST3, TEST4.....–0.3V to INTVCC (5V)
VFB, COMPA, COMPB (Note 7).................. –0.3V to 2.7V
PVCC Additional Output Current ................0mA to 50mA
(Note 1)
pin conFiguraTion
1
M
L
K
J
H
G
F
E
D
C
B
A
TOP VIEW
BGA PACKAGE
144-LEAD (16mm
×
16mm
×
7.07mm)
VOUT
GND
GND
GND
GND
SW
VIN
2 3 4 5 6 7 8 9 10 11 12
PGOOD
RUNC
SNSP2
SNSP1
COMPB
TEST2
TEST4 (FLOAT PIN)
INTVCC
TEMP–
TEMP+
CLKOUT
SGND
VFB
VOUTS1+
HIZREG
TRACK/SS
COMPA
VOUTS1–
FREQ
PWM
TEST3
MODE/PLLIN
TEST1 TMON
NC
GMON
PHASMD
RUNP
PVCC
TJMAX = 125°C, θJA = 7.5°C/W, θJCbottom = 3°C/W, θJCtop = 15°C/W, θJBA = 12°C/W
θJA = DERIVED FROM 95mm ×76mm PCB WITH 6 LAYERS, WEIGHT = 3.95g
θVALUES DETERMINED PER JESD51-12
Note: θJA = (θJCbottom + θJBA)||θJCtop; θJBA is Board to Ambient
TEMP+, TEMP–.......................................... –0.3V to 0.8V
INTVCC Peak Output Current (Note 6) ....................20mA
Internal Operating Temperature Range
(Note 2).................................................. –40°C to 125°C
Storage Temperature Range .................. –55°C to 125°C
Reflow (Peak Body) Temperature.......................... 250°C
orDer inForMaTion
http://www.linear.com/product/LTM4636#orderinfo
Note: PWM, CLKOUT, and GMON are outputs only.
PART NUMBER PAD OR BALL FINISH
PART MARKING* PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(SEE NOTE 2)DEVICE FINISH CODE
LTM4636EY#PBF SAC305 (RoHS) LTM4636 BGA –40°C to 125°C
LTM4636IY#PBF –40°C to 125°C
• Device temperature grade is indicated by a label on the shipping
container.
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking: www.linear.com/leadfree
• This product is not recommended for second side reflow. For more
information, go to www.linear.com/BGA-assy
• Recommended BGA PCB Assembly and Manufacturing Procedures:
www.linear.com/BGA-assy
• BGA Package and Tray Drawings: www.linear.com/packaging
• This product is moisture sensitive. For more information, go to:
www.linear.com/BGA-assy

LTM4636
3
4636f
For more information www.linear.com/LTM4636
elecTrical characTerisTics
The ldenotes the specifications which apply over the specified internal
operating temperature range (Note 2), otherwise specifications are at TA= 25°C. VIN = 12V, per the Typical Application in Figure 20.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input DC Voltage VIN ≤ 5.5V, Tie VIN, INTVCC and PVCC Together, Tie RUNP
to GND
l4.7 15 V
VOUT VOUT Range l0.6 3.3 V
VOUT(DC) DC Output Voltage, Total
Variation with Line and Load CIN = 22µF ×5
COUT = 100µF ×4 Ceramic, 470µF POSCAP ×3
RFB = 40.2k, MODE_PLLIN = GND
VIN = 4.75V to 15V, IOUT = 0A to 40A (Note 4)
l1.4805 1.5 1.5195 V
Input Specifications
VRUNC RUNC Pin On Threshold VRUNC Rising 1.1 1.22 1.35 V
VRUNCHYS RUNC Pin On Hysteresis 150 mV
VRUNP RUNP Pin On Threshold RUNP Pin Rising l0.7 0.8 0.9 V
RUNP HYS RUNP Pin Hysteresis 60 mV
HIZREG HIZREG Input Threshold VIN = 12V, RUNC = 5V, RUNP = VIN, VOUT = 1.5V 2.3 V
HIZREG HYS HIZREG Hysteresis VIN = 12V, RUNC = 5V, RUNP = VIN, VOUT = 1.5V 0.8 V
IQ(VIN) Input Supply Bias Current VIN = 12V, VOUT = 1.5V, Burst Mode Operation, IOUT = 0.1A
VIN = 12V, VOUT = 1.5V, Pulse-Skipping Mode, IOUT = 0.1A
VIN = 12V, VOUT = 1.5V, Switching Continuous, IOUT = 0.1A
Shutdown, RUN = 0, VIN = 12V
16
23
105
30
mA
mA
mA
µA
IS(VIN) Input Supply Current VIN = 5V, VOUT = 1.5V, IOUT = 40A
VIN = 12V, VOUT = 1.5V, IOUT = 40A
14.7
5.66
A
A
Output Specifications
IOUT(DC) Output Continuous Current
Range
VIN = 12V, VOUT = 1.5V (Note 4) 0 40 A
∆VOUT (Line)
VOUT
Line Regulation Accuracy VOUT = 1.5V, VIN from 4.75V to 15V
IOUT = 0A
l0.02 0.06 %/V
∆VOUT (Load)
VOUT
Load Regulation Accuracy VOUT = 1.5V, IOUT = 0A to 40A, VIN = 12V (Note 4) l0.2 0.35 %
VOUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 100µF ×3 Ceramic, 470µF ×3 POSCAP,
VIN = 12V, VOUT = 1.5V
15 mVP-P
∆VOUT(START) Turn-On Overshoot COUT = 100µF ×4 Ceramic, 470µF ×3 POSCAP,
VOUT = 1.5V, IOUT = 0A, VIN = 12V, TRACK/SS = 0.1µF
5 mV
tSTART Turn-On Time COUT = 100µF ×3 Ceramic, 470µF ×3 POSCAP,
No Load, TRACK/SS = 0.001µF, VIN = 12V
50 ms
∆VOUTLS Peak Deviation for Dynamic
Load
Load: 0% to 50% to 0% of Full Load
COUT = 100µF ×4 Ceramic, 470µF ×3 POSCAP,
VIN = 12V, VOUT = 1.5V, CFF = 22pF
45 mV
tSETTLE Settling Time for Dynamic
Load Step
Load: 0% to 50% to 0% of Full Load, VIN = 5V,
COUT = 100µF ×4 Ceramic, 470µF ×3 POSCAP,
VIN = 12V, VOUT = 1.5V, CFF = 22pF
25 µs
IOUTPK Output Current Limit VIN = 12V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
54
54
A
A
Control Section
VFB Voltage at VFB Pin IOUT = 0A, VOUT = 1.5V l0.594 0.600 0.606 V
IFB Current at VFB Pin (Note 6) –30 –100 nA
VOVL Feedback Overvoltage
Lockout
Measure at VOUTS1 l5 7.5 10 %
ITRACK/SS Track Pin Soft-Start Pull-Up
Current
TRACK/SS = 0V, Default 750µs Turn on with TRACK/SS
Tied to INTVCC
1.1 1.35 1.6 µA
tON(MIN) Minimum On-Time (Note 3) 100 ns
RFBHI Resistor Between VOUTS1
and VFB Pins
4.99 kΩ

LTM4636
4
4636f
For more information www.linear.com/LTM4636
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Remote Sense Amplifier
AV(VFB) VFB Differential Gain (Note 6) 1 V/V
GBP VFB Path Gain Bandwidth Product (Note 5) 4 MHz
General Control or Monitor Pins
ITMON Temperature Monitor Current, TJ= 25°C Into 25kΩ
Temperature Monitor Current, TJ= 150°C Into 25kΩ
38 40.3
58
44 µA
µA
ITMON(SLOPE) Temperature Monitor Current Slope, RTMON = 25kΩ 0.144 µA/°C
VPGOOD PGOOD Trip Level VFB With Respect to Set Output
VFB Ramping Negative
VFB Ramping Positive
–7.5
7.5
%
%
VPGL PGOOD Voltage Low IPGOOD = 2mA 0.2 0.4 V
tPGOOD VPGOOD High-to-Low Delay 65 µs
IPGOOD(OFF) PGOOD Leakage Current VPGOOD = 5V –2 2 µA
VPG1(HYST) PGOOD Trip Level
Hysteresis
2.5 %
INTVCC Linear Regulator
VINTVCC Internal VCC Voltage Source 6V < VIN < 15V 5.3 5.5 5.7 V
VINTVCC Load Reg INTVCC Load Regulation ICC = 0mA to 10mA 0.5 %
UVLO HYS Controller UVLO Hysteresis (Note 6) 0.5 V
PVCC(UVLO) Drivers and Power
MOSFETs UVLO
PVCC Rising 3.5 3.8 4.1 V
PVCC(HYS) PVCC UVLO Hysteresis 0.45 V
PVCC Power Stage Bias 12V Input, PVCC Load = 50mm 5.0 V
Oscillator and Phase-Locked Loop
fOSC Oscillator Frequency
VPHSMD = 0V
RFREQ = 30.1kΩ
RFREQ = 47.5kΩ
RFREQ = 54.9kΩ
RFREQ = 75.0kΩ
Maximum Frequency
Minimum Frequency
l
l
210
540
625
945
1.2
250
600
750
1.05
290
660
825
1.155
0.2
kHz
kHz
kHz
MHz
MHz
MHz
IFREQ FREQ Pin Output Current VFREQ = 0.8V 19 20 21 µA
RMODE/PLLIN MODE_PLLIN Input
Resistance
250 kΩ
VMODE/PLLIN PLLIN Input Threshold VMODE/PLLIN Rising
VMODE/PLLIN Falling
2
1.2
V
V
VCLKOUT Low Output Voltage
High Output Voltage
Verified Levels
Measurements on CLKOUT
0.2
5.2
V
V
PWM-CLKOUT PWM to Clockout Phase Delay VPHSMD = 0V
VPHSMD = 1/4 INTVCC
VPHSMD = Float
VPHSMD = 3/4 INTVCC
VPHSMD = INTVCC
90
90
120
60
180
Deg
Deg
Deg
Deg
Deg
PWM/PWMEN Outputs
PWM PWM Output High Voltage ILOAD = 500µA 5.0 V
PWM Output Low Voltage ILOAD = –500µA 0.5 V
elecTrical characTerisTics
The ldenotes the specifications which apply over the specified internal
operating temperature range (Note 2), otherwise specifications are at TA= 25°C. VIN = 12V, per the typical application in Figure 20.

LTM4636
5
4636f
For more information www.linear.com/LTM4636
elecTrical characTerisTics
The ldenotes the specifications which apply over the specified internal
operating temperature range (Note 2), otherwise specifications are at TA= 25°C. VIN = 12V, per the typical application in Figure 20.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4636 is tested under pulsed load conditions such that
TJ≈ TA. The LTM4636E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the full –40°C to 125°C internal operating temperature range are
assured by design, characterization and correlation with statistical process
controls. The LTM4636I is guaranteed to meet specifications over the
full –40°C to 125°C internal operating temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3: The minimum on-time condition is specified for a peak-to-peak
inductor ripple current of ~40% of IMAX Load. (See the Applications
Information section)
Note 4: See output current derating curves for different VIN, VOUT and TA.
Note 5: Guaranteed by design.
Note 6: 100% tested at wafer level.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Temperature Diode
Diode VFDiode Forward Voltage I = 100µA, TEMP+to TEMP–0.598 V
TC Temperature Coefficient l–2.0 mV/°C
Typical perForMance characTerisTics
Burst Mode Efficiency
vs Load Current 1V Transient Response 1.2V Transient Response
Efficiency vs Load Current
with 5VIN
Efficiency vs Load Current with
8VIN
Efficiency vs Load Current with
12VIN
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
100
90
80
95
85
75
70 2515 35
4636 G01
4020105 30
3.3VOUT, 500kHz
2.5VOUT, 500kHz
1.8VOUT, 450kHz
1.5VOUT, 425kHz
1.2VOUT, 300kHz
1VOUT, 300kHz
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
100
90
80
95
85
75
70 2515 35
4636 G02
4020105 30
3.3VOUT, 700kHz
2.5VOUT, 600kHz
1.8VOUT, 500kHz
1.5VOUT, 450kHz
1.2VOUT, 400kHz
1VOUT, 350kHz
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
100
90
80
95
85
75
70 2515 35
4636 G03
4020105 30
3.3VOUT, 750kHz
2.5VOUT, 650kHz
1.8VOUT, 600kHz
1.5VOUT, 550kHz
1.2VOUT, 400kHz
1VOUT, 350kHz
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
100
80
60
90
70
50
40 32 4
4636 G04
51
Burst Mode OPERATION
VIN 12V
VOUT 1.5V
12V TO 1V TRANSIENT RESPONSE
COUT = 4 ×100µF CERAMIC, 3 ×470µF 2.5V
POSCAP 5mΩ
CFF = 22pF, SW FREQ = 400kHz
10A/DIV
18A/µs
STEP
50mV/DIV
50µs/DIV
4636 G05
12V TO 1.2V TRANSIENT RESPONSE
COUT = 4 ×100µF CERAMIC, 3 ×470µF 2.5V
POSCAP 5mΩ
CFF = 22pF, SW FREQ = 400kHz
CCOMP = 100pF
10A/DIV
18A/µs
STEP
50mV/DIV
50µs/DIV
4636 G06

LTM4636
6
4636f
For more information www.linear.com/LTM4636
Typical perForMance characTerisTics
2.5V Transient Response
1.5V Transient Response
3.3V Transient Response
40A Load Short-Circuit
1.8V Transient Response
Start-Up with Soft-Start No-Load
Start-Up with 0.5V Output Pre-Bias
Start-Up with Soft-Start Full Load
No-Load Short-Circuit
RUN PIN CAPACITOR = 0.1µF
TRACK/SS CAPACITOR = 0.1µF
COUT = 4 ×100µF CERAMIC AND 3 ×470µF
POSCAP
20ms/DIV
VIN
5V/DIV
VOUT
0.5V/DIV
4636 G11
RUN PIN CAPACITOR = 0.1µF
TRACK/SS CAPACITOR = 0.1µF
COUT = 4 ×100µF CERAMIC AND 3 ×470µF
POSCAP
20ms/DIV
VIN
5V/DIV
VOUT
0.5V/DIV
4636 G12
100µs/DIV
LIN
200mA/DIV
VOUT
0.5V/DIV
4636 G13
RUN PIN CAPACITOR = 0.1µF
TRACK/SS CAPACITOR = 0.1µF
C
OUT
= 4 ×100µF CERAMIC AND 3 ×470µF
20ms/DIV
VIN
5V/DIV
VOUT
0.5V/DIV
4636 G14
100µs/DIV
LIN
200mA/DIV
VOUT
0.5V/DIV
4636 G15
12V TO 1.5V TRANSIENT RESPONSE
COUT = 4 ×100µF CERAMIC, 3 ×470µF 2.5V
POSCAP 5mΩ
CFF = 22pF, SW FREQ = 425kHz
C
COMP
= 100pF
10A/DIV
18A/µs
STEP
50mV/DIV
50µs/DIV
4636 G07
12V TO 1.8V TRANSIENT RESPONSE
COUT = 6 ×100µF CERAMIC, 2 ×470µF 4V
POSCAP 5mΩ
CFF = 22pF, SW FREQ = 500kHz
C
COMP
= 100pF
10A/DIV
18A/µs
STEP
50mV/DIV
100µs/DIV
4636 G08
12V TO 2.5V TRANSIENT RESPONSE
COUT = 6 ×100µF CERAMIC, 2 ×470µF 4V
POSCAP 5mΩ
CFF = 22pF, SW FREQ = 650kHz
C
COMP
= 100pF
10A/DIV
18A/µs
STEP
100mV/DIV
100µs/DIV
4636 G09
12V TO 3.3V TRANSIENT RESPONSE
COUT = 6 ×100µF CERAMIC, 2 ×470µF 4V
POSCAP 5mΩ
CFF = 22pF, SW FREQ = 750kHz
C
COMP
= 100pF
10A/DIV
18A/µs
STEP
100mV/DIV
100µs/DIV
4636 G10

LTM4636
7
4636f
For more information www.linear.com/LTM4636
pin FuncTions
VOUT (A1-A12, B1-B12,C1-C12,D1-D2,D11-D12):Power
OutputPins. Applyoutputloadbetweenthese pinsandGND
pins. Recommend placing output decoupling capacitance
between these pins and GND pins. Review Table 4.
MODE_PLLIN (H3): Forced Continuous Mode, BurstMode
Operation, or Pulse-Skipping Mode Selection Pin and
External Synchronization Input to Phase Detector Pin.
Connect this pin to INTVCC to enable pulse-skipping mode
ofoperation.Connecttogroundtoenable forcedcontinuous
modeofoperation.Floating this pin will enable BurstMode
operation. A clock on this pin will enable synchronization
with forced continuous operation. See the Applications
Information section.
VOUTS1–(D3): VOUT Sense Ground for the Remote Sense
Amplifier. This pin connects to the ground remote sense
point. Connect to ground when not used. See the Applica-
tions Information section.
VOUTS1+(D4): This pin should connect to VOUT and is
connected to VFB through a 4.99k resistor. This pin is
used to connect to a remote sense point of the load for
accurate voltage sensing. Either connect to remote sense
point or directly to VOUT. See the Applications Information
section for details.
COMPB(D5):Internal compensationnetworkprovidedthat
coincides with proper stability utilizing the values in Table
5. Just connect this pin to COMPA for internal compensa-
tion. In parallel operation with other LTM4636 devices,
connect COMPA and COMPB pins together for internal
compensation, then connect all COMPA pins together.
GND (D6-D10, E6-E10, E12, F7, F8, F10-F12, G1-G2, G6
G10, H1, H10-H12, J1-J3, J8-J12, K1-K3, K9-K10, K12,
L1-L3, L9-L10, L12, M1-M3, M9-M12): Ground Pins for
Both Input and Output Returns.
PGOOD (E1): OutputVoltagePowerGood Indicator. Open-
drain logic output is pulled to ground when the output
voltage exceeds a ±7.5% regulation window.
RUNC (E2): Run Control Pin. A voltage above 1.35V will
turn on the control section of the module. A 10k resistor
to ground is internal to the module for setting the RUN
pin threshold with a resistor to 5V, and allowing a pull-
up resistor to PVCC for enabling the device. See Figure 1
Block Diagram.
TRACK/SS(E3): OutputVoltageTracking PinandSoft-Start
Inputs. The pin has a 1.25µA pull-up current source. A
capacitor from this pin to ground will set a soft-start ramp
rate. In tracking, the regulator output can be tracked to a
differentvoltage. Thedifferentvoltage isapplied toavoltage
divider then to the slave output’s track pin. This voltage
divider is equal to the slave output’s feedback divider for
coincidental tracking. Default soft-start of 750µs with
TRACK/SS pin connected to INTVCC pin. See the Applica-
tions Information section. In PolyPhase
®
applications tie
the TRACK/SS pins together.
VFB (E4): The Negative Input of the Error Amplifier. Inter-
nally,this pin isconnectedto VOUTS1witha4.99k precision
resistor. Different output voltages can be programmed
with an additional resistor between VFB and VOUTS1–. In
PolyPhaseoperation,tying the VFB pins togetherallowsfor
paralleloperation. SeetheApplicationsInformation section.
COMPA (E5):CurrentControlThresholdandErrorAmplifier
Compensation Point. The current comparator threshold
increases with this control voltage. Tie all COMPA pins
together for parallel operation. This pin allows external
compensation. See the Applications Information section.
SNSP2 (F1): Current Sense Signal Path. Connect this pin
to SNSP1 (F2).
SNSP1 (F2): Current Sense Signal Path. Connect this pin
to SNSP2 (F1). Both pins are used to calibrate current
sense matching and current limit at final test.
HIZREG (F3): When this pin is pulled low the power stage
is disabled into high impedance. Tie this pin to VIN or in
TVCC for normal operation.
PACKAGE ROW AND COLUMN LABELING M AY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.

LTM4636
8
4636f
For more information www.linear.com/LTM4636
pin FuncTions
SGND (F4, G4): SignalGround Pin. Return ground pathfor
all analog and low power circuitry. Tie a single connection
to the output capacitor GND in the application. See layout
guidelines in Figure 18.
INTVCC (F6): Internal 5.5V LDO for Driving the Control
Circuitryin the LTM4636. INTVCC is controlledandenabled
when RUNC is activated high. Tie to VIN, when 4.7V≤ VIN
≤ 5.5V, minimum VIN = 4.2V.
FREQ (G5): A resistor can be applied from this pin to
ground to set the operating frequency. This pin sources
20µA. See the Applications Information section.
PHASMD (G7): This pin can be voltage programmed to
change the phase relationship of the CLKOUT pin with
reference to the internal clock or an input synchronized
clock. The INTVCC (5.5V) output can be voltage divided
down to the PHASMD pin to set the particular phase. The
Electrical Characteristics show the different settings to
select a particular phase. See the Applications Informa-
tion section.
RUNP (G8): This pin enables the PVCC supply. This pin
can be connected to VIN, or tie to ground when connecting
PVCC to VIN ≤ 5.5V. RUNP needs to sequence up before
RUNC. A 15k resistor from PVCC to RUNC with a 0.1µF
capacitor will provide enough delay. In parallel operation
with multiple LTM4636s, the resistor can be reduced in
value by N times and the 0.1µF can be increased N times.
SeeApplications Informationsection.RUNPcan beusedto
setthe minimum UVLOwitha voltage divider.See Figure 1.
NC (G9): No Connection.
PVCC (F9): 5V Power Output and Power for Internal Power
MOSFETDrivers. Theregulatorcan power50mA of external
sourcing for additional use. Place a 22µF ceramic filter
capacitor on this pin to ground. When VIN < 5.5V, tie VIN
and PVCC together along with INTVCC. Then tie RUNP to
GND. If VIN > 5.5V then operate PVCC regulator as normal.
See the Typical Application examples.
TEMP+(G12): Temperature Monitor. An internal diode
connected NPN transistor. See the Applications Informa-
tion section.
TEMP–(G11): Low Side of the Internal Temperature
Monitor.
CLKOUT (G3): Clock out signal that can be phase selected
to the main internal clock or synchronized clock using
the PHASMD pin. CLKOUT can be used for multiphase
applications. See the Applications Information section.
TEST1(H4), TEST2(F5),TEST3 (H2),TEST4 (E11),GMON
(H9):These are test pins used in the final production test
of the part. Leave floating.
VIN (H5-H6, J4-J7, K4-K8, L4-L8, M4-M8): Power Input
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between VIN and GND pins.
PWM (H7): PWM output that drives the power stage.
Primarily used for test, but can be monitored in debug
or testing.
TMON(H8):TemperatureMonitor Pin.Internal temperature
monitor,varies from1Vat 25°Cto 1.44Vat150°C, disables
power stage at 150°C. If this feature is not desired, then
tie the TMON pin to GND.
SW (L11, K11): These are pin connections to the internal
switch node for test evaluation and monitoring. An R-C
snubber can be placed from the switch pins to GND to
eliminate any high frequency ringing. See the Applications
Information section.

LTM4636
9
4636f
For more information www.linear.com/LTM4636
block DiagraM
Figure 1. Simplified LTM4636 Block Diagram
PGOOD
+
TDRV
PWM INPUT 150C DISABLE DISABLE
TEMP MONITOR CURRENT
IMON 40µA AT 25°C 60µA AT 150°C
PWM LOGIC CONTOL, POWER MOSFET DRIVERS, POWER MOSFET
M1
0.18µH
SNSP2 SNS–
BDRV
M2
24.9k 1%
4.99k 0.5%
0.1µF
10pF
0.1µF
SOFT-START
10k 1%
UVLO EXAMPLE
> 1.35V = ON
15k = (PV
CC – 1.35V)(10k)/1.35V
DISABLES AT ~ 3.75V
PVCC ≥ 5V
15k
10k
INTVCC
PVCC
SNSP1
SNSP1 AND SNSP2
CONNECTED AT PCB
SNS–
470pFQ1
1µF
22µF
VIN
PVCC
> 0.85V = ON
INTERNAL 5V REGULATOR
2.2Ω
2.2Ω, 0805
SGND SNSP2
CONNECT TO SNSP1
TEMP–
GMON
TMON
PWM
VOUTS1–
TEMP–
TEMP+
GND
VOUT
VOUT
1.5V AT 40A
SW
VIN VIN
4.70V TO 15V VIN ≤ 5.5V, TIE TO VIN,
INTVCC AND PVCC
TOGETHER,TIE RUNP TO GND. VIN > 5.5V
OPERATE AS SHOWN
V
IN
UVLO
EXAMPLE
CIN
RUNP
R1
PVCC
OPTIMIZED
DEAD TIME
CONTROL
DCR SENSE
NETWORK
5V
VOUTS1+
4636 F01
+
–
VFB DIFF
AMP
CURRENT
SENSE
PWM
POWER CONTROL
FREQ TRACK/SS
VFB
R6
3.32k
MODE_PLLIN INTVCC 5.5V SNSP1 PHMODE HIZREG
INTVCC
CLKOUT SGND COMPB COMPA RUNC TEST3 TEST2 TEST1 TEST4
RFREQ
40k
+
–
+
COUT
4.7µF
INTERNAL
COMP
1µF
2200pF
15k
R1 = (VIN – 0.85V) (15K)
0.85V

LTM4636
10
4636f
For more information www.linear.com/LTM4636
Decoupling requireMenTs
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CIN External Input Capacitor Requirement
(VIN = 4.70V to 16V, VOUT = 1.5V)
IOUT = 40A, 6 ×22µF Ceramic X7R Capacitors
(See Table 4)
100 µF
COUT External Output Capacitor Requirement
(VIN = 4.70V to 16V, VOUT = 1.5V)
IOUT = 40A (See Table 4) 1000 µF
TA= 25°C. Use Figure 1 configuration.
Power Module Description
TheLTM4636 is ahigh efficiency regulatorthatcan provide
a40Aoutput with few external input andoutputcapacitors.
This module provides precisely regulated output voltages
programmable via external resistors from 0.6V DC to 3.3V
DC over a 4.70V to 15V input range. The Typical Applica-
tion schematic is shown in Figure 20.
The LTM4636 has an integrated constant-frequency cur-
rent mode regulator, power MOSFETs, 0.18µH inductor,
protection circuitry, 5V regulator and other supporting
discrete components. The switching frequency range is
from250kHzto770kHz,and thetypical operatingfrequency
is 400kHz. For switching noise-sensitive applications, it
can be externally synchronized from 250kHz to 800kHz,
subject to minimum on-time limitations and limiting the
inductor ripple current to less than 40% of maximum
output current.
A single resistor is used to program the frequency. See
the Applications Information section.
With current mode control and internal feedback loop
compensation, the LTM4636 module has sufficient stabil-
ity margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors. An option has been provided for external loop
compensation. LTpowerCAD
®
can be used to optimize
the external compensation option. See the Applications
Information section.
Current mode control provides cycle-by-cycle fast current
limit in an overcurrent condition. An internal overvoltage
operaTion
monitor feedback pin referred will attempt to protect the
output voltage in the event of an overvoltage >10%. The
top MOSFET is turned off and the bottom MOSFET is
turned on until the output is cleared.
Pulling the RUNC pin below 1.1V forces the regulator con-
trollerinto a shutdown state. The TRACK/SS pin is used for
programmingthe output voltagerampand voltagetracking
during start-up. See the Applications Information section.
The LTM4636 is internally compensated to be stable over
all operating conditions. Table 5 provides a guideline for
input and output capacitances for several operating condi-
tions. LTpowerCAD is available for transient and stability
analysis. This tool can be used to optimize the regulators
loop response.
Aremote senseamplifieris provided foraccuratelysensing
output voltages at the load point.
Multiphase operation can be easily employed with the
internal clock source or a synchronization clock applied
to the MODE/PLLIN input using an external clock source,
and connecting the CLKOUT pins. See the Applications
Information section. Review Figure 4.
High efficiency at light loads can be accomplished with
selectable Burst Mode operation using the MODE_PLLIN
pin. These light load features will accommodate battery
operation. Efficiency graphs are provided for light load op-
erationin the TypicalPerformanceCharacteristicssection.
A TEMP+and TEMP–pins are provided to allow the internal
device temperature to be monitored using an onboard
diode connected NPN transistor.

LTM4636
11
4636f
For more information www.linear.com/LTM4636
applicaTions inForMaTion
The typical LTM4636 application circuit is shown in
Figure 20. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 5 for specific external capacitor
requirements for particular applications.
VIN to VOUT Step-Down Ratios
Thereare restrictions inthe VIN toVOUT step-downratiothat
can be achieved for a given input voltage. The maximum
duty cycle is 94% typical at 500kHz operation. The VIN to
VOUT minimum dropout is a function of load current and
operation at very low input voltage and high duty cycle
applications. At very low duty cycles the minimum 100ns
on-time must be maintained. See the Frequency Adjust-
ment section and temperature derating curves.
Output Voltage Programming
The PWM controller has an internal 0.6V±1% reference
voltage. As shown in the Block Diagram, a 4.99k internal
feedback resistor connects the VOUTS1+and VFB pins to-
gether. When the remote sensing is used, then VOUTS1+
and VOUTS1–are connected to the remote VOUT and GND
points. If no remote sense the VOUTS1+connects to VOUT.
The output voltage will default to 0.6V with no feedback
resistor. Adding a resistor RFB from VFB to ground pro-
grams the output voltage:
V
OUT =0.6V •
4.99k +R
FB
R
FB
Table 1. VFB Resistor Table vs Various Output Voltages
VOUT (V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3
RFB (k) Open 7.5 4.99 3.32 2.49 1.58 1.1
For parallel operation of N LTM4636s, the following
equation can be used to solve for RFB:
RFB=
4.99k /N
V
OUT
0.6V
–1
Or use VOUTS1 on one channel and connect all feedback
pins together utilizing a single feedback resistor.
Tie the VFB pinstogether for eachparallel output. TheCOMP
pins must be tied together also. See Typical Application
section examples.
Input Capacitors
The LTM4636 module should be connected to a low AC-
impedance DC source. Additional input capacitors are
neededfortheRMSinputripplecurrentrating.TheICIN(RMS)
equation which follows can be used to calculate the input
capacitor requirement. Typically 22µF X7R ceramics are a
good choice with RMS ripple current ratings of ~4A each.
A47µFto100µF surfacemount aluminum electrolytic bulk
capacitor can be used for more input bulk capacitance.
This bulk input capacitor is only needed if the input source
impedanceis compromised bylonginductive leads, traces
ornot enough sourcecapacitance.Iflow impedance power
planes are used, then this bulk capacitor is not needed.
For a buck converter, the switching duty cycle can be
estimated as:
D=
V
OUT
VIN
Without considering the inductor ripple current, for each
output the RMS current of the input capacitor can be
estimated as:
ICIN(RMS)=
I
OUT(MAX)
η%•D•(1–D)
where η% is the estimated efficiency of the power mod-
ule. The bulk capacitor can be a switcher-rated aluminum
electrolytic capacitor or a Polymer capacitor.

LTM4636
12
4636f
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applicaTions inForMaTion
Output Capacitors
The LTM4636 is designed for low output voltage ripple
noise. The bulk output capacitors defined as COUT are
chosen with low enough effective series resistance (ESR)
to meet the output voltage ripple and transient require-
ments. COUT can be a low ESR tantalum capacitor, low
ESR Polymer capacitor or ceramic capacitors. The typi-
cal output capacitance range is from 400µF to 1000µF.
Additional output filtering may be required by the system
designer if further reduction of output ripple or dynamic
transient spikes is required. Table 5 shows a matrix of dif-
ferent output voltages and output capacitors to minimize
the voltage droop and overshoot during a 15A/µs tran-
sient. The table optimizes total equivalent ESR and total
bulk capacitance to optimize the transient performance.
Stability criteria are considered in the Table 5 matrix, and
LTpowerCAD is available for stability analysis. Multiphase
operation will reduce effective output ripple as a function
of the number of phases. Application Note 77 discusses
this noise reduction versus output ripple current cancel-
lation, but the output capacitance should be considered
carefully as a function of stability and transient response.
LTpowerCAD can be used to calculate the output ripple
reductionasthe number of implemented phasesincreases
by N times. External loop compensation can be used for
transient response optimization.
Burst Mode Operation
The LTM4636 is capable of Burst Mode operation in which
the power MOSFETs operate intermittently based on load
demand, thus saving quiescent current. For applications
where maximizing the efficiency at very light loads is a
high priority, Burst Mode operation should be applied. To
enableBurstModeoperation,simplyfloattheMODE_PLLIN
pin. During Burst Mode operation, the peak current of the
inductor is set to approximately 30% of the maximum
peak current value in normal operation even though the
voltage at the COMPA pin indicates a lower value. The
voltage at the COMPA pin drops when the inductor’s aver-
age current is greater than the load requirement. As the
COMPA voltage drops below 0.5V, the burst comparator
trips, causing the internal sleep line to go high and turn
off both power MOSFETs.
In sleep mode, the internal circuitry is partially turned
off, reducing the quiescent current. The load current is
now being supplied from the output capacitors. When the
output voltage drops, causing COMPA to rise, the internal
sleep line goes low, and the LTM4636 resumes normal
operation. The next oscillator cycle will turn on the top
power MOSFET and the switching cycle repeats.
Pulse-Skipping Mode Operation
In applications where low output ripple and high efficiency
at intermediate currents are desired, pulse-skipping
mode should be used. Pulse-skipping operation allows
the LTM4636 to skip cycles at low output loads, thus
increasing efficiency by reducing switching loss. Tying
the MODE_PLLIN pin to INTVCC enables pulse-skipping
operation. With pulse-skipping mode at light load, the
internalcurrentcomparator may remain tripped forseveral
cycles, thus skipping operation cycles. This mode has
lower ripple than Burst Mode operation and maintains a
higher frequency operation than Burst Mode operation.
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous operation
should be used. Forced continuous operation can be
enabled by tying the MODE_PLLIN pin to ground. In this
mode, inductor current is allowed to reverse during low
outputloads, the COMPA voltageis in controlofthe current
comparator threshold throughout, and the top MOSFET
alwaysturns on with eachoscillatorpulse.During start-up,
forced continuous mode is disabled and inductor current
is prevented from reversing until the LTM4636’s output
voltage is in regulation.

LTM4636
13
4636f
For more information www.linear.com/LTM4636
Multiphase Operation
For outputs that demand more than 40A of load current,
multipleLTM4636devicescanbeparalleledtoprovidemore
output current without increasing input and output ripple
voltage. The MODE_PLLIN pin allows the LTM4636 to be
synchronized to an external clock and the internal phase-
locked loop allows the LTM4636 to lock onto input clock
phase as well. The FREQ resistor is selected for normal
frequency, then the incoming clock can synchronize the
device over the specified range.
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output ca-
pacitors. The RMS input ripple current is reduced by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
than the number of phases used times the output voltage).
The output ripple amplitude is also reduced by the number
of phases used. See Application Note 77.
The LTM4636 device is an inherently current mode con-
trolled device, so parallel modules will have good current
sharing.Thiswill balance thethermalsin the design.Tie the
COMPA to COMPB and then tie the COMPA pins together,
tie VFB pins of each LTM4636 together to share the cur-
rent evenly. Figure 21 shows a schematic of the parallel
design. For external compensation and parallel operation
onlytieCOMPA pins togetherwithexternalcompensation.
Input RMS Ripple Current Cancellation
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current can-
cellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reductionas afunctionof the numberofinterleaved phases
(see Figure 2).
PLL, Frequency Adjustment and Synchronization
TheLTM4636switchingfrequencyissetbyaresistor(RFREQ)
from the FREQ pin to signal ground. A 20µA current
(IFREQ)flowing outofthe FREQ pinthroughRFREQ develops
a voltage on the FREQ pin. RFREQ can be calculated as:
RFREQ =
FREQV
20µA
applicaTions inForMaTion
Figure 2. Normalized Input RMS Ripple Current vs Duty Cycle for One to Six µModule Regulators (Phases)
0.75 0.8
4636 F02
0.70.650.60.550.50.450.40.350.30.250.20.150.1 0.85
0.9
DUTY CYCLE (VOUT/VIN)
0
DC LOAD CURRENT
RMS INPUT RIPPLE CURRENT
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
1 PHASE
2 PHASE
3 PHASE
4 PHASE
6 PHASE

LTM4636
14
4636f
For more information www.linear.com/LTM4636
The relationship of FREQV voltage to switching frequency
is shown in Figure 3. For low output voltages from 0.6V
to 1.2V, 350kHz operation is an optimal frequency for the
best power conversion efficiency while maintaining the
inductor current to about 45% of maximum load current.
For output voltages from 1.5V to 1.8V, 500kHz is optimal.
For output voltages from 2.5V to 3.3V, 700kHz is optimal.
Seeefficiency graphsforoptimal frequencysetpoint. Limit
the 2.5V and 3.3V outputs to 35A.
The LTM4636 can be synchronized from 200kHz to
1200kHz with an input clock that has a high level above
2V and a low level below 1.2V. See the Typical Applica-
tions section for synchronization examples. The LTM4636
minimum on-time is limited to approximately 100ns. The
on-time can be calculated as:
tON(MIN)=1
FREQ •VOUT
VIN





applicaTions inForMaTion
The LTM4636's CLKOUT pin phase difference from VOUT
can be programmed by applying a voltage to the PHMODE
pin.This voltagecanbeprogrammedusing the5.5VINTVCC
pin. Most of the phase selections can be programmed by
either grounding, floating, or tying this pin to INTVCC. The
60 degree phase shift will require 3/4 INTVCC and can be
programmed with a voltage divider from the INTVCC pin.
See Figure 4 for phase programming and the 2 to 6 phase
connections. See Figure 27 for example design.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the
TRACK /SS pin. The output can be tracked up
and down with another regulator. The master regulator’s
output is divided down with an external resistor divider
that is the same as the slave regulator’s feedback divider
to implement coincident tracking. The LTM4636 uses an
Figure 3. FREQ Voltage to Switching Frequency
VFREQ (V)
0.4
FREQUENCY (kHz)
900
1100
1300
1.0 1.4
4636 F03
700
500
0.6 0.8 1.2 1.6
1.8
300
100

LTM4636
15
4636f
For more information www.linear.com/LTM4636
applicaTions inForMaTion
accurate 4.99k resistor internally for the top feedback
resistor.Figure 5 shows anexampleof coincident tracking.
VOUT(SLAVE) =1+4.99k
RTA




•VTRACK
VTRACK is the track ramp applied to the slave’s track pin.
VTRACK has a control range of 0V to 0.6V, or the internal
reference voltage. When the master’s output is divided
down with the same resistor values used to set the slave’s
output, then the slave will coincident track with the master
until it reaches its final value. The master will continue
to its final value from the slave’s regulation point (see
Figure 6). Voltage tracking is disabled when VTRACK is
more than 0.6V. RTA in Figure 5 will be equal to RFB for
coincident tracking.
The
TRACK /SS pin of the master can be controlled by an
externalramp or thesoft-start functionofthat regulator can
be used to develop that master ramp. The LTM4636 can
be used as a master by setting the ramp rate on its track
pin using a soft-start capacitor. A 1.25µA current source
is used to charge the soft-start capacitor. The following
equation can be used:
tSOFT-START =0.6V •CSS
1.25µA





Figure 4. Phase Selection Examples
LTM4636
180 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
3/4 INTVCC
LTM4636
240 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
3/4 INTVCC
LTM4636
300 PHASE
MODE_PLLIN
PHMODE
4636 F04
CLKOUT
VOUT
3/4 INTVCC
LTM4636
0 PHASE
MODE_PLLIN
PHMODE
R2
10k
R1
30.1k
CLKOUT
VOUT
LTM4636
0 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
LTM4636
90 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
LTM4636
180 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
LTM4636
270 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
3/4 INTVCC
INTVCC
LTM4636
60 PHASE
SIX PHASE
FOUR PHASE
LTM4636
0 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
LTM4636
120 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
LTM4636
240 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
THREE PHASE
LTM4636
0 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
LTM4636
180 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
FLOATINTVCC
TWO PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT 3/4 INTVCC
LTM4636
120 PHASE
MODE_PLLIN
PHMODE
CLKOUT
VOUT
3/4 INTVCC
VOUT
PHASE
0
0
0
0
0
CLKOUT
PHASE
90
90
120
60
180
PHMODE
(V)
0
1/4 INTVCC
FLOAT
3/4 INTVCC
INTVCC
PHASE SELECTION

LTM4636
16
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applicaTions inForMaTion
Figure 5. Dual Outputs (1.5V and 1.2V) with Tracking
Figure 6. Output Voltage Coincident Tracking Characteristics
4636 F06
TIME
SLAVE OUTPUT
MASTER OUTPUT
OUTPUT
VOLTAGE
+
COMPA
COMPB
TRACK/SS
RUNC
RUNP
HIZREG
FREQ
TMON
SW
VOUT
TEMP+TEMP–SNSP1 SNSP2 SGND
VIN
15k
5V
PVCC1
1.5V AT 40A
2.2Ω, 0805 2200pF
40.2k
40.2k
CSS
0.1µF
22µF
VOLTAGE OUT TEMP MONITOR
0.1µF
22µF
16V
×5
4.7V TO
15V 100µF
25V
INTVCC1
OPTIONAL TEMP MONITOR
FOR TELEMETRY READBACK ICs
INTVCC
INTVCC1
5V PV
CC1
LTM4636
PVCC
PGND
VOUTS1+
VOUTS1–
VFB
+
470µF
6.3V
470µF
6.3V
+
+
470µF
6.3V
RFB
3.32k
100µF ×4
6.3V
4636 F05
+
COMPA
COMPB
TRACK/SS
RUNC
RUNP
HIZREG
FREQ
TMON
SW
VOUT
TEMP+TEMP–SNSP1 SNSP2 SGND
VIN
15k
1.5V
5V
PVCC2
1.2V AT 40A
R7B
4.99k
R7A
4.99k
22µF
VOLTAGE OUT TEMP MONITOR
0.1µF
22µF
16V
×5
INTVCC2
OPTIONAL TEMP MONITOR
FOR TELEMETRY READBACK ICs
INTVCC
INTVCC2 5V PVCC2
LTM4636
PVCC
PGND
VOUTS1+
VOUTS1–
VFB
470µF
6.3V
470µF
6.3V
+
+
470µF
6.3V
RFB1
4.99k
100µF ×4
6.3V
PINS NOT USED IN THIS CIRCUIT:
CLKOUT, GMON, MODE/PLLIN, PGOOD,
PHMODE, PWM, TEST1, TEST2, TEST3, TEST4
2.2Ω, 0805 2200pF

LTM4636
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For more information www.linear.com/LTM4636
applicaTions inForMaTion
Ratiometric tracking can be achieved by a few simple
calculationsand theslewratevalueapplied tothemaster’s
TRACK/SS pin. As mentioned above, the TRACK/SS pin
has a control range from 0V to 0.6V. The master’s
TRACK/SS pin slew rate is directly equal to the master’s
output slew rate in volts/time. The equation:
MR
SR
•4.99k =RTB
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in volts/time. When coincident
tracking is desired, then MR and SR are equal, thus RTB
is equal to 4.99k. RTA is derived from equation:
RTA =
0.6V
VFB
4.99k +VFB R
FB1
–VTRACK
R
TB
where VFB is the feedback voltage reference of the regula-
tor, and VTRACK is 0.6V. Since RTB is equal to the 4.99k
top feedback resistor of the slave regulator in equal slew
rate or coincident tracking, then RTA is equal to RFB with
VFB = VTRACK. Therefore RTB = 4.99k, and RTA = 4.99k in
Figure 5.
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. RTB can be solved for when SR
is slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach its final value before the master output.
For example, MR = 1.5V/ms, and SR = 1.2V/ms. Then
RTB = 6.19k. Solve for RTA to equal 4.22k.
For applications that do not require tracking or sequenc-
ing, simply tie the TRACK/SS pin to INTVCC to let RUN
control the turn on/off. When the RUN pin is below
its threshold or the VIN undervoltage lockout, then
TRACK/SS is pulled low.
Default Overcurrent and Overvoltage Protection
The LTM4636 has overcurrent protection (OCP) in a
short circuit. The internal current comparator threshold
folds back during a short to reduce the output current. An
overvoltage condition (OVP) above 10% of the regulated
outputvoltage willforcethe topMOSFEToff andthebottom
MOSFETonuntiltheconditioniscleared.Foldbackcurrent
limiting is disabled during soft-start or tracking start-up.
Temperature Monitoring
Measuring the absolute temperature of a diode is pos-
sible due to the relationship between current, voltage
and temperature described by the classic diode equation:
ID=IS•eVD
η•VT





or
VD= η•VT•InID
IS
where IDis the diode current, VDis the diode voltage, η
is the ideality factor (typically close to 1.0) and IS(satura-
tion current) is a process dependent parameter. VTcan
be broken out to:
VT=
k•T
q
where T is the diode junction temperature in Kelvin, q is
the electron charge and k is Boltzmann’s constant. VTis
approximately 26mV at room temperature (298K) and
scales linearly with Kelvin temperature. It is this linear
temperature relationship that makes diodes suitable tem-
perature sensors. The ISterm in the previous equation is
the extrapolated current through a diode junction when
the diode has zero volts across the terminals. The ISterm
varies from process to process, varies with temperature,
and by definition must always be less than ID. Combining
all of the constants into one term:
KD=
η•k
q
where KD= 8.62−5, and knowing ln(ID/IS) is always posi-
tive because IDis always greater than IS, leaves us with
the equation that:
VD=T KELVIN
( )
•KD•In
I
D
IS

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18
4636f
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where VDappears to increase with temperature. It is com-
mon knowledge that a silicon diode biased with a current
source has an approximate –2mV/°C temperature rela-
tionship (Figure 7), which is at odds with the equation. In
fact, the ISterm increases with temperature, reducing the
ln(ID/IS) absolute value yielding an approximate –2mV/°C
composite diode voltage slope.
applicaTions inForMaTion
To obtain a linear voltage proportional to temperature
we cancel the ISvariable in the natural logarithm term to
remove the ISdependency from the equation 1. This is
accomplished by measuring the diode voltage at two cur-
rents I1, and I2, where I1=10•I2) and subtracting we get:
∆VD=T(KELVIN)•KD•IN
I
1
I
S
– T(KELVIN)•KD•IN
I
2
I
S
Combining like terms, then simplifying the natural log
terms yields:
∆VD= T(KELVIN)•KD•lN(10)
and redefining constant
K'
D=KD•IN(10) =
198µV
K
yields
∆VD= K'D•T(KELVIN)
Figure 7. Diode Voltage VDvs Temperature T(°C)
TEMPERATURE (°C)
–50 –25
0.3
DIODE VOLTAGE (V)
0.5
0.8
050 75
0.4
0.7
0.6
25 100
4636 F07
125
Solving for temperature:
T(KELVIN)=
∆V
D
K'
D
(°CELSIUS)=T(KELVIN)–273.15
where
300°K = 27°C
means that is we take the difference in voltage across the
diode measured at two currents with a ratio of 10, the
resulting voltage is 198μV per Kelvin of the junction with
a zero intercept at 0 Kelvin.
Thediode connectedNPNtransistor attheTEMP pincanbe
used to monitor the internal temperature of the LTM4636.
Figure 8. The Tw o Images Show the LTM4636 Operating at 1V at
40A and 3.3V at 35A from a 12V Input. Both Images Reflect Only
a 40°C to 45°C Rise Above Ambient at Full Load Current with
200LFM.
8b.
8a.
VIN VOUT IOUT AIR FLOW
12 1 40 200 LFM
VIN VOUT IOUT AIR FLOW
12 3.3 35 200 LFM

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For more information www.linear.com/LTM4636
applicaTions inForMaTion
Overtemperature Protection
The LTM4636 has an overtemperature enhanced protec-
tion features that can be used to detect overtemperature.
The overtemperature feature uses the TMON pin voltage
to monitor temperature. This pin varies from 0.994V at
25°C to 1.494 at 150°C, and will tripoff at ≥ 150°C. Tying
TMON to ground disable this feature.
RUNP and RUNC Enable
The RUNP pin is used to enable the 5V PVCC supply that
powers the power driver stage and enables the power
stage ~1ms later. The RUNC pin is used to enable the
control section that drives the power stage. The RUNP
needs to be enabled first, and then RUNC. RUNP has a
0.85V threshold and can be connected to the input volt-
age and RUNC has a 1.35V threshold and a 10k resistor
to ground. See the Block Diagram for details. A 0.1µF
capacitor from the RUNC pin to ground is used to set the
delay for RUNC enable.
INTVCC and PVCC Regulators
The LTM4636 has an internal low dropout regulator from
VIN called INTVCC. This regulator output has a 4.7μF
ceramic capacitor internal. This regulator powers the
control section. The PVCC 5V regulator supplies power
to the power MOSFET driver stage. An additional 50mA
can be used from this 5V PVCC supply for other needs.
The input supply source resistance needs to be very low
in order to minimize IR drops when operating from a 5V
inputsource. Depending ontheoutput voltage andcurrent,
the input supply can source large current,and PVCC 5V
regulator needs a minimum 4.70V supply. Additional
input capacitance maybe needed for 5V inputs to limit
the input droop.
Stability Compensation
The LTM4636 has already been internally compensated
when COMPB is tied to COMPA for all output voltages.
Table 5 is provided for most application requirements.
For specific optimized requirements, disconnect COMPB
from COMPA, and use LTpowerCAD to perform specific
control loop optimization. Then select the desired external
compensation and output capacitance for the desired
optimized response.
SW Pins
The SW pins are generally for testing purposes by moni-
toring these pins. These pins can also be used to dampen
out switch node ringing caused by LC parasitic in the
switched current paths. Usually a series R-C combina-
tion is used called a snubber circuit. The resistor will
dampen the resonance and the capacitor is chosen to
only affect the high frequency ringing across the resistor.
If the stray inductance or capacitance can be measured or
approximated then a somewhat analytical technique can
be used to select the snubber values. The inductance is
usually easier to predict. It combines the power path board
inductance in combination with the MOSFET interconnect
bond wire inductance.
First the SW pin can be monitored with a wide bandwidth
scope with a high frequency scope probe. The ring fre-
quency can be measured for its value. The impedance Z
can be calculated:
Z(L) = 2πfL,
where f is the resonant frequency of the ring, and L is the
total parasitic inductance in the switch path. If a resistor
is selected that is equal to Z, then the ringing should be
dampened. The snubber capacitor value is chosen so that
its impedance is equal to the resistor at the ring frequency.
Calculated by: Z(C) = 1/(2πfC). These values are a good
place to start with. Modification to these components
should be made to attenuate the ringing with the least
amount of power loss. A recommended value of 2.2Ω in
series with 2200pF to ground should work for most ap-
plications. See Figure 19 for guideline. The 2.2Ω resistor
should be an 0805 size.
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configuration
section of the data sheet are consistent with those
param-
eters defined by JESD51-12 and are intended for use with
finite element analysis (FEA) software modeling tools that
leverage the outcome of thermal modeling, simulation,
and correlation to hardware evaluation performed on a
µModule package mounted to a hardware test board.
The motivation for providing these thermal coefficients
in found in JESD51-12 (“Guidelines for Reporting and
Using Electronic Package Thermal Information”).

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applicaTions inForMaTion
Manydesigners may opt touselaboratoryequipmentanda
testvehiclesuchasthedemo board to predict the µModule
regulator’s thermal performance in their application at
various electrical and environmental operating conditions
to compliment any FEA activities. Without FEA software,
the thermal resistances reported in the Pin Configuration
section are, in and of themselves, not relevant to providing
guidance of thermal performance; instead, the derating
curves provided in this data sheet can be used in a man-
ner that yields insight and guidance pertaining to one’s
application usage, and can be adapted to correlate thermal
performance to one’s own application.
The Pin Configuration section gives four thermal coeffi-
cients explicitly defined in JESD51-12; these coefficients
are quoted or paraphrased below:
1. θJA, the thermal resistance from junction to ambient, is
the natural convection junction-to-ambient air thermal
resistance measured in a one cubic foot sealed enclo-
sure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted
to a 95mm ×76mm PCB with four layers.
2. θJCbottom, the thermal resistance from junction to the
bottom of the product case, is determined with all of
the component power dissipation flowing through the
bottomof the package. InthetypicalµModule regulator,
the bulk of the heat flows out the bottom of the pack-
age, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
3 θJCtop, the thermal resistance from junction to top of
the product case, is determined with nearly all of the
componentpower dissipationflowingthrough thetopof
the package. As the electrical connections of the typical
µModule regulator are on the bottom of the package, it
is rare for an application to operate such that most of
the heat flows from the junction to the top of the part.
As in the case of θJCbottom, this value may be useful
for comparing packages but the test conditions don’t
generally match the user’s application.
4 θJB, the thermal resistance from junction to the printed
circuitboard, isthe junction-to-boardthermalresistance
where almost all of the heat flows through the bottom
of the µModule package and into the board, and is really
the sum of the θJCbottom and the thermal resistance of
the bottom of the part through the solder joints and a
portionof theboard.The boardtemperatureis measured
a specified distance from the package.
A graphical representation of the aforementioned ther-
mal resistances is given in Figure 9; blue resistances are
contained within the µModule regulator, whereas green
resistances are external to the µModule package.
Figure 9. Graphical Representation of JESD51-12 Thermal Coefficients
4637 F09
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION At
CASE (BOTTOM)-TO-BOARD
RESISTANCE