Microchip Technology SAM Series User manual

Basic 32-Bit MCU Design and Troubleshooting Checklist
PIC32MZ, PIC32MX, PIC32MM, PIC32MK, PIC32C, and SAM Devices
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 1

Table of Contents
PIC32MZ, PIC32MX, PIC32MM, PIC32MK, PIC32C, and SAM Devices...................................................... 1
1. Frequently Asked Questions (FAQs).......................................................................................................4
2. List of Figures..........................................................................................................................................6
3. List of Tables........................................................................................................................................... 8
4. List of Equations......................................................................................................................................9
5. Introduction........................................................................................................................................... 10
5.1. User Issue Submission Instructions........................................................................................... 10
5.2. Microchip Client Support Services............................................................................................. 10
5.3. Microchip Technical Support Services........................................................................................10
6. Basic 32-Bit MCU Design and Troubleshooting Menu Checklist...........................................................11
7. MCU Start-up Problems........................................................................................................................ 12
7.1. VDD Ramp Rate.........................................................................................................................12
7.2. Power Bypassing........................................................................................................................13
7.3. Power Sequencing..................................................................................................................... 15
7.4. I/O Pin Current Injection from Remote Circuits.......................................................................... 16
7.5. Crystal Oscillators...................................................................................................................... 18
7.6. Clock Switching.......................................................................................................................... 21
8. Unexpected Resets...............................................................................................................................23
8.1. PIC32MX/PIC32MM POR/BOR................................................................................................. 23
8.2. PIC32MZ/PIC32MK/PIC32C POR/BOR.....................................................................................23
8.3. NMI and Exception Events......................................................................................................... 24
8.4. ESD/EMI/EFT Events.................................................................................................................24
9. Debug Issues........................................................................................................................................ 26
9.1. ICD4/REAL_ICE ICSP (PGDx/PGCx) Debug Issues.................................................................26
9.2. JTAG/SWD................................................................................................................................. 28
10. PCB MCU Connections.........................................................................................................................30
10.1. Exposed Pad..............................................................................................................................30
10.2. PIC32MX/PIC32MM/PIC32MZ/PIC32MK VUSB3V3 Pin........................................................... 30
10.3. MCLR#/RESETN........................................................................................................................31
10.4. VBAT.......................................................................................................................................... 31
11. Serial Data Corruption Errors................................................................................................................33
11.1. Impedance Matching..................................................................................................................33
11.2. Ground Loops.............................................................................................................................35
11.3. SPI/SQI...................................................................................................................................... 36
11.4. SD Host Controller (SDHC)........................................................................................................39
11.5. UART..........................................................................................................................................41
11.6. USB............................................................................................................................................43
11.7. CAN FD...................................................................................................................................... 47
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 2

12. ADC.......................................................................................................................................................52
12.1. Typical SAM SAR ADC Total Unadjusted Error Sources (TUE).................................................52
12.2. ADC Noise..................................................................................................................................52
12.3. VREF Accuracy..........................................................................................................................54
12.4. Circuit IR Drop Errors................................................................................................................. 54
13. I2S and Push Button Protection Illustration........................................................................................... 57
13.1. Key I2S and Push Button Protection Design Points................................................................... 57
14. I2C......................................................................................................................................................... 58
14.1. Key I2C Protection Design Points...............................................................................................59
15. Inlet Power Protection Illustration..........................................................................................................60
16. Ethernet.................................................................................................................................................61
16.1. Special Ethernet 10/100 Base-T Design Guidelines.................................................................. 61
17. Comprehensive PCB Layout Guidelines and Recommendations.........................................................64
17.1. PCB Bypassing.......................................................................................................................... 68
17.2. PCB Layer Strategy....................................................................................................................68
17.3. PCB Signal Integrity Concerns...................................................................................................70
17.4. PCB Trace Considerations......................................................................................................... 71
18. Revision History.................................................................................................................................... 72
The Microchip Website.................................................................................................................................73
Product Change Notification Service............................................................................................................73
Customer Support........................................................................................................................................ 73
Microchip Devices Code Protection Feature................................................................................................ 73
Legal Notice................................................................................................................................................. 74
Trademarks.................................................................................................................................................. 74
Quality Management System....................................................................................................................... 75
Worldwide Sales and Service.......................................................................................................................76
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 3

1. Frequently Asked Questions (FAQs)
Problem 1: Intermittent start-up issues during power up or some devices will not start-up at all.
Problem 2: Intermittent start-up, wake from low power modes or analog repeatability issues.
Problem 3: Intermittent start-up and/or lock up issues on power-up.
Problem 4: Intermittent MCU POR, BOR, BOD reset issues during start-up resulting in exception errors or lock ups.
Problem 5: Some PIC32MZxxEFxx devices are intermittently not starting up when using primary oscillator with
crystal.
Problem 6: A PIC32MZxxEFxx is running at 200Mhz and there are lockups or exceptions errors on some devices.
Problem 7: An external clock is being used with the MCU in EC mode, a clock is being input to the MCU, but nothing
is happening.
Problem 8: Using a crystal with automatic gain control enabled, POSCAGC=1, and getting a clock fail detect.
Problem 9: Using auto gain control but seeing intermittent start-up issues on some boards and/or over temperature.
Problem 10: The MCU operating frequency is not as expected or no MCU code is executing.
Problem 11: Trying to clock switch from FRC to FRC w/PLL, but the system clock is still only 8Mhz and/or the
OSCCON.OSWEN bit indicates the clock switch never completed.
Problem 12: Sometimes a reset happens on a wake from sleep, or during a clock switch.
Problem 13: A lock-up sometimes occurs during a power anomaly or when power cycling the application.
Problem 14: Sometimes after hours, a lock-up occurs.
Problem 15: The device does not function. It is continuously stuck in a hard fault or a reset.
Problem 16: The PC does not recognize ICD4 and/or PICKIT 4.
Problem 17: In debug mode why are some PIC32MX/ PIC32MM/ PIC32MZ/ PIC32MK registers values not showing
as expected?
Problem 18: Unable to connect with ICD4 or RealIce to target.
Problem 19: Programming works, but not the debug.
Problem 20: What needs to be done with the exposed pad on the MCU package for the PCB design?
Problem 21: Some of I/O pins and/or alternate function pins are not working at all even though they are configured
correctly.
Problem 22: MPLAB does not connect to the PIC32 target device.
Problem 23: Do bypass caps need to be used on the VBAT input pin?
Problem 24: The external battery voltage cannot be measured correctly using the ADC.
Problem 25: There is frequent to intermittent data corruption between the MCU and target IC.
Problem 26: There is intermittent data corruption on communication links between remote PCB stations or
equipment.
Problem 27: Clock and data are present, but the target SPI device it is not responding.
Problem 28: Why is the SPI data always shifted by one bit?
Problem 29: Why is the SPI /SQI data corrupted?
Problem 30: The SD Card will not write or erase, only read.
Problem 31: The SD Card cannot be accessed.
Problem 32: Why is the UART data corrupted?
Problem 33: Why is the first UART byte always wrong after a power-up or wake from sleep?
Frequently Asked Questions (FAQs)
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 4

Problem 34: Why does a USB data transfer take longer than expected?
Problem 35: Why will the USB DEVICE not enumerate?
Problem 36: USB connection has been lost.
Problem 37: Why is the CAN sending message errors?
Problem 38: Why will the CAN not connect?
Problem 39: Why is the SAR ADC result 0v with input voltages up to 30mv or more?
Problem 40: Why is the SAR ADC results not consistent and/or accurate?
Problem 41: Why does the I2C com link not work?
Problem 42: An ETHERNET connection cannot be established.
Frequently Asked Questions (FAQs)
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 5

2. List of Figures
VDD ramp rate violation example.
VDD Soft start circuit to control VDD ramp rate Illustration.
PIC32MX / PIC32MM / PIC32MZ / PIC32MK Recommended Minimum CPU Power Bypassing.
SAM / PIC32C Recommended Minimum CPU Power Bypassing.
I/O pin Current Injection Illustration.
Injection Current Design Solution Option.
PIC32MZ/ PIC32MK, PIC32C & SAM Typical Primary Oscillator Crystal Circuit.
PIC32MX / PIC32MM Typical Primary Oscillator Crystal Circuit.
PIC32MZ/ PIC32MK VDD Crowbar Circuit Illustration.
ICD4 / RealIce Target Circuit Design Precautions.
ICD4 ICSP / JTAG / SWD Wiring Diagram.
PIC32MX/ PIC32MM/ PIC32MZ/ PIC32MK ICSP and Reset Circuit Illustration.
JTAG and Serial Wire Interface Illustration.
All Debugger RJ45 MCU Target Side Interface Pin Out.
Exposed Pad Landing Pattern Example Illustration.
MCLR# / RESETN Circuit Illustration.
VBAT Bypassing and Battery Monitoring Illustration.
Signal Integrity Illustration of Before and After Transmission.
Ground Loop Illustration Example.
SPI and SQI External EEPROM / SRAM / FLASH Design Illustration.
SPI SD Card Design Example Illustration.
SD Card Write Protect Switch Illustration.
Standard SD and Micro SD Card - SPI and SDHC Pin Out Illustration.
SD Card SDHC Design Example Illustration.
UART RS232 Design Example Illustration.
USB EYE Diagram Illustration.
USB HOST Design Example Illustration.
USB DEVICE Design Example Illustration.
CAN Nominal Bit Times Illustration.
Typical CAN Network.
CAN FD / LIN Design Example Illustration.
ADC PCB Design Induced Errors, Single Ended versus Differential Illustration.
Typical SAM / PIC32CM SAR ADC Block Diagram Illustration.
I2S and Push Button Protection Design Illustration.
I2C Protection Design Illustration.
Power Source Input Protection Illustration.
ETHERNET RMII Design Example Illustration.
List of Figures
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 6

Copper Ground Pour in PCB Voids.
Analog Versus Digital Ground Layout Placement.
Grounding Recommendations for External Connectors.
Printed Circuit Board Layout Examples.
Current Loops in the PCB Design Illustration.
High Speed Signal Termination Scope Plot Illustration.
List of Figures
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 7

3. List of Tables
Signal Isolation Components.
Typical PCB Trace Characteristics Illustration Only.
SPI Modes of Operation.
USB Modes and Data Rates Summary.
USB Transfer Types and Error Retry Summary.
USB PCB Layout Rules and Restrictions.
CAN FD Bit Time Registers.
Example I2C Level Shifter Logic Truth Table.
Ethernet Magnetics Selection Criteria.
PCB Trace Impedance Calculation Example:
Typical Trace Thicknesses Based on Copper Weight.
List of Tables
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 8

4. List of Equations
Equation 1: Crystal MFG CLOAD = {( [CIN + C1] * [COUT + C2] ) / [CIN + C1 + C2 + COUT] } + oscillator PCB stray
capacitance.
Equation 2: Simplified Crystal CLOAD formula: C1 = C2 = ((2 * MFG CLOAD spec) - CIN - (2 * PCB capacitance)).
Equation 3: PCB signal series termination resistor(s) value = {[(VDD-VOH(min)) / IOH(max)] - Trace Impedance}.
List of Equations
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 9

5. Introduction
The 32-bit MCU Design Checklist is a value-added service provided by Microchip to assist customers in the
development process. This document provides comprehensive guidelines for good design practices, common
troubleshooting issues and their cause, and possible corrections. This document also covers the following:
•Typical design-related issues and troubleshooting
• Best design practices
• Reference design examples
• ESD, EMI, and EFT protection considerations
• Typical peripheral usage issues (ADC, SPI, Ethernet, CAN FD, LIN, SQI, SDHC, UART, USB, and so on)
• PCB layout guidelines
For additional help, contact Microchip 32-bit design check service to provide assistance. A qualified engineering team
with expertise in 32-bit microcontrollers (PIC32 and SAM) will review and provide guidance on the design to expedite
the design cycle and help release the products to market faster.
5.1 User Issue Submission Instructions
Follow these steps to submit user issues:
1. Identify the key areas of concern and challenges in the application.
2. Use the Design and Trouble Shooting Menu to reference applicable sections of the interest.
3. Complete the information review noted in the “completed” column in the Design and Trouble Shooting Menu in
Chapter 1, prior to submitting an issue.
5.2 Microchip Client Support Services
www.microchip.com/clientsupport
5.3 Microchip Technical Support Services
microchipsupport.force.com/s/
Introduction
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 10

6. Basic 32-Bit MCU Design and Troubleshooting Menu Checklist
Table 6-1. 32-Bit MCU Troubleshooting Checklist Menu
Check List Item Issue Category Issue Type Completed
1 Functional Anomalies
• Before trouble shooting review the product errata sheet to ensure compliance with all known workarounds and to
avoid using non-supported features or modes. The errata listing can be found by going to the target MCU product
page and selecting the Documentation TAB.
2CPU Start-up problems
•VDD Ramp Rate
•Power Bypassing
•Power Sequencing
•I/O pin Current Injection
•Crystal oscillator(s)
•Clock Switching
3Unexpected Resets
•POR / BOR
•NMI (Non Maskable Interrupt - Exception errors)
•ESD / EMI / EFT Events
4Debug Issues •ICD4 / REAL_ICE ICSP (PGDx / PGCx)
•JTAG / SWD
5PCB MCU Connections
•Exposed PAD
•PIC32MZ/ PIC32MK VUSB3V3
•MCLR# / Reset#
•VBAT & Battery Monitoring
6Serial Data Corruption / Errors
•Impedance Matching
•Ground Loops
•SPI / SQI
•SD (SDHC)
•UART
•USB
•CAN FD
7ADC
•Typical SAM SAR ADC Total Unadjusted Error Sources
•ADC NOISE
•VREF ACCURACY
•Circuit IR drop Offsets
8I2S•I2S and PCB pushbutton protection and design example
9I2C•I2C protection and design example
10 Inlet Power Protection •EMI/EFT protection design example
11 Ethernet
•Typical Ethernet Issues
•Special Ethernet 10/100 Base-T Design Guidelines
•Unused Ethernet Cable Pairs Considerations
•Ethernet RJ45 Connector Considerations
•Ethernet Magnetics Considerations
•Ethernet design example
•KEY ETHERNET PROTECTION DESIGN POINTS
12 PCB Layout Guidelines •Comprehensive PCB Layout Guidelines & Recommendations
Note:
STEP 1: Identify the key areas of concern and challenges in the application.
STEP 2: Use this checklist to reference applicable sections of interest.
STEP 3: Complete the information review noted in the “completed” column of this table, prior to submitting an issue.
Basic 32-Bit MCU Design and Troubleshooting ...
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 11

7. MCU Start-up Problems
7.1 VDD Ramp Rate
Problem: 1: Intermittent start-up issues during power up or some devices will not start-up at all.
•Failing to meet the data sheet VDD ramp rate can cause lock-up issues or improper POR and BOR (i.e., BOD).
VDD ramp rates are specified in volts per unit time, meaning that throughout the entire power-up process from
0v to nominal VDD, the VDD voltage must comply with the ramp rate specification.
Note: The following VDD waveform contains (2) VDD ramp rate spec violations and can result in start-up issues. It
is not correct to assume that as long as the VDD reaches its nominal threshold within the ramp time that they comply
with the specification. This is an incorrect assumption and can be seen in the following VDD ramp rate figure below.
During two periods of time where the VDD plateaus, the VDD ramp rate is essentially 0v/ms and therefore does not
meet the ramp rate specification. This can cause issues because internal circuits have thresholds that when triggered
start various time delays that assert either internal reset and/or “Not Ready” signals to the internal logic for a limited
period of time. Some trigger logic is sensitive to rise times and therefore the noise riding on the VDD can also cause
the trigger logic output to chatter. This chatter that gates the enable/disable signals and resets the logic and state
machines, can cause logic metastability issues. The VDD does not start from 0V, and for some products may exceed
the minimum VPOR specification to guarantee a proper Power-on-Reset (POR). Therefore all MCUs have VDD ramp
rate specifications, sometimes including even ramp down rates to cover partial transitory power loss due to power
grid fluctuations.
Figure 7-1. VDD Ramp Rate Violation Example
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 12

• A simple VDD soft start circuit can be applied to any existing application regulator design to ensure a smooth
linear power-up. The ramp rate can be controlled by changing the resistor value RT.
– In LDO, the regulator bypass capacitor before and after the FET must be the same. The user must ensure
that the bypass capacitor between the regulator and FET meets the regulator’s minimum capacitive load as
defined in the related data sheet.
– In BUCK regulator the feedback and inductor circuity must be located on the regulator side between the
regulator and FET. The capacitor before and after the FET must be the same and meet the regulator’s
recommended minimum capacitive load requirement specification.
– At a slightly higher cost, use a regulator with an externally programmable soft start capacitor pin
Figure 7-2. VDD Soft Start Circuit to Control VDD Ramp Rate
VIN RT=Soft Start
VDD Ramp Time
5v 10k ~15±2ms
6v 14.3k ~18±2ms
9v 33.2k ~18±2ms
12v 49.9k ~18±2ms
16v 60.2k ~15±2ms
VOUT
Regulator
VIN (Max)
spec ≤18v
RT
1uf
25v
DMN2075U-7
(Up to 20v & 3.5A)
D
G
Users
Regulator
Circuit
Return to Checklist
7.2 Power Bypassing
Problem 2: Intermittent start-up, wake from low-power modes or analog repeatability issues.
Note: Improper bypassing can affect the MCU during peak current demand periods during start-up, exit from low-
power modes to Active mode, and clock switching between low-frequency operation to a higher clock operating
frequency. It can also have an effect on timing jitter and pronounced analog peripheral performance impacts.
• All capacitors ceramic w/ESR ≤ 1 Ohm ideally.
• All caps located on same side of the PCB as the MCU, except with packages, such as BGA where interior
package pins are not accessible.
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 13

• High-frequency bypass caps located as close to the device power pins as possible.
•BULK caps located close to the device, but in the case of multiple power pin groups that share the same
PCB power bus, distributed evenly around device perimeter in close proximity to target power pin pair groups.
For example, in some SAM families, VDDIOA and VDDIOB, call for separate 10 µf caps, but most designs
are connected together to the same PCB power bus. Do not connect both BULK caps side by side, instead
distribute and center near the individual VDDIOA and VDDIOB groups.
• All component leads to any power plane or ground plane must be as short as possible. The best solutions
are plane connection vias inside the surface mount pads. When using vias outside the surface mount pads,
pad-to-via connections must be less than 5-10 mils in length. Trace connections must be as wide as possible to
lower inductance. This will include any power ferrite beads feeding power planes, fuses feeding power planes,
and so on.
Figure 7-3. PIC32MX/PIC32MM/PIC32MZ/PIC32MK Recommended Minimum CPU Power Bypassing
10µf
* (2) VCORE
4.7µf
VSS
VDD
VSS
VUSB3V3
VSS
VDD
VSS
VDD
VDD
VSS VSS
VDD
VSS
VDD
VSS VDD
AVDD AVSS
PIC32
MX/MM/MK/MZ
XTAL
0.01uf
0.1uf 0.1uf
0.01uf
0.1uf
0.01uf
0.1uf
0.01uf
0.1uf
0.01uf
0.1uf
0.01uf
0.1uf
0.01uf
0.1uf
0.01uf
0.1uf
0.01uf
10µf
* (1) VCAP
VDD
1. VCAP Pin only present on PIC32MX/PIC32MM family.
2. VCORE & VDDR1V8 Pin only present on PIC32MZxxDAxx
family.
3. If External +VREF utilized.
*(2) VDDR1V8
0.1uf
0.01uf
0.1uf
0.01uf
10µf
0.1uf
+VREF
*(3) +VREF
MI0805J102R-10
MI0805J102R-10
Return to Checklist
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 14

Figure 7-4. SAM/PIC32C Recommended Minimum CPU Power Bypassing
GND
VDDIOA
GND
GND
VDDIOB
GND
VDDIOB
VDDIOA
GND
GND
VDDIOA
GND
VDDIOA
GND VDDIOB
0.1uf
0.1uf
PIC32C
SAMxx
XTAL
0.1uf 0.1uf
0.1uf
0.1uf
10µf
VDDIOB
1. VDDREG only present on some PIC32C variants.
2. If External VREF utilized.
VDDREG
VCORE
0.1uf
4.7µf
0.1uf
4.7µf
VBAT
0.1uf
10uf
10µf
VDDIOA
VDDANA
VCORE
VSW
MI0805J102R-10
MI0805J102R-10
LEXT:See
DataSheet
0.1uf
10µf
*(1) VDDREG
0.1uf
*(2) VREF
VREFx
MI0805J102R-10
MI0805J102R-10
MI1206L501R-10
Return to Checklist
7.3 Power Sequencing
Problem 3: The MCU is experiencing intermittent start-up and/or lock up issues on power-up.
•There are strict limits on voltage variations between different supplies on an MCU during power-up. In the
PIC32MX/ PIC32MM/PIC32MZ/PIC32MK, the VDD and AVDD must be no more than 0.3V apart during power-
up. In the SAM/PIC32C it is VDDIO, VREG, and VDDANA. If using different regulators for different MCU
supplies, it is critical that the designer consider how to manage this. This becomes even more critical in designs
that use cascaded regulator designs (i.e., 5V > 3.3V > 1.8V regulators). This can create power sequencing
issues, as well as voltage ramp differential synchronization specification violations.
• In the case of the PIC32MX/PIC32MM, one result of the VDD and AVDD not tracking can be that the nominal
VCORE of 1.8V will saturate at the nominal VDD voltage level. For short periods of time this may not harm the
device, but will eventually induce reliability issues.
• To avoid unexpected current injection through the MCU, internal I/O high side protection diodes that can lead
to MCU POR and start-up issues, ensure that signals originating from separately powered circuits be powered
on after the MCU has been powered first. Failure to do so can cause an external logic high signal to power the
MCU. If that is not possible consider using signal logic isolators, such as opto, capacitive, or inductive coupling
components, see figures 7-1, 7-5B, and 7-6).
Note: Even the same regulator part number will ramp up at different rates depending on the load and bulk
capacitance of the power bus.
Return to Checklist
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 15

7.4 I/O Pin Current Injection from Remote Circuits
Problem 4: Intermittent MCU POR, BOR, BOD reset issues occur during start-up, resulting in exception errors or
lock ups.
In interconnected designs, (i.e., cable connected PCB’s as depicted in the following figure to the left side of the
image), where remote interface circuits have independent power supply sources, injection current is a constant
concern that can cause intermittent start up related issues due to POR, BOR, and BOD anomalies because the
MCU can be powered through the I/O pins internal high side pin protection diodes (i.e., image on the right) rather
than the VDD when MCU power is switched off from the remote still active circuits. In those cases, the VDD never
actually goes to a voltage low enough to enable the MCU internal Power-on-Reset circuits properly. This can usually
be detected if that is the case by taking a scope plot during the power up and power off period and inspect for any
VDD anomalies where the VDD does not start from 0v volts as expected when it is turned off or the VDD appears
to power up to between 0.6v to 1.2v, plateaus for a brief time, then continues upward to its expected nominal value,
similar to the VDD Ramp Rate Violation example. Designs like these are very susceptible to the following:
• Power sequencing in the interconnected PCB network
•Ground loops which are covered later
Figure 7-5. I/O Pin Current Injection
+
-C
O
N
N
P
W
R
C
O
N
N
P
W
R
C
O
N
N
C
O
N
N
P
W
R
Remote PCB_1
Remote PCB_2
Power
Power
+
-
+
-
Power
MCU
Supply A
Supply B
Supply C
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 16

OPTIONS:
•The easiest design solution to circumvent unwanted injection current with remotely powered interconnected
PCB’s is depicted in the following figure. A lot of regulators, like MCP1727, MIC5528, MIC29151/301/501/751,
have either an ENB pin, a SHUTDOWN pin, or a POWER GOOD function pin. The solution depicted below
ensures that the MCU is always powered first before the remote PCBs are allowed to be powered on, hence the
remote PCBs cannot power the MCU by injection current through the MCU I/O internal high side input protection
diode. This also acts as a power sequencer. It is important that the MCU is always powered first. Whether the
MCU uses a regulator PWRGD or even an MCU I/O pin, it is always recommended that the user use a control
signal from the MCU PCB to make the other PCBs a power subject to the MCU PCB.
Method 1: A POWER GOOD on most regulators is an open collector output normally low until the MCU power has
reached 90% of nominal value. The output is Tri-stated and the 10k pull-up forces it to a logic high enabling the
remote PCB(s) regulator power.
Note: Using an MCU PCB regulator with POWER GOOD can also be used as an MCU reset supervisor when
connected to the MCU reset pin in the configuration shown in the following figure.
Method 2: Same concept and net result of Method 1, except using the MCU PCB VOUT as remote PCB regulator
ENABLE signal.
MCU Start-up Problems
© 2022 Microchip Technology Inc.
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Manual DS70005439B-page 17

Figure 7-6. Injection Current Design Solution Option
REG B
MCU REG A
VOUT
VIN
ENB GND
VOUT
VIN
GND
LOGIC
PWRGD
SHDN
100k
1k
MCU
RST
10k
0.1µf
REAL_ICE / ICD4
PWR_SRC_1 PWR_SRC_2
• For relatively low-speed signals (i.e., typically ≤ 2.5 MHz), a series resistor at the MCU input pins is in line
with the remote signals to limit the injection current to ~1.0 mA/pin will usually suffice. The sum of all injection
currents must not exceed ~15 mA total.
As a rule of thumb:
RSERIES(max) = ((VDD*0.75) /1 mA). Where, then the input signal Frequency(max) ≤ 1 / (1.95E-10 * RSERIES(max)).
Limiting the injection current to a sufficiently low value will insure it will not be able to power the MCU, and
impact the internal power on reset logic.
• Another option is to electrically isolate the interconnected signals using components similar to those listed in the
following table:
Table 7-1. Signal Isolation Components
Signal Isolation Components Inductive Coupling Capacitive Coupling Opto Coupling Analog Signal Coupling
ADuM7241 / 40 ARZ (1 Mbps) X
ADuM7241 / 40 CRZ (25 Mbps) X
ISO721 X
LTV-829S (2 Channel) X
LTV-849S (4 Channel) X
FSA266 / NC7WB66 X
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7.5 Crystal Oscillators
Note: In all MCUs, the crystal Automatic Gain Control (AGC), logic performs the AGC function only once at start-up.
They do not continuously monitor and adjust crystal gain over temperature or voltage changes.
7.5.1 PIC32MZxxEFxx
Problem 5: Using a primary oscillator with a crystal, but some PIC32MZxxEFxx devices are intermittently not starting
up.
Problem 6: Running a PIC32MZxxEFxx at 200 MHz and some devices are experiencing lockups or exception errors.
This MCU family has documented crystal errata that defines both required crystal circuit configurations, hardware
and software, as well as supported crystal frequencies in addition to silicon revision B2 errata concerning restricted
operating frequency versus Flash WS (i.e., wait states as defined in PRECON.PFMWS).
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 18

CAUTION
The PIC32MZxxEFxx silicon revision B2 currently supports only up to 184 MHz operation with 2 wait
states. Operating frequencies in excess of 184 MHz requires 3 WS. With program memory cache enabled;
however, this will affect MCU bandwidth <1.5%.
7.5.2 PIC32MK/PIC32MZxxDAxx/PIC32C
Problem 7: Using an external clock with the MCU in external clock (EC) mode, the clock is an input to the MCU, but
nothing is happening.
Problem 8: Using a crystal with automatic gain control enabled, POSCAGC = 1, and getting a clock fail detect.
These device families and some PIC32C variants of MCUs (consult data sheet for information) have automatic gain
control features defined by configuration words ‘enabled by default’ if not explicitly defined by the user which is often
overlooked. When the automatic gain control is enabled, the manual course and fine crystal gain settings are ignored.
When the POSCAGC bit is enabled and POSC HS mode is selected, in the appropriate configuration word, the
Primary Oscillator will automatically do a linear step search starting from the lowest crystal oscillator circuit gain to the
highest, to find the lowest power/gain setting to guarantee oscillation with the user’s crystal. The delay between each
AGC gain search step is defined by POSCAGCDLY.
CAUTION
If External Clock (EC) mode and AGC are selected, it will result in no internal clock and a dead CPU.
CAUTION
When AGC, POSCAGC = 1, and clock fail monitoring, the FCKSM is enabled in the configuration words.
If POSCAGCDLY is set to long, a “Clock Fail Detect”, OSCCON.CF and RNMICON.CF on some families,
can occur because the clock fail timeout expectancy expired before the AGC was able to reach a stable
gain step to allow stable crystal operation. Decrease the POSCAGCDLY settings.
If using an AGC and experiencing excessive crystal start-up delays, change the POSCAGCDLY settings.
7.5.3 SAMxx
Problem 9: Auto Gain Control is being used, but intermittent start-up issues are occurring on some boards and/or
over temperature.
The SAM product families that employ the equivalent to a crystal Automatic Gain Control, sometimes referred to as
Automatic Loop Control Enable (ENALC), or Automatic Amplitude Gain Control (AMPGC) depending on the product
family, work quite differently than the AGC of the PIC32MK / PIC32MZ families. In the SAM product families, the
manual gain settings are controlled by one of the following, depending on the family:
• XOSCCTRL.ENALC: XOSCCTRL.IMULT Oscillator Current Multiplier, XOSCCTRL.IPTAT Oscillator Current
Reference and XOSCCTRL.LOWBUFGAIN are crucial.
• XOSCCTRL.AMPGC: XOSCCTRL.GAIN.
In these instances, once the gain range has been selected by the user, the automatic gain control will only seek the
lowest crystal oscillator power level within the users selected gain range setting.
CAUTION
If users gain settings are too low, the automatic gain control will not help them and can result in random
oscillation failures across device population, particularly at colder temperatures and lower MCU operating
voltages. If any of these symptoms are experienced, increase the gain range using the appropriate
XOSCCTRL.LOWBUFGAIN = 1 or higher XOSCCTRL.GAIN setting for the family in question. In some
instances, better results are attained by disabling the automatic gain control and simply selecting a higher
gain setting. The automatic gain control will be better described as a gain attenuator in that for the selected
user, the gain setting will attenuate it to achieve the lowest power level to sustain oscillation.
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MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 19

7.5.4 Crystal Loading Capacitors
Crystal loading capacitors affect not only the crystals but the Automatic Gain Control circuits ability to oscillate. Many
users mistakenly assume that the load capacitors they must use in their circuit design are the crystal manufacturer
recommended load capacitors. The crystal manufacturers recommended CLOAD value in fact represents the
recommended EFFECTIVE circuit capacitance, not the actual literal capacitance to use.
Notes: Crystal series limiting resistance is not required if the MCU Automatic Gain Control features are used or
if no XOSC signal clipping is seen. To calculate the equivalent effective capacitance for selecting the crystal load
capacitance:
Equation 1: Crystal MFG CLOAD = {( [CIN + C1] * [COUT + C2] ) / [CIN + C1 + C2 + COUT] } + oscillator PCB stray
capacitance
Assuming C1 = C2 and XOSC pin CIN ~= XOSC pin COUT, the formula can be further simplified and restated to solve
for C1 and C2 by:
Equation 2: Simplified Crystal CLOAD formula: C1 = C2 = ((2 * MFG CLOAD spec) - CIN - (2 * PCB capacitance))
1. CIN and COUT must be defined in the data sheet, if not assume 4.5 pF for both.
2. If CIN ≠ COUT then CIN = COUT = (CIN DATA SHT + COUT DATA SHT)/2.
3. Standard PCB trace capacitance = 1.5 pF/12 mm (i.e., 1.5 pF/0.47 inches).
Tip: To increase oscillator gain (i.e., to increase peak-to-peak oscillator signal) follow these:
• Select a crystal oscillator with a lower XTAL manufacturer ESR rating.
• C1 and C2 values also affect the gain of the oscillator. The lower the values, the higher the effective
gain.
• To improve start-up performance, make C1 slightly smaller than C2.
Note: Some of these gain improvement tips are negated by using the Automatic Gain Control (AGC) option.
Figure 7-7. PIC32MZ/PIC32MM/PIC32MK/PIC32C and SAM Typical Primary Oscillator Crystal Circuit
XOUT XIN
C1
C2
RS
XTAL
OSC2 OSC1
RG= 1M
C1
C2
XTAL
Note: Crystal RS is not required if using Automatic Gain Control or if XOUT and XIN are not clipping. To monitor XOUT
or XIN on a scope, the user must use a special FET probe with ≤ 2 pF for good results. A standard Oscilloscope
10-12 pF probe will load and attenuate the crystal giving inaccurate results.
MCU Start-up Problems
© 2022 Microchip Technology Inc.
and its subsidiaries
Manual DS70005439B-page 20