Nvidia Jetson Orin NX Series User manual

DG-10931-001_v1.1 | April 2023
PRELIMINARY INFORMATION SUBJECT TO CHANGE
Jetson Orin NX Series and Jetson Orin
Nano Series
Product Design Guide

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | ii
Document History
DG-10931-001_v1.1
Version
Date
Description of Change
0.1
April 25, 2022
Preliminary information Subject to change
0.99
September 30, 2022
•Updated to include Orin Nano series modules in addition to Orin NX
series modules.
•Section 3.1. Added supported PCIe to NVMe configurationsfor
secondary boot storage.
•Table 6-1 and Section 6.1. Updated description of SYS_RESET*
behavior when drivenby carrier board.
•Section 6.1. Added note thatcarrierboards must support VDD_IN at
5V (support for higher voltage on VDD_IN optional)
•Figure 6-4. Power Up Sequence with Power Button. Added missing
text for last line (carrier board supplies)
•Table 7-3. USB3.2 and PCIe Lane Mapping: Corrected column title in
UPHY mapping table to Orin module instead of AGX Orin.
•Various: Updated on-module I2C pull-
1.0
December 20, 2022
•Table 2-1: Added mention of storage options on USB and PCIe
•Figure 2-1: Updated to include option for storage on USB 3.2 or PCIe
•Section 3.1:
>Corrected UPHY block to UPHY2 instead of UPHY1
>Added USB 3.2 optionfor storage
•Figure 5.1: Updated with Orin NX/Nano module
•Updated Table 6-1:
>Updated SLEEP/WAKE* to remove mention of pull-up on
module
>Updated SYS_RESET* on-module pull-up voltage
>Updated CLK_32K_OUT description
•Figure 6-3, Figure 6-4, Table 6-3, and Table 6-4: Updated
SYS_RESET_N delay from POWER_EN
•Figure 6-5: Updated figure to remove arrow from SHUTDOWN_REQ*
to carrier board supplies falling.
•Table 7-2:
>Corrected P/N swap for Orin signal names SF_PCIE7_CLK
(Pins 52/54)
>Corrected +/- swap for SF_PCIE9_CLK descriptions (Pins
227/229)
•Figure 9-1: Corrected P/N swap for SoC DPAUX pins
•Figure 9-2: Corrected P/N swap for SoC DPAUXand PIAUX221Z
device.
•Figure 9-8: Corrected P/N swap for SoC DPAUX

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | iii
Version
Date
Description of Change
•Table 10-1 and Figure 10-1: Updated to show swapped P/N on two
data lanes
•Table 10-3: Separated clock and data for all lanes.
•Figure 11-1: Updated notes to correct I2C pull-up resistor value on
module.
•Table 12-10: Updated CAN max data rate
1.1
April 7, 2023
•General: Updated to use Orin Nano DevKit Carrier Board as
reference design.
•Table 2-2: Updated legend
•Updated Chapter 4: Developer Kit Feature Considerations; also
updated USB Hub part number.
•Section 5.1: Replaced mention of Xavier NX SCL withOrin NX/Orin
Nano SCL.
•Section 6.1.1 and Figure 6-7: Updated Power Button Supervisor MCU
part #
•Figure 6-5: Added note above figure about possible discharge
circuits.
•Table 7-1: Added mention of Recovery mode for USB_D_N/P
interface.
•Updated: Table 7-3 and Table 7-4:
>Split UPHY mapping options into separate tables per UPHY block
>Updated text above tables allowing more configuration flexibility.
>Separated RP and EP into separate configurations within tables.
>Added two options for PCIe x4 (C4) in UPHY0 table with limitations.
•Section 7.1: Added mention of polarity inversion support for USB 3.2.
•Table 7-11: Removed mention of Root Port and Endpoint for PCIe
interface 1 (x1). Also changed from Endpoint to Root Port in title of
PCIe interface 3 (x1).
•Table 7-6, Table 7-8, Table 9-3, Table 9-5: Moved smaller figures
inside the table instead of following the table.
•Table 8-2: Added Max Inter-Pair (Pair to Pair) skewrequirement for
MDI.
•Table 9-1: Corrected HDMI_CEC Pin Type. See Jetson Orin NX 16GB
Hardware Errata for more details.
•Figure 9-1: Updated HDP connections to include series & pulldown
resistors and breakout details for level shifter.
•Figure 9-2: Removed CEC circuit from DP++ figure and added weak
pull-up to pin 14 of DP connector.
•Table 9-4: Updated Termination for DP1_AUX and DP1_HPD.
•Updated Figure 9-6:
>Added pulldown and seriesresistors on HPD after level shifter.
>Added details of HDMI_CEC circuit &HPD/DDC level shifters.
•Figure 10-1 and Figure 10-2: Separated 2-lane and 4-lane
configuration option examples.

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | iv
Version
Date
Description of Change
•Table 10-3: Updated 2-
•Table 12-1 and Figure 12-1: Added I2C usage on the module for I2C0
and I2C2.
•Table 13-2: Updated pull-up voltage and/or pull-up resistor values
for several pins.

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | v
Table of Contents
Chapter 1. Introduction............................................................................................ 1
1.1 References..........................................................................................................................1
1.2 Attachments.......................................................................................................................2
1.3 Abbreviations and Definitions............................................................................................2
Chapter 2. Jetson Orin Module................................................................................ 4
Chapter 3. Jetson Orin Module Boot Considerations ............................................. 9
3.1 QSPI Boot............................................................................................................................9
3.2 USB Recovery Mode...........................................................................................................9
Chapter 4. Developer Kit Feature Considerations ................................................ 11
4.1 Button Power MCU...........................................................................................................11
4.2 USB SuperSpeed Hub......................................................................................................12
4.3 Power over Ethernet........................................................................................................12
4.4 TI TXB0108 Level Shifters................................................................................................12
4.5 Features Not to Be Implemented....................................................................................12
Chapter 5. Modular Connector.............................................................................. 13
5.1 Module Connector Details...............................................................................................13
5.2 Module to Mounting Hardware........................................................................................13
5.3 Module Installation and Removal....................................................................................14
Chapter 6. Power................................................................................................... 15
6.1 Power Supply and Sequencing........................................................................................16
6.1.1 Power Button Supervisor MCU Power-On ...............................................................21
6.1.1.1 Defined Behaviors...............................................................................................23
6.1.1.2 Power-Off -> Power-On (Power Button Case) ..................................................23
6.1.1.3 Power-Off -> Power-On (Auto-Power-On Case)...............................................24
6.1.1.4 Power-On -> Power-Off (Long Power Button Press)........................................24
Chapter 7. USB and PCIe....................................................................................... 26
7.1 USB...................................................................................................................................30
7.1.1 USB 2.0 Routing Guidelines.......................................................................................31
7.1.2 USB 3.2 Routing Guidelines.......................................................................................31
7.1.2.1 Common USB Routing Guidelines.....................................................................34
7.2 PCIe...................................................................................................................................36
7.2.1 PCIe Routing Guidelines............................................................................................38
Chapter 8. Gigabit Ethernet................................................................................... 43
8.1.1 Ethernet MDI Routing Guidelines..............................................................................44

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | vi
Chapter 9. Display.................................................................................................. 45
9.1 eDP and DP.......................................................................................................................46
9.1.1 eDP and DP Routing Guidelines................................................................................47
9.2 HDMI.................................................................................................................................52
9.2.1 HDMI Routing Guidelines ..........................................................................................53
Chapter 10. MIPI CSI Video Input ............................................................................ 59
10.1 CSI Routing Guidelines....................................................................................................62
Chapter 11. Audio .................................................................................................... 64
11.1.1 I2S Routing Guidelines...............................................................................................65
Chapter 12. Miscellaneous Interfaces .................................................................... 67
12.1 I2C 67
12.1.1 I2C Design Guidelines................................................................................................68
12.1.2 I2C routing Guidelines ...............................................................................................68
12.2 SPI 69
12.2.1 SPI Routing Guidelines..............................................................................................70
12.3 UART71
12.4 CAN 72
12.4.1 CAN Routing Guidelines............................................................................................73
12.5 Fan 73
12.6 Debug................................................................................................................................74
Chapter 13. PADS .................................................................................................... 76
13.1 Internal Pull-Ups for Dual Voltage Block Pins Power at 1.8V.......................................76
13.2 Schmitt Trigger Usage.....................................................................................................76
13.3 Pins Pulled or Driven High During Power-On................................................................77
Chapter 14. Unused Interface Terminations........................................................... 78
14.1 Unused Multi-Purpose Standard CMOS Pad Interfaces................................................78
14.2 Unused Dedicated Special Purpose Pad Interfaces.......................................................78
Chapter 15. Design and Bring-Up Checklists......................................................... 79
Chapter 16. Orin Module Pin Descriptions.............................................................. 80
Chapter 17. General Routing Guidelines................................................................. 81
17.1 Signal Naming Convention ..............................................................................................81
17.2 Routing Guidelines Format..............................................................................................82
17.3 Signal Routing Conventions.............................................................................................82
17.4 Routing Guidelines...........................................................................................................82
17.4.1 General PCB Routing Guidelines..............................................................................83
17.5 Common High-Speed Interface Requirements..............................................................84
17.6 Test Points for High-Speed Interfaces............................................................................85

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | vii
Chapter 18. USB 3.2 and Wireless Coexistence...................................................... 86
18.1 Mitigation Techniques......................................................................................................86

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | viii
List of Figures
Figure 2-1. Jetson Orin Module Block Diagram......................................................................5
Figure 5-1. Jetson Orin Module Installed in SODIMM Connector.........................................14
Figure 5-2. Module to Connector Assembly Diagram...........................................................14
Figure 6-1. System Power and Control Block Diagram........................................................18
Figure 6-2. System Power and Control Block Diagram........................................................18
Figure 6-3. Power Up Sequence No Power Button Auto Power On ..................................19
Figure 6-4. Power Up Sequence with Power Button.............................................................19
Figure 6-5. Power Down Initiated by SHUTDOWN_REQ* Assertion.....................................20
Figure 6-6. Power Down Sudden Power Loss .......................................................................20
Figure 6-7. Power-On Button Circuit .....................................................................................22
Figure 6-8. Power-Off to On Sequence Power Button Case.................................................23
Figure 6-9. Power-Off to On Sequence Auto Power-On Case...............................................24
Figure 6-10. Power-On to Off Power Button Held Low > 10 Seconds....................................25
Figure 7-1. USB Micro B USB Device and Recovery Connection Example..........................30
Figure 7-2. USB 3.2 Type A Host Only Connection Example.................................................30
Figure 7-3. IL/NEXT Plot.........................................................................................................34
Figure 7-4. TDR Plot................................................................................................................34
Figure 7-5. PCIe Root Port Connections Example.................................................................36
Figure 7-6. PCIe Endpoint Connections Example..................................................................37
Figure 7-7. Insertion Loss S-Parameter Plot SDD21............................................................40
Figure 7-8. Insertion Loss S-Parameter Plot SDD11............................................................40
Figure 8-1. Orin Module Ethernet Connections.....................................................................43
Figure 8-2. Gigabit Ethernet Magnetics and RJ45 Connections...........................................44
Figure 9-1. DP and eDP Connection Example.......................................................................46
Figure 9-2. DP++ Connection Example ..................................................................................47
Figure 9-3. eDP and DP Differential Main Link Topology......................................................47
Figure 9-4. S-Parameter Up to HBR2....................................................................................50
Figure 9-5. S-Parameter Up to HBR3....................................................................................51
Figure 9-6. HDMI Connection Example..................................................................................52
Figure 9-7. HDMI CLK and Data Topology .............................................................................53
Figure 9-8. IL/FEXT Plot..........................................................................................................57
Figure 9-9. TDR Plot................................................................................................................57
Figure 10-1. CSI 2-Lane Connection Options...........................................................................60
Figure 10-2. CSI 4-Lane Connection Options...........................................................................61
Figure 10-3. Available Camera Control Pins ...........................................................................61
Figure 11-1. Audio Connection Example..................................................................................65
Figure 12-1. I2C Connections....................................................................................................68

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | ix
Figure 12-2. SPI Connections...................................................................................................70
Figure 12-3. Basic SPI Initiator and Target Connections........................................................70
Figure 12-4. SPI Topologies......................................................................................................70
Figure 12-5. Orin Module UART Connections..........................................................................72
Figure 12-6. Orin Module CAN Connections............................................................................73
Figure 12-7. Orin Module Fan Connections.............................................................................74
Figure 12-8. Debug UART Connections....................................................................................75
Figure 17-1. General PCB Routing Guidelines ........................................................................83
Figure 17-2. Common Mode Choke..........................................................................................84
Figure 17-3. Serpentine ............................................................................................................85

PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | x
List of Tables
Table 1-1. Abbreviations and Definitions................................................................................2
Table 2-1. Jetson Orin Module Interfaces..............................................................................4
Table 2-2. Jetson Orin Module Connector 260-Pin SO-DIMM Pinout Matrix.......................5
Table 6-1. Jetson Orin Module Power and System Pin Description ...................................15
Table 6-2. Power Button Supervisor Control Signals..........................................................21
Table 6-3. Power-Off to On Timing Power Button Case......................................................23
Table 6-4. Power-Off to On Timing Auto Power-On Case ...................................................24
Table 6-5. Power-On to Off Timing Power Button Held Low > 10 Seconds........................25
Table 7-1. Jetson Orin Module USB 2.0 Pin Description.....................................................26
Table 7-2. Jetson Orin Module USB 3.2 and PCIe Pin Description.....................................27
Table 7-3. UPHY0 Mapping Options (USB 3.2 and PCIe)......................................................29
Table 7-4. UPHY2 Mapping Options (PCIe)...........................................................................29
Table 7-5. USB 2.0 Interface Signal Routing Requirements...............................................31
Table 7-6. USB 3.2 Interface Signal Routing Requirements...............................................31
Table 7-7. Orin USB 2.0 Signal Connections........................................................................34
Table 7-8. Miscellaneous USB 2.0 Signal Connections.......................................................35
Table 7-9. Orin USB 3.2 Signal Connections........................................................................35
Table 7-10. PCIe Interface Signal Routing Requirements up to Gen4..................................38
Table 7-11. PCIe Signal Connections......................................................................................41
Table 8-1. Orin Module Gigabit Ethernet Pin Descriptions .................................................43
Table 8-2. Ethernet MDI Interface Signal Routing Requirements ......................................44
Table 8-3. Ethernet Signal Connections...............................................................................44
Table 9-1. Orin Module eDP, DP, and HDMI Pin Descriptions............................................45
Table 9-2. DP and HDMI Pin Mapping ..................................................................................46
Table 9-3. eDP and DP Main Link Signal Requirements Including DP_AUX......................48
Table 9-4. eDP and DP Signal Connections .........................................................................51
Table 9-5. HDMI Interface Signal Routing Requirements...................................................53
Table 9-6. HDMI Signal Connections....................................................................................58
Table 10-1. Orin Module CSI Pin Descriptions.......................................................................59
Table 10-2. Orin Module Camera Miscellaneous Pin Descriptions......................................60
Table 10-3. CSI Configurations ...............................................................................................62
Table 10-4. MIPI CSI D-PHY Interface Signal Routing Requirements..................................62
Table 10-5. MIPI CSI Signal Connections...............................................................................63
Table 10-6. Miscellaneous Camera Connections ..................................................................63
Table 11-1. Orin Module Audio Pin Descriptions...................................................................64
Table 11-2. I2S Interface Signal Routing Requirements.......................................................65
Table 11-3. Audio Signal Connection......................................................................................66