NXP Semiconductors ADC1412D Series User manual

Quick start ADC1412D,
ADC1212D, ADC1112D series
Demonstration board for ADC1412D, ADC1212D, ADC1112D
series
Rev. 7 — 6 August 2010 Quick start
Document information
Info Content
Keywords PCB2004-1, Demonstration board, ADC, Converter, ADC1412D,
ADC1212D and ADC1112D series.
Abstract This document describes how to use the demonstration board for the
analog-to-digital converter ADC1412D, ADC1212D and ADC1112D
series.
Overview

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 7 — 6 August 2010 2 of 41
Revision history
Rev Date Description
1 20081001 Initial version.
2 20090518 Update to PCB2004-1.2.
3 20090610 Add SPI software description.
4 20100518 Update to latest release of SPI software.
Add HSDC extension module acquisition system description.
5 20100601 Correction added.
6 20100730 Update for LVDS acquisition mode.
7 20100806 Update to latest acquisition software tool.

NXP Semiconductors
Quick start
Quick
start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
Rev. 7 — 6 August 2010
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41
1. Overview of the ADC1412D, ADC1212D, ADC1112D demo board
1.1 ADC1412D series
Figure 1 presents the connections to measure the ADC1412D series:
Fig 1. ADC1412D series typical configuration set-up
P
OWER SUPPLY
. I = 370 mA
. 3V
.GND
P
OWER SUPPLY
. I = 40 mA
.GND
.1.8V
LOGIC
ANALYZER
Output data ADC A (top to
bottom):
. DA13 (MSB) to DA0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
USB
SPI
MODULE
I
NPUT
B
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT
A
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single Sine wave clock signal
. Input common mode from IC
. Binary ADC output
. SPI Mode
. DAV for synchronization
Output data ADC B (top to
bottom):
. DB0 (LSB) to DB13 (MSB)

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Quick start
Quick
start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
Rev. 7 — 6 August 2010
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1.2 ADC1212D series
Figure 2 presents the connections to measure the ADC1212D series:
Fig 2. ADC1212D series typical configuration set-up
P
OWER SUPPLY
. I = 370 mA
. 3V
.GND
P
OWER SUPPLY
. I = 40 mA
.GND
.1.8V
LOGIC
ANALYZER
Output data ADC A (top to
bottom):
. DA11 (MSB) to DA0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
USB
SPI
MODULE
I
NPUT
B
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT
A
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single Sine wave clock signal
. Input common mode from IC
. Binary ADC output
. SPI Mode
. DAV for synchronization
Output data ADC B (top to
bottom):
. DB0 (LSB) to DB11 (MSB)

NXP Semiconductors
Quick start
Quick
start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
Rev. 7 — 6 August 2010
5 of
41
1.3 ADC1112D series
Figure 3 presents the connections to measure the ADC1112D series:
Fig 3. ADC1112D series typical configuration set-up
P
OWER SUPPLY
. I = 370 mA
. 3V
.GND
P
OWER SUPPLY
. I = 40 mA
.GND
.1.8V
LOGIC
ANALYZER
Output data ADC A (top to
bottom):
. DA10 (MSB) to DA0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
USB
SPI
MODULE
I
NPUT
B
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT
A
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single Sine wave clock signal
. Input common mode from IC
. Binary ADC output
. SPI Mode
. DAV for synchronization
Output data ADC B (top to
bottom):
. DB0 (LSB) to DB10 (MSB)

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 7 — 6 August 2010 6 of 41
N
M
F
F
s
in
=
1.4 Power supply
The board is powered with a 3 V
DC
and 1.8/3 V
DC
power supplies. A power supply
regulator is used to supply all the circuitry on the board.
Table 1. General power supply
Name Function View
J8 +3V green connector – Power supply 3 V
DC
/ 400 mA.
J7 +1.8V green connector – Power supply 1.8 V
DC
/ 100 mA
TP1 AGND test point – Digital ground
TP2 DGND test point – Analog ground
1.5 Input signals (IN, CLK)
The input clock signal can be either a sinewave or a LVCMOS signal.
To ensure a good evaluation of the device, the input signal and the input clock must be
synchronized together.
Moreover, the input frequency (Fi, MHz) and the clock frequency (Fclk, Msps) should
follow the formula, known as coherency criteria for FFT processing (see section 3.6):
where M is an odd number of period and N is the number of samples.
Table 2. Input signals
Name Function View
J1 IN A connector – Analog input signal ( 50Ω matching)
J2 CLKP connector – Single ended clock input signal ( 50Ω
matching), with a transformer.
J3 CLKN connector – Grounded on that demoboard
J4 IN B connector – Analog input signal ( 50Ω matching)
J8
J7
TP2
TP1
J1
J2
J3
J4

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 7 — 6 August 2010 7 of 41
1.6 Output signals (DA0 to DA13, DB0 to DB13, OTRA, DAV)
The digital output signal is available in binary, 2’s complement or gray format.
A Data Valid Output clock (DAV) is provided by the device for the data acquisition.
Table 3. Output signals
Name Function View
J5 Array connector – ADC A digital output(DA0 to DA13),
Out of range signal (OTRA)
J6 Array connector – ADC B digital output(DB0 to DB13) and
Data Valid (DAV)
1.7 SPI Mode
The ADC1412D can be controlled either by a Serial Peripheral Interface (SPI) or by
PIN.
Table 4. SPI Interface
Name Function View
J9 Array connector – SPI daughter board interface (for
debug only)
J10 USB connector – SPI daughter board interface
J6
J5
J9
J10
J9
J10

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 7 — 6 August 2010 8 of 41
1.8 SPI program
1.8.1 Main application
The SPI program allows the user to control the ADC1412D, ADC1212D and ADC1112D
device. First, run the application “Andromeda.exe”, this will display the following window:
Fig 4. SPI main window: detection of device
If the program does not detect any device, follow the instructions shown to you.
When the program detects the device connected to your PC, it will display the following
screen (It automatically detects the resolution):
Fig 5. SPI main window: successfully detect ADC1412D series
The main application will display the panel to drive the ADC1412D as described in the
following section.
All devices ADC1412D, ADC1212D or ADC1112D series can be controlled in same way.
The following shows only example for ADC1412D series, however everything is
compliant to other devices.
1.8.2 ADC1412D driver application
The panel driver for the ADC1412D series has 6 pages dedicated to various purposes.
The button “QUIT” will close the driver application (refer to as ADC1x1x.vi in window title)
and turn off the main application. To restart the application, click on the arrow.

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 7 — 6 August 2010 9 of 41
Fig 6. SPI main window: click on arrow to restart the application
1.8.2.1 Page Write single
This page allows writing on register at a time:
Fig 7. SPI main window: write page
This can be done by either:
•Selecting the register with its name, then enter the byte value (by default in
hexadecimal), and then press the “send” button (referred as above);
•Or enter the address of the register as defined in the datasheet, then enter the
byte value Global, and then press the send button (referred as above).
1.8.2.2 Page Global
This page allows getting access to the bit definition of registers “Reset and operating
mode” and “Clock” as defined in the datasheet:
Restart application







NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
Quick start
QS_ADC1412D_7.doc
©
NXP B.V.
2010
. All rights reserved.
Quick start Rev. 7 — 6 August 2010 10 of 41
Fig 8. SPI main window: global page
Perform any settings and then click on the “send” button to update the ADC1412D
registers.
1.8.2.3 Page Flexible
This page allows getting access to the bit definition of remaining registers as defined in
the datasheet: