NXP Semiconductors ADC1412D Series User manual

Quick start ADC1412D,
ADC1212D, ADC1112D series
Demonstration board for ADC1412D, ADC1212D, ADC1112D
series
Rev. 7 — 6 August 2010 Quick start
Document information
Info Content
Keywords PCB2004-1, Demonstration board, ADC, Converter, ADC1412D,
ADC1212D and ADC1112D series.
Abstract This document describes how to use the demonstration board for the
analog-to-digital converter ADC1412D, ADC1212D and ADC1112D
series.
Overview

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series
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Revision history
Rev Date Description
1 20081001 Initial version.
2 20090518 Update to PCB2004-1.2.
3 20090610 Add SPI software description.
4 20100518 Update to latest release of SPI software.
Add HSDC extension module acquisition system description.
5 20100601 Correction added.
6 20100730 Update for LVDS acquisition mode.
7 20100806 Update to latest acquisition software tool.

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1. Overview of the ADC1412D, ADC1212D, ADC1112D demo board
1.1 ADC1412D series
Figure 1 presents the connections to measure the ADC1412D series:
Fig 1. ADC1412D series typical configuration set-up
P
OWER SUPPLY
. I = 370 mA
. 3V
.GND
P
OWER SUPPLY
. I = 40 mA
.GND
.1.8V
LOGIC
ANALYZER
Output data ADC A (top to
bottom):
. DA13 (MSB) to DA0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
USB
SPI
MODULE
I
NPUT
B
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT
A
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single Sine wave clock signal
. Input common mode from IC
. Binary ADC output
. SPI Mode
. DAV for synchronization
Output data ADC B (top to
bottom):
. DB0 (LSB) to DB13 (MSB)

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1.2 ADC1212D series
Figure 2 presents the connections to measure the ADC1212D series:
Fig 2. ADC1212D series typical configuration set-up
P
OWER SUPPLY
. I = 370 mA
. 3V
.GND
P
OWER SUPPLY
. I = 40 mA
.GND
.1.8V
LOGIC
ANALYZER
Output data ADC A (top to
bottom):
. DA11 (MSB) to DA0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
USB
SPI
MODULE
I
NPUT
B
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT
A
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single Sine wave clock signal
. Input common mode from IC
. Binary ADC output
. SPI Mode
. DAV for synchronization
Output data ADC B (top to
bottom):
. DB0 (LSB) to DB11 (MSB)

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1.3 ADC1112D series
Figure 3 presents the connections to measure the ADC1112D series:
Fig 3. ADC1112D series typical configuration set-up
P
OWER SUPPLY
. I = 370 mA
. 3V
.GND
P
OWER SUPPLY
. I = 40 mA
.GND
.1.8V
LOGIC
ANALYZER
Output data ADC A (top to
bottom):
. DA10 (MSB) to DA0 (LSB)
C
LOCK SIGNAL
. sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
USB
SPI
MODULE
I
NPUT
B
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
I
NPUT
A
SIGNAL
. 2V
pp
sinewave
. AC
SYNTHESIZED
SIGNAL
GENERATOR
F
ILTER
. High-order
. Band pass
F
ILTER
. High-order
. Band pass
P
RESENTED CONFIGURATION
. 2V
pp
input full scale
. Single Sine wave clock signal
. Input common mode from IC
. Binary ADC output
. SPI Mode
. DAV for synchronization
Output data ADC B (top to
bottom):
. DB0 (LSB) to DB10 (MSB)

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N
M
F
F
s
in
=
1.4 Power supply
The board is powered with a 3 V
DC
and 1.8/3 V
DC
power supplies. A power supply
regulator is used to supply all the circuitry on the board.
Table 1. General power supply
Name Function View
J8 +3V green connector – Power supply 3 V
DC
/ 400 mA.
J7 +1.8V green connector – Power supply 1.8 V
DC
/ 100 mA
TP1 AGND test point – Digital ground
TP2 DGND test point – Analog ground
1.5 Input signals (IN, CLK)
The input clock signal can be either a sinewave or a LVCMOS signal.
To ensure a good evaluation of the device, the input signal and the input clock must be
synchronized together.
Moreover, the input frequency (Fi, MHz) and the clock frequency (Fclk, Msps) should
follow the formula, known as coherency criteria for FFT processing (see section 3.6):
where M is an odd number of period and N is the number of samples.
Table 2. Input signals
Name Function View
J1 IN A connector – Analog input signal ( 50Ω matching)
J2 CLKP connector – Single ended clock input signal ( 50Ω
matching), with a transformer.
J3 CLKN connector – Grounded on that demoboard
J4 IN B connector – Analog input signal ( 50Ω matching)
J8
J7
TP2
TP1
J1
J2
J3
J4

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1.6 Output signals (DA0 to DA13, DB0 to DB13, OTRA, DAV)
The digital output signal is available in binary, 2’s complement or gray format.
A Data Valid Output clock (DAV) is provided by the device for the data acquisition.
Table 3. Output signals
Name Function View
J5 Array connector – ADC A digital output(DA0 to DA13),
Out of range signal (OTRA)
J6 Array connector – ADC B digital output(DB0 to DB13) and
Data Valid (DAV)
1.7 SPI Mode
The ADC1412D can be controlled either by a Serial Peripheral Interface (SPI) or by
PIN.
Table 4. SPI Interface
Name Function View
J9 Array connector – SPI daughter board interface (for
debug only)
J10 USB connector – SPI daughter board interface
J6
J5
J9
J10
J9
J10

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1.8 SPI program
1.8.1 Main application
The SPI program allows the user to control the ADC1412D, ADC1212D and ADC1112D
device. First, run the application “Andromeda.exe”, this will display the following window:
Fig 4. SPI main window: detection of device
If the program does not detect any device, follow the instructions shown to you.
When the program detects the device connected to your PC, it will display the following
screen (It automatically detects the resolution):
Fig 5. SPI main window: successfully detect ADC1412D series
The main application will display the panel to drive the ADC1412D as described in the
following section.
All devices ADC1412D, ADC1212D or ADC1112D series can be controlled in same way.
The following shows only example for ADC1412D series, however everything is
compliant to other devices.
1.8.2 ADC1412D driver application
The panel driver for the ADC1412D series has 6 pages dedicated to various purposes.
The button “QUIT” will close the driver application (refer to as ADC1x1x.vi in window title)
and turn off the main application. To restart the application, click on the arrow.

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Fig 6. SPI main window: click on arrow to restart the application
1.8.2.1 Page Write single
This page allows writing on register at a time:
Fig 7. SPI main window: write page
This can be done by either:
•Selecting the register with its name, then enter the byte value (by default in
hexadecimal), and then press the “send” button (referred as above);
•Or enter the address of the register as defined in the datasheet, then enter the
byte value Global, and then press the send button (referred as above).
1.8.2.2 Page Global
This page allows getting access to the bit definition of registers “Reset and operating
mode” and “Clock” as defined in the datasheet:
Restart application







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Fig 8. SPI main window: global page
Perform any settings and then click on the “send” button to update the ADC1412D
registers.
1.8.2.3 Page Flexible
This page allows getting access to the bit definition of remaining registers as defined in
the datasheet:

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Fig 9. SPI main window: flexible page
Perform any settings and then click on the “send” button to update the ADC1412D
registers.
1.8.2.4 Page Read
This page allows reading the ADC1412D registers:

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Fig 10. SPI main window: read page
This can be done either:
•enter the address in field : the value will be automatically displayed in field 
(both fields shows values in hexadecimal by default);
•or by selecting the register with its own name on field : the value will be
automatically displayed in field (value in hexadecimal by default);
•or all the bank of registers: click on the “read all” button , this will automatically
update the table in field .
When all registers have been read, it is possible to save the data to a text file. The
settings are saved in a table-like format as shown below:
Table 5. Typical saving on text file
Content of file is shown as table format
Column 1 Column 2 Column 3
Register Name Address Value
Channel index 3 FF
Reset and operating mode 5 0
Clock 6 1
Internal reference 8 0
Output data standard 11 10
Output clock 12 C






















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Column 1 Column 2 Column 3
Offset 13 0
Test pattern 1 14 0
Test pattern 2 15 0
Test pattern 3 16 0
Fast OTR 17 0
CMOS output 20 E
LVDS DDR O/P 1 21 0
LVDS DDR O/P 2 22 0
Note that all data are saved in hexadecimal format.
Click on the “save to file” button : this will display a window to select the file to store
data to:
Fig 11. SPI main window: read page, select file to save data to dialog box
Make sure that you store your file with “.txt” extension: this will allow you to re-use the file
on the “Load file” page.
1.8.2.5 Page Compare ADC A&B
This page allows performing a comparison in between registers for both ADC A and ADC
B of the ADC1412D:

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Fig 12. SPI main window: compare ADC A&B page
To do the comparison, follow the procedure below:
•Select the first register and last register to be compared (buttons and );
•Click on “compare” button: the table will show the values of all registers in
the field of comparison for both ADC A and B.
A typical example is given below:
















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Fig 13. SPI main window: compare ADC A&B page, comparison result example
Click on the “save to file” button to save the result of the comparison: this will display a
window to select the file to store data to:
Fig 14. SPI main window: compare ADC A&B page, select file to save data to dialog box
The format of the text file is equivalent to the previous section and is given below:

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Table 6. Typical saving for comparison on text file
Content of file is shown as table format
Column 1 Column 2 Column 3
Register Name ADC A ADC B
Channel index 1 2
Reset and operating mode 0 0
Clock 1 1
Internal reference 0 0
Output data standard 10 10
Output clock C C
Offset 0 0
Test pattern 1 0 0
Test pattern 2 0 0
Test pattern 3 0 0
Fast OTR 0 0
CMOS output E E
LVDS DDR O/P 1 0 0
LVDS DDR O/P 2 0 0
1.8.2.6 Page Load file
This page allows downloading configuration data to the ADC1412D registers:

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Fig 15. SPI main window: load file page
It is not necessary to have a file that has the whole set of registers listed. The only
restriction is regarding the formatting of the file as given in section 1.5.2.4.
Note: this page can not be used to download data saved during the comparison process.
To download settings onto ADC1412D registers, follow the procedure below:
•Browse to select your file (button );
•Click on “load data” button .
A message on field and a progress bar will inform about the status of the operation
until message “download done!” is seen. The table is updated with the current values
downloaded at the fly:













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Fig 16. SPI main window: load file page, successful download performed

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2. HSDC extension module: acquisition board
The figure 17 shows an overview of the extension module HSDC-EXTMOD01/DB acquisition board:
Fig 17. HSDC extension module: acquisition board
+5V
P
OWER SUPPLY
. I = 3.2A
R
EFERENCE SIGNAL
. typical 10MHz
SIGNAL
GENERATOR
USB
SPI
MODULE
P
RESENTED CONFIGURATION
. acquisition board
. external reference signal
. LVDS DDR 16-bit input stream
. CMOS 2 16
-
bit channels input
LVDS
DDR
I/O
CONNECTOR
.
up to 325MHz 16
-
bit LVDS DDR
CMOS
I/O
CONNECTOR
. 2 channels up to 200MHz 16-bit
J
UMPER FOR
I/O
SUPPLY
. define either I/O is 1.8V or 3.3V

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The HSDC extension module is intended for acquisition/generation and clock generation
purpose. When connected to an ADC demo-board it is intended as an acquisition system
for digital output bits delivered by ADC, either CMOS (HE14 P1 connector) or LVDS DDR
(SAMTEC QTH_060_02 P2 connector).
The board brief specification is shown below:
•8MB memory size for acquisition pattern;
•2 16-bit channels CMOS up to 200 MHz;
•16-bit LVDS DDR input data stream up to 320 MHz;
•On-board or external reference for signal generation.
In this section the specific requirement for the use with ADC1412D demo-board will be
shown.
For more details on the HSDC-EXTMOD01/DB, please contact dataconverter-
[e-mail].
2.1 HSDC extension module: hardware initialization
Before using the generation board, make sure that you connect the USB cable prior to
the supply.
2.2 HSDC extension module: software initialization
Before using the generation board, the user needs to install software to control the board.
The steps are described below.
Go to the installation directory “\5. CGAP Software\Install” on the CD. Double click on the
file “CDM 2.04.16.exe” file.
Run the application “\5. CGAP Software\Install\USBConfigSetup.msi”, this will display the
following window:
Fig 18. “USBConfigSetup” window: step 1
Click “Next” to proceed with installation process: