NXP Semiconductors PTN38007-EVM User manual

UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
Rev. 1.0 — 28 June 2021 User manual
Document information
Information Content
Keywords PTN38007, PTN38003A, PTN5110, USB Type-C, CC Logic, Orientation
Detection, USB3.1 Gen2, USB3.2, USB4.0, SuperSpeed, DisplayPort, Linear
Redriver
Abstract The PTN38007-EVM/PTN38003A-EVM is capable of interfacing a USB
Type-C port with various alternate mode devices. The evaluation board is
intended for use as an evaluation and customer demonstration tool, as well as
a reference design.

NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
Rev Date Description
v.1.0 20210628 Initial version
Revision history
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
Important notice
NXP provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR
EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a
printed circuit board to make it easier to access inputs, outputs, and supply terminals.
This evaluation board may be used with any development system or other source of
I/O signals by simply connecting it to the host MCU or computer board via off-the-
shelf cables. This evaluation board is not a Reference Design and is not intended to
represent a final design recommendation for any particular application. Final device in
an application will be heavily dependent on proper printed circuit board layout and heat
sinking design as well as attention to supply filtering, transient suppression, and I/O
signal quality.
The goods provided may not be complete in terms of required design, marketing, and
or manufacturing related protective considerations, including product safety measures
typically found in the end product incorporating the goods. Due to the open construction
of the product, it is the user's responsibility to take any and all appropriate precautions
with regard to electrostatic discharge. In order to minimize risks associated with the
customers applications, adequate design and operating safeguards must be provided
by the customer to minimize inherent or procedural hazards. For any safety concerns,
contact NXP sales and technical support services.
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
1 Introduction
PTN38007 and PTN38003A (PTN38007/3A) are a Type-C USB3.2/ DP1.4 combo
redriver optimized for USB3 and DisplayPort applications on either the Downstream
Facing Port (DFP) or Upstream Facing Port (UFP) by following the four high-speed
differential data flow to extend the signal reach.
This document explains in detail how to connect the PTN38007/3A-EVM evaluation
board in a system using external PD controller in a stand-alone mode, and how to
configure the on-board multiplexers for each operation mode. The document also
illustrates the LPCUSBSIO module operation and configuration with the PTN38007/3A-
EVM evaluation board.
2 Finding kit resources and information on the NXP web site
NXP Semiconductors provides online resources for this evaluation board and its
supported device(s) on http://www.nxp.com.
The information page for PTN38007-EVM evaluation board is at http://www.nxp.com/
PTN38007-EVM, and the information page for PTN38003A-EVM evaluation board is
at http://www.nxp.com/PTN38003A-EVM. The information page provides overview
information, documentation, software and tools, parametrics, ordering information and
a Getting Started tab. The Getting Started tab provides quick-reference information
applicable to using the PTN38007/3A-EVM evaluation board, including the downloadable
assets referenced in this document.
2.1 Collaborate in the NXP community
The NXP community is for sharing ideas and tips, ask and answer technical questions,
and receive input on just about any embedded design topic.
The NXP community is at http://community.nxp.com.
3 Getting ready
Working with the PTN38007/3A-EVM evaluation board requires the kit contents,
additional hardware and a Windows PC workstation with installed software.
3.1 Kit contents
•Assembled and tested evaluation board in an anti-static bag
•Quick Start Guide
3.2 Additional hardware
In addition to the kit contents, the following hardware is necessary or beneficial when
working with this kit.
•One PC/Notebook with USB-C supporting USB3.2 Gen1/2, DisplayPort, Thunderbolt
3 (PTN38007 only), or USB4 (PTN38007 only). A USB-A connector is also needed to
configure EVM via micro-USB cable
•Corresponding device for evaluation: USB3.2 Gen1/2, DisplayPort monitor, Thunderbolt
3 (PTN38007 only), or USB4 (PTN38007 only)
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User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
•One Type-C cable to connect between EVM and device
•One micro-USB cable to connect EVM to a PC
3.3 Windows PC workstation
This evaluation board requires a Windows PC workstation. Meeting these minimum
specifications should produce great results when working with this evaluation board.
•USB-enabled computer with Windows 7 or Windows 10
3.4 Software
Installing software is necessary to work with this evaluation board. All listed software is
available on the evaluation board's information page at http://www.nxp.com/PTN38007-
EVM or http://www.nxp.com/PTN38003A-EVM.
4 Getting to know the hardware
The stand-alone board is intended to evaluate PTN38007/3A on an existing USB Type-
C port that supports USB3.1/3.2, DisplayPort, Thunderbolt 3 and USB4. When using
the DFP board (“H2” is marked on the top side of the board), the user connects the
upstream port (J101) of this evaluation board directly to a Type-C port of a computer or
phone without any Type-C cable, and downstream port (J102) is connected to a device
or docking station through either a standard Type-C cable, or tethered cable from the
device/dock.
When using the UFP board (“D2” is marked on the top side of the board), user connects
the downstream port (J201) of this evaluation board directly to a Type-C port of a device
or a docking station without any Type-C cable, and upstream port (J202) is connected to
a computer or a phone through a standard Type-C cable.
While this board is powered through a USB micro-B cable (5 V input) on J105,
PTN38007/3A, on-board AUX/LS multiplexers, and PCA9570 GPIO expanders are
powered up, and the user can use an I2C tool such as LPCUSBSIO (built-in function in
LPCUSBSIO module) to configure PTN38007/3A into different operating modes, using
the GPIO expander’s output to configure plug orientation and multiplexer selection (tri-
stated or DisplayPort AUX Enabled). A GUI interface is also available to configure the
above configurations.
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
4.1 Block diagram
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Figure 1. Block diagram
4.2 PCB photo
Figure 2. PTN38007/3A-EVM evaluation board front side
Figure 3. PTN38007/3A-EVM evaluation board back side
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
4.3 PTN38007/3A-EVM evaluation board schematics
4.3.1 Type-C connector and PTN38007/3A (DFP)
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Figure 4. Schematic of Type-C connector and PTN38007/3A (DFP)
The connection between PTN38007/3A and upstream/downstream Type-C receptacles
are according to the datasheet’s pin assignment.
When PTN38007/3A is used in DFP configuration, the board is marked with ‘H2’ as
“connecting to Host side”. J101 is used as a UFP port that plugs into a computer, and
J102 is used as a DFP port that plugs into a device or dock. CC1/CC2/VBUS/SBU1/
SUB2/USB2_D± signals pass through from the plug side to receptacle side.
Figure 5. Schematic of DFP board
On the DFP board, PTN38007/3’s 7-bit I2C address is set to 0110 000 by connecting
ADDR/ORIENT pin to GND directly. This address is being used by GUI to distinguish if
a DFP or a UFP board is being used. The AUTO_ORIENTATION_EN pin is pulled up by
default, thus the AUTO ORIENTATION DETECTION function is enabled. However, this
will not impact the normal operation. GUI scripts will always override this function, and
correct orientation is always programmed.
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
4.3.2 Type-C connector and PTN38007/3A (UFP)
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Figure 6. Schematic of Type-C Connector and PTN38007/3A (UFP)
The connection between PTN38007/3A and upstream/downstream Type-C receptacles
are according to the datasheet’s pin assignment.
When PTN38007/3A is used in UFP configuration, the board is marked with ‘D2’ as
“connecting to Device side”. J201 is used as a UFP port that plugs into a computer, and
J202 is used as a DFP port that plugs into a device or dock. CC1/CC2/VBUS/SBU1/
SUB2/USB2_D± signals pass through from the plug side to receptacle side.
Figure 7. Schematic of UFP board
On the UFP board, PTN38007/3A’s 7-bit I2C address is set to 0110 011 by connecting
ADDR/ORIENT pin to VDD directly. This address is being used by GUI to distinguish if
a DFP or a UFP board is being used. The AUTO_ORIENTATION_EN pin is pulled up by
default, thus the AUTO ORIENTATION DETECTION function is enabled. However, this
will not impact the normal operation. GUI scripts will always override this function, and
correct orientation is always programmed.
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
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NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
4.3.3 Low-speed switches
There are two layers of low-speed switches using NX3DV221 multiplexers; they are used
to sort out the correct polarity of the SBU signals, and then route to PTN38007/3A for
snooping purposes.
U104 is implemented as a crossbar switch to orient SBU1 and SBU2 signals as AUXP/
AUXN or AUXN/AUXP according to the MUX_ORIENTATION signal. U103 routes the
corresponding SBU1/2 signals to PTN38007/3A’s AUX and LS snooping pins, depending
on whether the interface is in DP alternate mode or Thunderbolt/USB4 mode.
Thunderbolt/USB4 mode and LS signal snooping is only available in PTN38007/3A, and
should be ignored in PTN38003A. In a design, these muxes are not needed since the
AUX snooping polarity can be changed through PTN38003A’s register 0x04 bit [3].
aaa-042398
D
P
_
T
B
T
_OEn1
A
U
X
N
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L
S
R
X
1
H
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_
S
B
U
2
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1
A
U
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N
1
G
N
D
1
C
1
2
3
0
.
1
u
F
V
D
D
3
V
3
_
1
M
U
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O
R
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E
N
T
A
T
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O
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1
V
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3
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3
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1
A
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L
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C
1
2
4
0
.
1
u
F
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T
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T
_SE
L
1
L
S
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X
1
G
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1
H
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1
_
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U
1
_
1
U
1
0
4
N
X
3
D
V
2
2
1
G
M
D
+
8
D
-
7
G
N
D
5
1
D
-
2
1
D
+
1
2
D
-
4
2
D
+
3
O
E
6
V
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C
1
0
S
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U
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0
3
N
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3
D
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2
21GM
D
+
8
D
-
7
G
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5
1
D
-
2
1
D
+
1
2
D
-
4
2
D
+
3
O
E
6
V
C
C
1
0
S
9
A
U
X
P_LS
T
X
1
Figure 8. Schematic of low-speed switches
4.3.4 GPIO expanders
Low-speed switch controls are configured through the GPIO expanders. The GUI user
interface also incorporates these controls.
aaa-042399
C
1
2
2
0
.
1
u
F
D
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_OEn1
S
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1
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P
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T
_SEL1
7
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i
t
A
d
d
r
e
s
s
0
1
0
-
0
1
0
0
=
0
x
2
4
U
1
0
2
P
C
A95
7
0
G
M
H
P
0
1
P
1
2
P
2
3
VSS
4
P
3
5
S
C
L
6
S
D
A
7
V
D
D
8
S
D
A
1
V
D
D
3
V
3
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1
G
N
D
1
M
U
X
_
O
R
I
E
N
T
A
T
I
O
N
1
Figure 9. Schematic of GPIO expanders
The following table summarizes the GPIO expander’s control signal assignment; its 7-bit
I2C slave address is 010 0100.
Bit Signal Name Comment
0 DP_TBT_SEL Select DisplayPort or Thunderbolt mode
0 = DisplayPort Alternate Mode
1 = Thunderbolt Alternate Mode
1 MUX_ORIENTATION Select CC line orientation
0 = Normal orientation
1 = Reversed orientation
Table 1. Control signal assignment for GPIO expander
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
9 / 26

NXP Semiconductors UM11595
PTN38007-EVM/PTN38003A-EVM evaluation board
Bit Signal Name Comment
2 DP_TBT_OEn Enable/Disable low-speed switch outputs
0 = Enabled
1 = Disabled
3 Output Not Used Data bit is used to further distinguish different operating modes
with the same byte programming.
Table 1. Control signal assignment for GPIO expander...continued
In each device operating mode, each bit should be configured as shown in Table 2 and
Table 3. Therefore, a predefined byte can be programmed to the GPIO expander’s output
while transitioning into different modes.
DFP configuration Mode 0
Safe State
Mode 1
USB3 Only
Mode 2
USB3+DP2Lane
Mode 3
DP4Lane
Mode 4
Thunderbolt
Mode 5
USB4.0
0 DP_TBT_SEL 1 1 0 0 0 0
1 MUX_ORIENTATION 0/1 0/1 0/1 0/1 0/1 0/1
2 DP_TBT_OEn 0 0 0 0 1 1
3 Not Used 0 1 0 1 0 1
Byte Programming 0x04/0x06 0x0c/0x0e 0x00/0x02 0x08/0x0a 0x01/0x03 0x09/0x0b
Table 2. DFP configuration
UFP configuration Mode 0
Safe State
Mode 1
USB3 Only
Mode 2
USB3+DP2Lane
Mode 3
DP4Lane
Mode 4
Thunderbolt
Mode 5
USB4.0
0 DP_TBT_SEL 1 1 0 0 0 0
1 MUX_ORIENTATION 0/1 0/1 0/1 0/1 0/1 0/1
2 DP_TBT_OEn 0 0 1 1 0 0
3 Not Used 0 1 0 1 0 1
Byte Programming 0x04/0x06 0x0c/0x0e 0x01/0x03 0x09/0x0b 0x00/0x02 0x08/0x0a
Table 3. UFP configuration
4.3.5 Board headers
aaa-042400
H
P
1
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C
C
1
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1
S
C
L
1
V
D
D
3
V
3
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VBu
s
_P0
J
1
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3
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T
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-
1
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5
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3
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L
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4
5
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7
8
9
1
0
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D
A
1
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3
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3
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1
VBu
s
_P0
G
N
D
1
J
1
0
4
F
T
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H
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0
5
-
0
3
-
L
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5
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8
9
1
0
G
N
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1
V
D
D
1
V
8
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1
H
P
1
_
C
C
2
_
1
G
N
D
1
Figure 10. Schematic of board headers
There are two 10-pin 50-mil spacing headers (J103 and J104) providing signal
connection to the PTN5110 PD baseboard (or LPCUSBSIO module) when the PD
baseboard is used. While using PTN38007/3A-EVM evaluation board by itself, J104 can
also connect to Aardvark I2C/SPI Host Adapter or Promira Serial Platform with a 100 mil
spacing to 50 mil spacing adapter (Digikey Part# 1471-1373-ND).
UM11595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 28 June 2021
10 / 26