NXP Semiconductors TWR-K70F120M User manual

Freescale Semiconductor Inc.
TWR-K70F120M Tower Module
User's Manual
Rev. 1.2

TWR-K70F120M Tower Module User's Manual Page 2 of 25
Table of Contents
1TWR-K70F120M and TWR-K70F120M-KIT Overview ...............................................................5
1.1 Contents..................................................................................................................................................................................6
1.2 Features ..................................................................................................................................................................................6
1.3 Getting Started.....................................................................................................................................................................8
1.4 Reference Documents.......................................................................................................................................................8
2Hardware Description ...........................................................................................................................8
2.1 K70FN1M0 Microcontroller...........................................................................................................................................9
2.2 Clocking ...............................................................................................................................................................................10
2.3 System Power....................................................................................................................................................................10
2.3.1 RTC VBAT ........................................................................................................................................................................................... 11
2.4 Debug Interface ................................................................................................................................................................11
2.4.1 OSJTAG ................................................................................................................................................................................................. 11
2.4.2 Cortex Debug+ETM Connector.................................................................................................................................................. 11
2.5 Graphical LCD Interface ................................................................................................................................................12
2.6 DDR2 Memory...................................................................................................................................................................12
2.7 NAND Flash ........................................................................................................................................................................ 12
2.8 Infrared Port......................................................................................................................................................................12
2.9 Accelerometer...................................................................................................................................................................12
2.10 Potentiometer, Pushbuttons, LEDs........................................................................................................................12
2.11 General Purpose Tower Plug-in (TWRPI) Socket............................................................................................13
2.12 Touch Interface..............................................................................................................................................................13
2.13 Ethernet ............................................................................................................................................................................14
2.14 USB......................................................................................................................................................................................15
2.14.1 FS/LS USB ........................................................................................................................................................................................ 15
2.14.2 HS USB ............................................................................................................................................................................................... 15
2.15 Secure Digital Card Slot ..............................................................................................................................................15
2.16 External Bus Interface –FlexBus............................................................................................................................15
3Jumper Table.......................................................................................................................................... 16
4Input/Output Connectors and Pin Usage Table......................................................................... 17
5Tower Elevator Connections ............................................................................................................ 19

TWR-K70F120M Tower Module User's Manual Page 3 of 25
List of Figures
Figure 1. Freescale Tower System Overview .............................................................................................. 5
Figure 2. Callouts on front side of the TWR-K70F120M ............................................................................. 7
Figure 3. Callouts on back side of the TWR-K70F120M.............................................................................. 7
Figure 4. TWR-K70F120M Block Diagram ................................................................................................... 9
List of Tables
Table 1. Cortex Debug+ETM Connector Pinout ........................................................................................ 11
Table 2. General Purpose TWRPI socket pinout ....................................................................................... 13
Table 3. Touch TWRPI socket pinout ........................................................................................................ 14
Table 4. Ethernet operation jumper settings ........................................................................................... 14
Table 5. TWR-K70F120M Jumper Table.................................................................................................... 16
Table 6. I/O Connectors and Pin Usage Table........................................................................................... 17
Table 7. TWR-K70F120M Primary Connector Pinout ............................................................................... 19
Table 8. TWR-K70F120M Primary Connector Pinout ............................................................................... 22
Revision History
Revision
Date
Changes
0.1
Nov 17, 2011
Initial Release for PWA 700-27166 Rev B
1.0
Dec 2, 2011
Removed references to J18 and added info on using
J19 to replace J18’s functionality.
1.1
Nov 20, 2012
Added information on running EVB at 150MHz
Added jumper details for rev C board
Added information on using trace

TWR-K70F120M Tower Module User's Manual Page 4 of 25
1.2
May 29, 2014
Updated USB section to include instruction for
connections to allow for USB OTG testing.

TWR-K70F120M Tower Module User's Manual Page 5 of 25
1TWR-K70F120M and TWR-K70F120M-KIT Overview
The TWR-K70F120M is a development board for the K61 and K70 family 32-bit ARM® Cortex™-M4
MCUs. The TWR-K70F120M is populated with a device rated for 120 MHz operation across the full -40C
to 85C temperature range. At room temperatures the board can be over-clocked to 150 MHz to allow
for evaluation of the K70 and K61 devices that are rated for 150 MHz operation across the full
temperature range.
The TWR-K70F120M is a Tower Controller Module compatible with the Freescale Tower System. It can
function as a stand-alone, low-cost platform for the evaluation of the Kinetis K10, K20, K6x, and K70
family of microcontroller (MCU) devices. The TWR-K70F120M features the Kinetis K70 low-power
microcontroller based on the ARM® Cortex™-M4 architecture with graphical LCD controller, tamper
detection, USB 2.0 HS Controller, USB 2.0 full-speed OTG controller and 10/100 Mbps Ethernet MAC.
The TWR-K70F120M is available as a stand-alone product or as a kit (TWR-K70F120M-KIT) with the
Tower Elevator Modules (TWR-ELEV) and the Tower Serial Module (TWR-SER). The TWR-K70F120M can
also be combined with other Freescale Tower peripheral modules to create development platforms for
a wide variety of applications. 0 provides an overview of the Freescale Tower System.
Figure 1. Freescale Tower System Overview

TWR-K70F120M Tower Module User's Manual Page 6 of 25
1.1 Contents
The TWR-K70F120M contents include:
TWR-K70F120M board assembly
3ft USB cable
Interactive DVD with software installers and documentation
Quick Start Guide
The TWR-K70F120M-KIT contains:
TWR-K70F120M MCU module
TWR-ELEV –Primary and Secondary Elevator Modules
TWR-SER –Serial module including USB host/device/OTG, Ethernet, CAN, RS232 and RS485
1.2 Features
Figure 2 and Figure 3 show the TWR-K70F120M with some of the key features called out. The following
list summarizes the features of the TWR-K70F120M Tower MCU Module:
Tower compatible microcontroller module
MK70FN1M0VMJ12: K70FN1M in a 256 MAPBGA with 120 MHz operation
Touch Tower Plug-in Socket
General purpose Tower Plug-in (TWRPI) socket
On-board JTAG debug circuit (OSJTAG) with virtual serial port
1Gb of DDR2 SDRAM memory
2Gb of SLC NAND flash memory
Three axis accelerometer (MMA8451Q)
Four (4) user-controllable LEDs
Four (4) capacitive touch pads
Two (2) user pushbutton switches
Potentiometer
Battery Holder for 20mm lithium battery (e.g. 2032, 2025)
Micro-SD Card slot

TWR-K70F120M Tower Module User's Manual Page 7 of 25
Figure 2. Callouts on front side of the TWR-K70F120M
Figure 3. Callouts on back side of the TWR-K70F120M

TWR-K70F120M Tower Module User's Manual Page 8 of 25
1.3 Getting Started
Follow the Quick Start Guide found printed in the TWR-K70F120M box or the interactive DVD for the
list of recommended steps for getting started. There are also lab walk-through guides available on the
tool support page for the TWR-K70F120M: http://www.freescale.com/TWR-K70F120M.
1.4 Reference Documents
The documents listed below should be referenced for more information on the Kinetis family, Tower
System, and MCU Modules. These can be found in the documentation section of freescale.com/TWR-
K70F120M or freescale.com/kinetis.
TWR-K70F120M-QSG: Quick Start Guide
TWR-K70F120M-SCH: Schematics
TWR-K70F120M-PWB: Design Package
K70 Family Product Brief
K70 Family Reference Manual
Tower Configuration Tool
2Hardware Description
The TWR-K70F120M is a Tower Controller Module featuring the MK70FN1M0VMJ12—an ARM Cortex-
M4 based microcontroller with graphical LCD controller, tamper detection, USB 2.0 HS Controller, USB
2.0 full-speed OTG controller and 10/100 Mbps Ethernet MAC in a 256 MAPBGA package with a
maximum core operating frequency of 120MHz. It is intended for use in the Freescale Tower System
but can operate stand-alone. An on-board debug circuit, OSJTAG, provides a JTAG debug interface and
a power supply input through a single USB mini-AB connector. Figure 4 shows a block diagram of the
TWR-K70F120M. The following sections describe the hardware in more detail.

TWR-K70F120M Tower Module User's Manual Page 9 of 25
OSJTAG
JTAG, Power, SCI K70FN1M0
256 MAPBGA
Tower Elevator Expansion Connectors
SDHC, I2S, SPI, I2C, ADC, USB, DAC, PWM, UARTs, Flexbus, Ethernet, LCD, and ULPI
50 MHz OSC
SCI
Freescale Device External Connectors Interface Circuits Power
MMA8451Q
Infrared Port
IR Output
Comparator
GPIO / Interrupts
ADC
Reset LED
JTAG
32.768 KHz XTAL
3.3V5.0V
General Purpose
Tower Plug-in
(TWRPI)
Touch Tower Plug-in
(TWRPI)
TSI, GPIO Capacitive
Touch
Pads
LED
LED
LED
uSD Card
Slot
USB
Mini-B
Battery
Holder VBAT (RTC)
5.0V
12 MHz XTAL
SDHC
SPI, I2C, ADC, GPIO
I2C1Gb
DDR2
2Gb
NAND
Flash
Memory
DDR Controller
NFC/FlexBus
Figure 4. TWR-K70F120M Block Diagram
2.1 K70FN1M0 Microcontroller
The TWR-K70F120M module features the MK70FN1M0VMJ12. The K70 microcontroller family is part
of the Kinetis portfolio of devices built around an ARM Cortex-M4 core. Refer to the K70 Family
Product Brief and the K70 Family Reference Manual for comprehensive information on the
MK70FN1M0VMJ12 device. The key features are listed here:
32-bit ARM Cortex-M4 core with DSP instructions
120MHz maximum core operating frequency
256 MAPBGA, 17mm x 17mm, 1.0mm pitch package
1.71V –3.6V operating voltage input range
1 Mbyte of program flash, 128 Kbytes of static RAM
DDR controller supporting DDR1, LPDDR1, and DDR2 memory
NAND flash controller
External bus interface
Power management controller with 10 different power modes
Multi-purpose clock generator with PLL and FLL operation modes
16-bit SAR ADC, 12-bit DAC
High-speed analog comparator with 6-bit DAC
Programmable voltage reference
USB high-speed OTG controller
USB full-speed/low-speed OTG/Host/Device controller with device charge detect
10/100 Mbps Ethernet MAC

TWR-K70F120M Tower Module User's Manual Page 10 of 25
SPI, I2C (w/ SMBUS support), UART (w/ ISO7816, CEA709.1-B (LON), and IrDA support), CAN, I2S
SD Host Controller (SDHC)
GPIO with pin interrupt support, DMA request capability, digital glitch filtering
Capacitive touch sensing inputs (TSI)
Debug interfaces: JTAG, cJTAG, SWD
Trace: TPIO, FPB, DWT, ITM, ETM, ETB
2.2 Clocking
The Kinetis MCUs start up from an internal digitally controlled oscillator (DCO). Software can enable
one, two, or three external oscillators if desired. Two of the external oscillators provide clocks to the
Multipurpose Clock Generator (MCG) module and can range from 32.768 KHz up to a 32 MHz crystal or
ceramic resonator. The external oscillator for the Real Time Clock (RTC) module accepts a 32.768 kHz
crystal.
The EXTAL0 and EXTAL1 pins of the main external oscillators can also be driven directly from an
external clock source. The TWR-K70F120M features a 50 MHz on-board clock oscillator connected to
EXTAL0 as seen in sheet 4 of the schematics. However, when the K70 Ethernet MAC is operating in
RMII mode, synchronization of the MCU input clock and the 50 MHz RMII transfer clock is important.
In this mode, the MCU input clock must be kept in phase with the 50 MHz clock supplied to the
external PHY. Therefore, the TWR-K70F120M provides the option (see jumper description in Table 5)
to select the clock input to the MCU from 1) the on-board 50MHz source or 2) an external clock from
the CLKIN0 pin on the Primary Connector. When the K70 is operating in Ethernet RMII mode, the
Tower peripheral module implementing the RMII PHY device should drive a 50 MHz clock on the
CLKIN0 signal that is kept in phase with the clock supplied to the RMII PHY. Refer to section 2.13
“Ethernet” for more information.
The TWR-K70F120M also includes a 12MHz crystal connected to EXTAL1/XTAL1.
2.3 System Power
In stand-alone operation, the main power source for the TWR-K70F120M module is derived from the
5.0V input from either the USB mini-B connector, J13, or the debug header, J11, when a shunt is placed
on jumper J12. A low-dropout regulator provides a 3.3V supply from the 5.0V input voltage. Refer to
sheet 6 of the TWR-K70F120M schematics for more details.
When installed into a Tower System, the TWR-K70F120M can be powered from either an on-board
source or from another source in the assembled Tower System. If both the on-board and off-board
sources are available, the TWR-K70F120M will default to the off-board source.
The 3.3V power supplied to the MCU is routed through two jumpers, J8 and J20. J8 can be supplies
VDD to the processor and also VDD_INT as long as J20 is installed. J20 supplies VDD_INT to the
processor. The jumper shunts can be removed to allow for either 1) alternate MCU supply voltages to
be injected or 2) the measurement of power consumed by the MCU.

TWR-K70F120M Tower Module User's Manual Page 11 of 25
2.3.1 RTC VBAT
The Real Time Clock (RTC) module on the K70 has two modes of operation, system power-up and
system power-down. During system power-down, the RTC is powered from the backup power supply,
VBAT. The TWR-K70F120M provides a battery holder for a coin cell battery that can be used as the
VBAT supply. The holder can accept common 20mm diameter 3V lithium coin cell batteries (e.g. 2032,
2025). Refer to the description J17 in Table 5 “TWR-K70F120M Jumper Table” for more information.
2.4 Debug Interface
There are two debug interface options provided: the on-board OSJTAG circuit and an external Cortex
Debug+ETM connector.
2.4.1 OSJTAG
An on-board MC9S08JM60 based Open Source JTAG (OSJTAG) circuit provides a JTAG debug interface
to the K70FN1M0. A standard USB A male to Mini-B male cable (provided) can be used for debugging
via the USB connector, J13. The OSJTAG interface also provides a USB to serial bridge. Drivers for the
OSJTAG interface are provided in the P&E Micro Kinetis Tower Toolkit (available on the included DVD).
2.4.2 Cortex Debug+ETM Connector
The Cortex Debug+ETM connector is a 20-pin (0.05") connector providing access to the SWD, SWV,
JTAG, cJTAG, EzPort and ETM trace (4-bit) signals available on the K70 device. The pinout and K70 pin
connections to the debug connector, J11, is shown in Table 1Table 1.
NOTE: The TRACE_CLKOUT signal is not connected to the debug connector by default. In order to use
trace functionality R137 should be populated and R138 and R11 should be removed.
Table 1. Cortex Debug+ETM Connector Pinout
Pin
Function
TWR-K70F120M Connection
1
VTref
3.3V MCU supply (P3V3_MCU)
2
TMS / SWDIO
PTA3/SCI0_RTS_b/FTM0_CH0/JTAG_MS/SWD_DIO
3
GND
GND
4
TCK / SWCLK
PTA0/SCI0_CTS_b/FTM0_CH5/JTAG_CLK/SWD_CLK/EZP_CLK
5
GND
GND
6
TDO / SWO
PTA2/SCI0_TX/FTM0_CH7/JTAG_DO/TRACE_SWO/EZP_DO
7
Key
―
8
TDI
PTA1/SCI0_RX/FTM0_CH6/JTAG_DI/EZP_DI
9
GNDDetect
PTA4/FTM0_CH1/MS/NMI_b/EZP_CS_b
10
nRESET
RESET_b
11
Target Power
5V supply (via J12)
12
TRACECLK
PTA6/FTM0_CH3/TRACE_CLKOUT
13
Target Power
5V supply (via J12)
14
TRACEDATA[0]
PTA10/FTM2_CH0/FTM2_QD_PHA/TRACE_D0
15
GND
GND
16
TRACEDATA[1]
PTA9/FTM1_CH1/FTM1_QD_PHB/TRACE_D1
17
GND
GND

TWR-K70F120M Tower Module User's Manual Page 12 of 25
Pin
Function
TWR-K70F120M Connection
18
TRACEDATA[2]
PTA8/FTM1_CH0/FTM1_QD_PHA/TRACE_D2
19
GND
GND
20
TRACEDATA[3]
PTA7/FTM0_CH4/TRACE_D3
Note: Many of the trace signals connected to the debug connector are also connected elsewhere on
the TWR-K70F120M. Refer to Table 6 “I/O Connectors and Pin Usage Table” and Table 7 “TWR-
K70F120M Primary Connector Pinout” for more information.
2.5 Graphical LCD Interface
The K70FN1M0 processor includes an on-chip graphical LCD controller module. The module is not used
directly on the TWR-K70F120M board, but the LCD signals are routed to the Secondary connector,
allowing the connection to an external LCD or additional circuitry on a Tower peripheral module.
The TWR-LCD-RGB will provide an LCD panel and all required external circuitry so that it can interface
directly to the TWR-K70F120M. This is an easy way to evaluate the graphical LCD module on the K70
processor.
2.6 DDR2 Memory
The TWR-K70F120M includes 1Gb of DDR2 memory (MT47H64M16HR-25). The board also includes a
DDR regulator that provides the main 1.8V supply for the memory and the processors SDRAM pads as
well as VTT and VREF voltages.
2.7 NAND Flash
The TWR-K70F120M includes 2Gb of SLC NAND flash memory (MT29F2G15ABAEAWP). The data lines
used for the NAND flash are shared between the NAND flash controller and the FlexBus interface.
Internal arbitration logic in the processor allows for dynamic sharing between the NAND flash and
FlexBus interfaces.
2.8 Infrared Port
An infrared transmit and receive interface is implemented on the board. The CMT_IRO pin directly
drives an infrared diode. The receiver uses an infrared phototransistor connected to an on-chip analog
comparator through a low-pass filter. Internal to the K70 device, the output of the analog comparator
can be routed to a UART module for easier processing of the incoming data stream.
2.9 Accelerometer
An MMA8451Q digital accelerometer is connected to the K70 MCU through an I2C interface and a
GPIO/IRQ signal. Refer to Table 6 “I/O Connectors and Pin Usage Table” for connection details.
2.10 Potentiometer, Pushbuttons, LEDs
The TWR-K70F120M features two pushbutton switches connected to GPIO/interrupt signals, one
pushbutton connected to the master reset signal, four capacitive touch pad electrodes, four user-
controllable LEDs, and a potentiometer connected to an ADC input signal. Refer to Table 6 “I/O
Connectors and Pin Usage Table” for information about which port pins are connected to these
features.

TWR-K70F120M Tower Module User's Manual Page 13 of 25
2.11 General Purpose Tower Plug-in (TWRPI) Socket
The TWR-K70F120M features a socket that can accept a variety of different Tower Plug-in modules
featuring sensors, RF transceivers, and more. The General Purpose TWRPI socket provides access to
I2C, SPI, IRQs, GPIOs, timers, analog conversion signals, TWRPI ID signals, reset, and voltage supplies.
The pinout for the TWRPI Socket is defined in Table 2.
Refer to Table 6 “I/O Connectors and Pin Usage Table” for the specific K70 pin connections to the
General Purpose TWRPI socket.
Table 2. General Purpose TWRPI socket pinout
Left-side 2x10 Connector
Right-side 2x10 Connector
Pin
Description
1
5V VCC
2
3.3 V VCC
3
GND
4
3.3V VDDA
5
VSS (Analog GND)
6
VSS (Analog GND)
7
VSS (Analog GND)
8
ADC: Analog 0
9
ADC: Analog 1
10
VSS (Analog GND)
11
VSS (Analog GND)
12
ADC: Analog 2
13
VSS (Analog GND)
14
VSS (Analog GND)
15
GND
16
GND
17
ADC: TWRPI ID 0
18
ADC: TWRPI ID 1
19
GND
20
Reset
Pin
Description
1
GND
2
GND
3
I2C: SCL
4
I2C: SDA
5
GND
6
GND
7
GND
8
GND
9
SPI: MISO
10
SPI: MOSI
11
SPI: SS
12
SPI: CLK
13
GND
14
GND
15
GPIO: GPIO0/IRQ
16
GPIO: GPIO1/IRQ
17
GPIO: GPIO2
18
GPIO: GPIO3
19
GPIO: GPIO4/Timer
20
GPIO: GPIO5/Timer
2.12 Touch Interface
The touch sensing input (TSI) module of the Kinetis MCUs provides capacitive touch sensing detection
with high sensitivity and enhanced robustness. Each TSI pin implements the capacitive measurement of
an electrode.
The TWR-K70F120M provides two methods for evaluating the TSI module. There are four individual
electrodes on-board the TWR-K70F120M that simulate pushbuttons. Additionally, twelve TSI signals
are connected to a Touch Tower Plug-in (TWRPI) socket that can accept Touch TWRPI daughter cards
that may feature keypads, rotary dials, sliders, etc.
The pinout for the Touch TWRPI socket is defined in Table 3. Refer to Table 6 “I/O Connectors and Pin
Usage Table” for the specific K70 pin connections to the Touch TWRPI socket.

TWR-K70F120M Tower Module User's Manual Page 14 of 25
Table 3. Touch TWRPI socket pinout
Pin
Description
1
5V VCC
2
3.3 V VCC
3
Electrode 0
4
3.3V VDDA
5
Electrode 1
6
VSS (Analog GND)
7
Electrode 2
8
Electrode 3
9
Electrode 4
10
Electrode 5
11
Electrode 6
12
Electrode 7
13
Electrode 8
14
Electrode 9
15
Electrode 10
16
Electrode 11
17
ADC: TWRPI ID 0
18
ADC: TWRPI ID 1
19
GND
20
Reset
2.13 Ethernet
The K70FN1M0 features a 10/100 Mbps Ethernet MAC with MII and RMII interfaces. The TWR-
K70F120M routes the RMII interface signals from the K70 MCU to the Primary Connector, allowing the
connection to an external Ethernet PHY device on a Tower peripheral module.
When the K70 Ethernet MAC is operating in RMII mode, synchronization of the MCU clock and the 50
MHz RMII transfer clock is important. The MCU input clock must be kept in phase with the 50 MHz
clock supplied to the external PHY. Therefore, the TWR-K70F120M provides the option (see jumper
descriptions Table 5) to clock the MCU from an external clock from the CLKIN0 pin on the Primary
Connector. The Tower peripheral module implementing the RMII PHY device should drive a 50 MHz
clock on the CLKIN0 pin that is kept in phase with the clock supplied to the RMII PHY.
The TWR-SER module that comes as part of the TWR-K70F120M-KIT provides a 10/100 Ethernet PHY
that can operate in either MII or RMII mode. By default the PHY is boot strapped to operate in MII
mode; therefore jumper configuration changes may be required. Table 4 shows the settings for proper
interoperability between the Ethernet interface on the TWR-SER and the TWR-K70F120M.
Table 4. Ethernet operation jumper settings
Tower Module
Jumper
Setting
TWR-K70F120M(rev B)
J19
OFF
TWR-K70F120M(rev C)
J18
ON

TWR-K70F120M Tower Module User's Manual Page 15 of 25
TWR-SER
J2
3-4
TWR-SER
J3
2-3
TWR-SER
J12
9-10
2.14 USB
The K70FN1M0 features two different USB modules--a USB full-speed/low-speed OTG/Host/Device
controller with built-in transceiver and a high-speed OTG/Host/Device controller that requires a
external ULPI PHY.
2.14.1 FS/LS USB
The TWR-K70F120M routes the USB D+ and D- signals from the K70 MCU to the Primary Connector,
allowing the connection to external USB connectors or additional circuitry on a Tower peripheral
module.
The TWR-SER module included as part of the TWR-K70F120M-KIT provides a USB OTG/Host/Device
interface with a mini-AB USB connector. There are many configuration options that can be selected to
evaluate different USB modes of operation. By default, the TWR-SER is configured for USB Device
operation. Please refer to the documentation included with the TWR-SER for more information on the
configuration options.
Note: In order to use the USB module in true OTG mode, VREGIN must be powered before the USB
cable is plugged in. By default the board does not support this. The board can be modified by removing
the jumper on J1, then directly connecting P5V_ELEV (or another 5V net that will be active during
testing) to pin1 of J1 so that VREGIN has a 5V supply independent of the USB port on the TWR-SER
board.
2.14.2 HS USB
The TWR-K70F120M routes the ULPI interface signals for the high-speed USB module to the Secondary
Connector allowing the connection to an external ULPI PHY or additional circuitry on a Tower
peripheral module.
The TWR-SER2 module includes a ULPI PHY that can be used with the TWR-K70F120M in order to
evaluate the high-speed USB functionality. The TWR-SER2 is not included as part of the TWR-
K70F120M-KIT, but the boards can be ordered individually from Freescale.
2.15 Secure Digital Card Slot
A Micro-Secure Digital (SD) card slot is available on the TWR-K70F120M connected to the SD Host
Controller (SDHC) signals of the K70 MCU. This slot will accept micro-SD memory cards. Refer to Table
6 “I/O Connectors and Pin Usage Table” for the SDHC signal connection details.
2.16 External Bus Interface –FlexBus
The K70 device features a multi-function external bus interface called the FlexBus interface controller
capable of interfacing to slave-only devices. The FlexBus interface is not used directly on the TWR-
K70F120M. Instead, a subset of the FlexBus is connected to the Primary Connector so that the external

TWR-K70F120M Tower Module User's Manual Page 16 of 25
bus can access devices on Tower peripheral modules. Refer to Table 7 “TWR-K70F120M Primary
Connector Pinout” and sheet 8 of the TWR-K70F120M schematics for more details.
3Jumper Table
There are several jumpers on the TWR-K70F120M that provide configuration selection and signal
isolation. Refer to the following table for details. The default installed jumper settings are shown in
bold with asterisks.
Table 5. TWR-K70F120M Jumper Table
Jumper
Option
Setting
Description
J1
USB VREGIN Power
Connection
*ON*
Connect USB0_VBUS from Primary Elevator (A57) to
VREGIN
OFF
Disconnect VREGIN from Primary Elevator
J2
Infrared Transmitter
Connection
ON
Connect PTD7/CMT_IRO/UART0_TX to IR Transmitter (D1)
*OFF*
Disconnect PTD7/CMT_IRO/UART0_TX from IR Transmitter
(D1)
J8
MCU Power Connection
*ON*
Connect on-board 3.3V supply to MCU
OFF
Isolate MCU from power supply (allows for external supply
or power measurements)
J10
OSJTAG Mode Selection
ON
OSJTAG bootloader mode (OSJTAG firmware
reprogramming)
*OFF*
Debugger mode
J12
JTAG Power Connection
ON
Connect on-board 5V supply to JTAG port (supports
powering board from external JTAG probe)
*OFF*
Disconnect on-board 5V supply from JTAG port
J16
Infrared Receiver
Connection
ON
Connect DAC1_OUT/CMP2_IN3 to IR Receiver
*OFF*
Disconnect DAC1_OUT/CMP2_IN3 to IR Receiver
J17
VBAT Power Selection
*1-2*
Connect VBAT to on-board 3.3V supply
2-3
Connect VBAT to the higher voltage between on-board 3.3V
supply or coin-cell supply
J18
(revC
board)
50 MHz oscillator output
enable
ON
On-board 50MHz oscillator disabled. Off-board clock drives
main EXTAL.
NOTE: This option should be selected whenever a tower
module card that provides a clock on primary elevator pin
B24 is connected to the CPU module. Otherwise there will be
contention between the two clock sources.
*OFF*
On-board 50MHz oscillator enabled. On-board 50 MHz clock
drives main EXTAL.

TWR-K70F120M Tower Module User's Manual Page 17 of 25
J19
(revC
board)
50 MHz oscillator power
*ON*
Power supply to 50MHz oscillator enabled.
OFF
Power supply to 50MHz oscillator disabled.
J19
(revB
board)
50MHz clock disable.
*ON*
On-board 50MHz oscillator enabled. On-board 50 MHz clock
drives main EXTAL.
OFF
On-board 50MHz oscillator disabled. Off-board clock drives
main EXTAL.
NOTE: This option must be selected whenever a tower
module card that provides a clock on primary elevator pin
B24 is connected to the CPU module. Otherwise there will be
contention between the two clock sources.
J20
MCU VDD_INT Power
Connection
*ON*
Connect VDD and VDD_INT rails together
OFF
Isolate MCU VDD_INT from power supply (allows for
external supply or power measurements)
4Input/Output Connectors and Pin Usage Table
The following table provides details on which K70FN1M0 pins are used to communicate with the LEDs,
switches, and other I/O interfaces onboard the TWR-K70F120M.
Note: Some port pins are used in multiple interfaces on-board and many are potentially connected to
off-board resources via the Primary and Secondary Connectors. Take care to avoid attempted
simultaneous usage of mutually exclusive features.
Table 6. I/O Connectors and Pin Usage Table
Feature
Connection
Port Pin
Pin Function
OSJTAG USB-to-
serial Bridge
OSJTAG Bridge RX Data
PTE17
UART2_RX
OSJTAG Bridge TX Data
PTE16
UART2_TX
SD Card Slot
SD Clock
PTE2
SDHC0_DCLK
SD Command
PTE3
SDHC0_CMD
SD Data0
PTE1
SDHC0_D0
SD Data1
PTE0
SDHC0_D1
SD Data2
PTE5
SDHC0_D2
SD Data3
PTE4
SDHC0_D3
SD Card Detect
PTE28
PTE28
Infrared Port
IR Transmit
PTD7
CMT_IRO
IR Receive
―
CMP2_IN3
Pushbuttons
SW1 (IRQ0)
PTD0
PTD0
SW2 (IRQ1)
PTE26
PTE26
SW3 (RESET)
RESET_b
RESET_b
Touch Pads
E1 / Touch
PTA4
TSI0_CH5
E2 / Touch
PTB3
TSI0_CH8
E3 / Touch
PTB2
TSI0_CH7
E4 / Touch
PTB16
TSI0_CH9

TWR-K70F120M Tower Module User's Manual Page 18 of 25
LEDs
E1 / Orange LED
PTA11
PTA11
E2 / Yellow LED
PTA28
PTA28
E3 / Green LED
PTA29
PTA29
E4 / Blue LED
PTA10
PTA10
Potentiometer
Potentiometer (R71)
―
ADC1_DM1
Accelerometer
I2C SDA
PTE18
I2C0_SDA
I2C SCL
PTE19
I2C0_SCL
INT1
PTB4
PTB4
INT2
PTB7
PTB7
General Purpose
TWRPI Socket
TWRPI AN0 (J4 Pin 8)
―
ADC0_DP0/ADC1_DP3
TWRPI AN1 (J4 Pin 9)
―
ADC0_DM0/ADC1_DM3
TWRPI AN2 (J4 Pin 12)
―
ADC1_DP0/ADC0_DP3
TWRPI ID0 (J4 Pin 17)
―
ADC0_DP1/ADC2_DP0/ADC3_DP3
TWRPI ID1 (J4 Pin 18)
―
ADC0_DM1/ADC2_DM0/ADC3_DM3
TWRPI I2C SCL (J5 Pin 3)
PTE19
I2C0_SCL
TWRPI I2C SDA (J5 Pin 4)
PTE18
I2C0_SDA
TWRPI SPI MISO (J5 Pin 9)
PTD14
SPI2_SIN
TWRPI SPI MOSI (J5 Pin
10)
PTD13
SPI2_SOUT
TWRPI SPI SS (J5 Pin 11)
PTD15
SPI2_PCS1
TWRPI SPI CLK (J5 Pin 12)
PTD12
SPI2_SCK
TWRPI GPIO0 (J5 Pin 15)
PTB4
PTB4
TWRPI GPIO1 (J5 Pin 16)
PTB8
PTB8
TWRPI GPIO2 (J5 Pin 17)
PTB9
PTB9
TWRPI GPIO3 (J5 Pin 18)
PTA19
PTA19
TWRPI GPIO4 (J5 Pin 19)
PTE26
PTE26
Touch Pad /
Segment LCD TWRPI
Socket
Electrode 0 (J3 Pin 3)
PTB0
TSI0_CH0
Electrode 1 (J3 Pin 5)
PTB1
TSI0_CH6
Electrode 2 (J3 Pin 7)
PTB2
TSI0_CH7
Electrode 3 (J3 Pin 8)
PTB3
TSI0_CH8
Electrode 4 (J3 Pin 9)
PTC0
TSI0_CH13
Electrode 5 (J3 Pin 10)
PTC1
TSI0_CH14
Electrode 6 (J3 Pin 11)
PTC2
TSI0_CH15
Electrode 7 (J3 Pin 12)
PTA4
TSI0_CH5
Electrode 8 (J3 Pin 13)
PTB16
TSI0_CH9
Electrode 9 (J3 Pin 14)
PTB17
TSI0_CH10
Electrode 10 (J3 Pin 15)
PTB18
TSI0_CH11
Electrode 11 (J3 Pin 16)
PTB19
TSI0_CH12
TWRPI ID0 (J3 Pin 17)
―
ADC1_DP1
TWRPI ID1 (J3 Pin 18)
―
ADC1_SE16
I2S/SAI Header
RX_FS
PTE8
I2S0_RX_FS
TX_FS
PTE11
I2S0_TX_FS
TXD0
PTE10
I2S0_TXD0

TWR-K70F120M Tower Module User's Manual Page 19 of 25
RXD0
PTE7
I2S0_RXD0
RX_BCLK
PTE9
I2S0_RX_BCLK
TX_BCLK
PTE12
I2S0_TX_BCLK
MCLK
PTE6
I2S0_MCLK
5Tower Elevator Connections
The TWR-K70F120M features two expansion card-edge connectors that interface to the Primary and
Secondary Elevator boards in a Tower system. The Primary Connector (comprised of sides A and B) is
utilized by the TWR-K70F120M while the Secondary Connector (comprised of sides C and D) only
makes connections to the GND pins. Table 7 provides the pinout for the Primary Connector.
Table 7. TWR-K70F120M Primary Connector Pinout
TWR-K70F120M Primary Connector
Pi
n
#
Side B
Pi
n
#
Side A
Name
Group
Usage
Name
Group
Usage
B1
5V
Power
5.0V Power
A1
5V
Power
5.0V Power
B2
GND
Power
Ground
A2
GND
Power
Ground
B3
3.3V
Power
3.3V Power
A3
3.3V
Power
3.3V Power
B4
ELE_PS_SENSE
Power
Elevator Power
Sense
A4
3.3V
Power
3.3V Power
B5
GND
Power
Ground
A5
GND
Power
Ground
B6
GND
Power
Ground
A6
GND
Power
Ground
B7
SDHC_CLK /
SPI1_CLK
SDHC /
SPI 1
PTE2
A7
SCL0
I2C 0
PTE19
B8
SDHC_D3 /
SPI1_CS1_b
SDHC /
SPI 1
A8
SDA0
I2C 0
PTE18
B9
SDHC_D3 /
SPI1_CS0_b
SDHC /
SPI 1
PTE4
A9
GPIO9 / CTS1
GPIO /
UART
PTE18
B1
0
SDHC_CMD /
SPI1_MOSI
SDHC /
SPI 1
PTE3
A1
0
GPIO8 /
SDHC_D2
GPIO /
SDHC
PTE5
B1
1
SDHC_D0 /
SPI1_MISO
SDHC /
SPI 1
PTE1
A1
1
GPIO7 /
SD_WP_DET
GPIO /
SDHC
PTE27
B1
2
ETH_COL
Ethernet
A1
2
ETH_CRS
Etherne
t
B1
3
ETH_RXER
Ethernet
PTA5
A1
3
ETH_MDC
Etherne
t
PTB1
B1
4
ETH_TXCLK
Ethernet
A1
4
ETH_MDIO
Etherne
t
PTB0
B1
5
ETH_TXEN
Ethernet
PTA15
A1
5
ETH_RXCLK
Etherne
t
B1
6
ETH_TXER
Ethernet
A1
6
ETH_RXDV
Etherne
t
PTA14
B1
7
ETH_TXD3
Ethernet
A1
7
ETH_RXD3
Etherne
t
B1
8
ETH_TXD2
Ethernet
A1
8
ETH_RXD2
Etherne
t

TWR-K70F120M Tower Module User's Manual Page 20 of 25
B1
9
ETH_TXD1
Ethernet
PTA17
A1
9
ETH_RXD1
Etherne
t
PTA12
B2
0
ETH_TXD0
Ethernet
PTA16
A2
0
ETH_RXD0
Etherne
t
PTA13
B2
1
GPIO1 / RTS1
GPIO /
UART
PTE19
A2
1
SSI_MCLK
SSI
PTE6
B2
2
GPIO2 / SDHC_D1
GPIO /
SDHC
PTE0
A2
2
SSI_BCLK
SSI
PTE12
B2
3
GPIO3
GPIO
PTE28
A2
3
SSI_FS
SSI
PTE11
B2
4
CLKIN0
Clock
PTA18
A2
4
SSI_RXD
SSI
PTE7
B2
5
CLKOUT1
Clock
PTE26
A2
5
SSI_TXD
SSI
PTE10
B2
6
GND
Power
Ground
A2
6
GND
Power
Ground
B2
7
AN7
ADC
ADC0_DP1
A2
7
AN3
ADC
PGA0_DP/ADC0_DP0/A
DC1_DP3
B2
8
AN6
ADC
ADC0_DM1
A2
8
AN2
ADC
PGA0_DM/ADC0_DM0/
ADC1_DM3
B2
9
AN5
ADC
ADC1_DP1
A2
9
AN1
ADC
PGA1_DP/ADC1_DP0/A
DC0_DP3
B3
0
AN4
ADC
ADC1_DM1
A3
0
AN0
ADC
PGA1_DM/ADC1_DM0/
ADC0_DM3
B3
1
GND
Power
Ground
A3
1
GND
Power
Ground
B3
2
DAC1
DAC
DAC1_OUT
A3
2
DAC0
DAC
DAC0_OUT
B3
3
TMR3
Timer
A3
3
TMR1
Timer
PTA9
B3
4
TMR2
Timer
PTD6
A3
4
TMR0
Timer
PTA8
B3
5
GPIO4
GPIO
PTB8
A3
5
GPIO6
GPIO
PTB9
B3
6
3.3V
Power
3.3V Power
A3
6
3.3V
Power
3.3V Power
B3
7
PWM7
PWM
PTA2
A3
7
PWM3
PWM
PTA6
B3
8
PWM6
PWM
PTA1
A3
8
PWM2
PWM
PTC3
B3
9
PWM5
PWM
PTD5
A3
9
PWM1
PWM
PTC2
B4
0
PWM4
PWM
PTA7
A4
0
PWM0
PWM
PTC1
B4
1
CANRX0
CAN 0
PTC16
A4
1
RXD0
UART 0
PTF7
B4
2
CANTX0
CAN 0
PTC17
A4
2
TXD0
UART 0
PTF8
B4
3
1WIRE
1-Wire
A4
3
RXD1
UART 1
PTE17
B4
4
SPI0_MISO
SPI 0
PTD14
A4
4
TXD1
UART 1
PTE16
B4
5
SPI0_MOSI
SPI 0
PTD13
A4
5
VSS
Analog
Vref
VSSA