8 OPAL-RT Technologies OP5700 User Manual
Introduction
Standard Hardware
INTRODUCTION
The OP5700 is a complete simulation system. It contains a powerful target computer, a high-end
reconfigurable FPGA, signal conditioning for up to 256 I/O lines and 16 high-speed fiber-optic SFP
ports. The design makes it easy to use with standard connectors (DB37, RJ45 and mini-BNC) without
the need for input/output adaptors and allows quick connections for monitoring I/O signals. It is
designed to be used either as a desktop, shelf top, or mounted in a standard 19’’ rack.
The front of the chassis provides access to monitoring interfaces and connectors and the SFP sockets,
while the back of the chassis provides access to the target computer’s standard connectors, I/O
connectors, power cable and main power switch.
Inside, the main housing is divided into two sections, each with a specific purpose:
FEATURES
The lower part of the chassis contains the target computer that can be added to a network of simulators
or can run standalone. The target computer, used to run simulations built with OPAL-RT’s RT-LAB or
HYPERSIM tools, includes the following features:
• ATX motherboard
• Linux-based real-time operating system
• Intel® Xeon® E5 CPU with 4, 8, 16 and 32 processor cores, up to 3.2GHz
• 10MB Cache Memory per 4 cores
• up to 32GB of DRAM,
• 512GB SSD disk,
• 6 PCIe slots1, used to connect the internal FPGA board and PCIe or PCI third party I/O and
communication cards.
The upper section contains the FPGA and the I/O conditioning modules. The main features include:
• Xilinx® Virtex®7 FPGA programmable from the target computer via PCIe. The FPGA is used to
execute models designed with the OPAL-RT RT-XSG tool, manage the I/O lines and execute
embedded FPGA-based simulations. It exchanges data with the real-time simulations running on
the target computer CPUs via the PCIe link.
• Flat carrier board capable of connecting any combination of up to 8 digital and analog conditioning
modules. Each module controls 16 or 32 lines for a total of up to 256 I/0 lines.
• 16 SFP ports for high speed communication with other FPGA-based systems or with external
devices.
The standard communication protocols available with the OP5707 are based on Xilinx® Aurora (1
to 5 Gbps). Other protocols, such as the Gigabit Ethernet, can also be implemented.
These SFP ports can be used to expand the simulator’s I/O capability using OPAL-RT’s MUlti-
System Expansion link (MUSE)2: each port can be connected to one OPAL-RT remote I/O unit
(OP4520, OP5607 or OP4200), effectively increasing the simulator I/O capability to a maximum of
4096 channels. SFP ports not used for MUSE remain compatible with the legacy Generic Aurora
link. The MUSE link is compatible with OPAL-RT boards I/O management architecture.
1 The CPU configuration and the use of riser boards for PCI cards may limit the number of available slots, as described in the Hardware configuration section
2 Restrictions to using MUSE with OPAL-RT board software architecture may apply depending on your application and software configuration. Please contact
your sales representative or field application engineer to verify compatibility
