ORTEC 426 User manual

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PRECISION
INSTRUMENTATION
FOR RESEARCH
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Oak Ridge
Technical Enterprises
Corporation
OAK RIDGE, TENNESSEE
INSTRUCTION MANUAL
MODEL 426
LINEAR GATE

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f
INSTRUCTION MANUAL
MODEL 426
LINEAR GATE
Serial No.
Purchaser _
Date Issued
OAK RIDGE TECHNICAL ENTERPRISES CORPORATION
p. O. BOX C
OAK RIDGE, TENNESSEE
Telephone [phone]
TWX 810-572-1078
® Osk Ridoe Technlcel Enterprises Cerperetien 1946 Printtd in U.S.A.

TABLE OF CONTENTS
Page
WARRANTY
PHOTOGRAPH
1. DESCRIPTION 1-1
1.1 General Description 1 - 1
1.2 Description of Basic Function - Linear Gate 1 - 1
2. SPECIFICATIONS 2-1
2.1 General Specifications 2 - 1
2.2 Linear Gate Specifications 2 - 1
3. INSTALLATION 3-1
3.1 General Installation Considerations 3- 1
3.2 Connection to Power - Nuclear Standard Bin, ORTEC Model 401/402 3 - 1
3.3 Input Signal Connection to Linear Gate 3 - 1
3.4 Logic Inputs to the Enable Input 3-2
3.5 Logic Inputs to the DC Inhibit Input 3-2
4. OPERATING INSTRUCTIONS 4-1
4.1 Front Panel Controls 4- 1
4.2 Initial Testing and Observation of Pulse Waveforms 4 - 1
4.3 Connector Data 4-1
4.4 Typical Operating Considerations 4-2
5. CIRCUIT DESCRIPTION 5-1
5.1 Linear Gate - Etched Board 426-0201 5 - 1
6. MAINTENANCE 6-1
6.1 Testing Performance of Linear Gate 6 - 1
6.2 Adjustment of Linear Gating Duration 6-2
6.3 Adjustment of Linear Gate Pedestal 6-2
6.4 Tabulated Test Point Voltages 6-3
6.5 Suggestions for Troubleshooting 6-3
Continued . ..
I

i
Table of Contents Continued
Page
7. BIN/MODULE CONNECTOR PIN ASSIGNMENT 7 - 1
LIST OF ILLUSTRATIONS AND DIAGRAMS
Block Diagram 426-0200-B2
Schematic 426-0000-S2

STANDARD WARRANTY FOR ORTEC ELECTRONIC INSTRUMENTS
DAMAGE IN TRANSIT
Shipments should be examined immediately upon receipt for evidence of external or con
cealed damage. The carrier making delivery should be notified immediately of any such damage,
since the carrier is normally liable for damage in shipment. Packing materials, v/aybills, and other
such documentation should be preserved in order to establish claims. After such notification to the
carrier, notify ORTEC of the circumstances so that we may assist in damage claims and in providing
replacement equipment when necessary.
WARRANTY
ORTEC warrants its electronic products to be free from defects in workmanship and materials,
other than vacuum tubes and semiconductors, for a period of twelve months from date of ship
ment, provided that the equipment has been used in a proper manner and not subjected to abuse.
Repairs or replacement, at ORTEC option, will be made without charge at the ORTEC factory.
Shipping expense will be to the account of the customer except in cases of defects discovered upon
initial operation. Warranties of vacuum tubes and semiconductors, as made by their manufacturers,
will be extended to our customers only to the extent of the manufacturers' liability to ORTEC.
Specially selected vacuum tubes or semiconductors cannot be warranted. ORTEC reserves the right
to modify the design of its products without incurring responsibility for modification of previously
manufactured units. Since installation conditions are beyond our control, ORTEC does not assume
any risks or liabilities associated with the methods of installation, or installation results.
QUALITY CONTROL
Before being approved for shipment, each ORTEC instrument must pass a stringent set of
quality control tests designed to expose any flaws in materials or workmanship. Permanent records
of these tests are maintained for use in warranty repair and as a source of statistical information
for design improvements.
REPAIR SERVICE
ORTEC instruments not in warranty may be returned to the factory for repairs or checkout at
modest expense to the customer. Standard procedure requires that returned instruments pass the
same quality control tests as those used for new production instruments. Please contact the factory
for instructions before shipping equipment.
r

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^ OHTEC®
MODEL 426
LINEAR GATE
GATE
WIDTH
®)
PULSE
INHIBIT
I
NORM
DC
INHIBIT
[ •iFi n
ENABLE
<©)
INPUT
O OUTPUT Q)
Model 426 Linear Gate

1 - 1
MODEL 426 LINEAR GATE
1. DESCRIPTION
1.1 General Description
The Model 426 is a modular linear gate providing a variable gate duration
whose width is controlled via a single-turn front panel mounted potentiometer.
The nominal gate duration range is from 0.3 to 4 psec. The operation of the
linear gate is control led by the application of a positive enable pulse. The
linear gate is useful in applications that require inhibiting a linear signal
according to chosen coincidence or timing requirements, e.g., reducing the
counting rate in subsequent linear analysis equipment.
The instrument is designed to meet the recommended interchangeability stand
ards of USAEC Report TID-20893. The ORTEC Model 401/402 Nuclear Stand
ard Bin and Power Supply provides all necessary power through the rear module
power connector. All signal levels and impedances are compatible with other
modules in the ORTEC 400 Series.
1 .2 Description of Basic Function — Linear Gate
The input to the linear gate will accept al l pulse shapes existing in the ORTEC
400 Series linear function modules. If the input signal is bipolar, the negative
portion will not be passed through the linear gate. The input impedance is
greater than 5000 ohms, and the input is normally sent from the factory ac
coupled. The input con be operated dc coupled if desired (refer to Section
4.4.1). A dc restoration network at the input reduces baseline shift at high
counting rates. The restoration network works on both unipolar and bipolar
input pulse shapes. The linear gate proper consists of a series-parallel satu
rated transistor switch. This switch network incorporates an adjustment that
allows the linear gate to operate with no pedestal. The series-parallel tran
sistor switch is activated by a transistor-pair current switch. This latter switch
is activated by the gate control pulse which is generated with the application
of on externally generated enable pulse. The output of the linear gate circuit
is fed into a cascode emitter follower cable driver.
The Model 426 has two operating modes: 1) normally blocks all input signals
not accompanied by an enable pulse and 2) normally passes all signals unless
accompanied by an inhibit signal. The inhibit signal can be fed into the front
panel ENABLE connector for PULSE INHIBIT operation or into the DC INHIBIT
connector for dc or continuous inhibit operation.

u
2 - 1
SPECIFICATIONS
2.1 General Specifications
The ORTEC Model 426 is housed in a Nuclear Standard Module. The module
is one standard module wide, and weighs 2.1 pounds. The module contains
no internal power supply and therefore obtains the necessary operating power
from the Nuclear Standard Bin and Power Supply, ORTEC Model 401/402.
Al l signals in and out of the module are on front panel BNC connectors, and
the input power is via the standard connector on the rear panel .
2.2 Linear Gate Specifications
Linear Input
Linear Input Impedance
Gain
Linearity
Gate Width
Pulse Feedthrough
Output Pedestal
Output
Output Impedance
Temperature Stability
Operating Temperature Range
Enable Input
Enable Input Impedance
DC Inhibit Input
DC Inhibit Input Impedance
Unipolar or bipolar with the positive
portion leading. Rated range 0.2 to
10 volts, 12 volts maximum.
Greater than 5000 ohms.
Unity.
Integral nonlinearity less than 0.15%
from 0.2 to 10 volts.
Continuously variable from 0.3 to 4psec.
Less than lOmV with a 10volt input pulse,
Output pedestal can be adjusted to less
than 1 mV.
0.2 to 10 volts positive rated output
range, 12 volts maximum.
Approximately 2 ohms, short-circuit
protected.
Gain shift is less than 0.015% per °C.
0 to 50°C.
Any positive input greater than 2V,
maximum input 20 volts.
1000 ohms, dc coupled.
Any positive dc input greater than 4V,
maximum input 20V.
650 ohms, dc coupled.

Counting Rate
Power Requirements
Mechanical
Connectors
2-2
The gain shift of a 4V reference pulse
is less than 0.25% with the application
of an additional count rate of 65K ctv^
sec of 6.0V random pulses.
+24V
+ 12V
-12V
-24V
30 mA
16 mA
4.9 mA
49 mA
(All power via AMP 202515-3 connec
tor, per TID-20893.)
One module wide and designed to meet
the recommended interchangeability
standards set out in Atomic Energy Com
mission report TID-20893, 1.35 inches
wide, 8.75 inches high, and 9.75 inches
long.
Input and Output signal — BNC (UG-
1094/U).

3 - 1
3. INSTALLATION
3.1 General Instol lotion ConslderaHons
The Model 426, used In conjunction with a Model 401/402 Bin and Power
Supply, is intended for rack mounting and as such it is necessary to ensure
that vacuum tube equipment operating in the same rack with the Model 426
have sufficient cooling air circulating to prevent any localized heating of
the all transistor circuitry used throughout the Model 426. The temperature
of equipment mounted in rocks can easily exceed 120°F (50®C) unless pre
cautions are taken. The Model 426 should not be subjected to temperatures
in excess of 120°F (50°C).
3.2 Connection to Power — Nuclear Standard Bin, ORTEC Model 401/402
The Model 426 contains no internal power supply and therefore must obtain
power from the Nuclear Standard Bin and Power Supply, such as the ORTEC
Model 401/402. It is recommended that the bin power supply be turned off
when inserting or removing modules. The ORTEC 400 Series is designed so
that it is not possible to overload the bin power supply with a full complement
of modules in the Bin. However, this may not be the case when the Bin con
tains modules other than the ORTEC design. Therefore, the power supply
voltages should be checked after insertion of modules in the latter case. The
ORTEC Model 401/402 has test points on the power supply control panel to
monitor the dc voltages.
When using the Model 426 outside the Model 401/402 Bin and Power Supply,
care must be taken to ensure that the power jumper cable used properly ac
counts for the power supply grounding circuits provided in the recommended
standards of AEC TID-20893. Both clean and dirty ground connections are
provided to ensure proper reference voltage feedback into the power supply,
and these must be preserved in remote coble installations. Care must also
be exercised to avoid ground loops when the module is not physically in the
Bin.
3.3 Input Signal Connection to Linear Gate
The linear input to the Model 426 is on the front panel BNC connector and
is directly compatible with the output of all linear amplifiers, biased amp
lifier, pulse stretchers, delay amplifiers, and all Iinear circuitry found in
the ORTEC 400 Series. The linear gate passes only positive unipolar signals
and/or the positive portion of bipolar signals. This must be kept in mind
when putting in linear signals from other than ORTEC products. The linear

p
3-2
Input to the Model 426 linear gate is ac coupled as normally supplied but
may be dc coupled if desired.
If the linear input to the Model 426 is driven from a low driving impedance,
such as the ORTEC Model 410 output, the Model 426 linear input should be
terminated in the characteristic impedance of the connecting coaxial cable.
3.4 Logic Inputs to the Enable Input
The input pulses to the enable input may come from any source of logic pul
ses. The input impedance of the enable input is one thousand ohms, dc cou
pled, and some care must be given to ensure that reflections do not occur in
the driving transmission coble. This probably can best be avoided by termi
nating the driving cable at the enable input with the characteristic impedance
of the driving coble. The amplitude and width of the enable input signal is
specified in Section 2.2.
The maximum width of the enable input is not specified in Section 2.2 and
indeed may be any width since the enable signal is regenerated to allow gate
width duration to be independent of the pulse shape of the enable input.
The minimum recommended full-width at half-maximum of the enable input
is 50 nsec, although larger amplitude narrower pulses will trigger the enable
circuitry.
3.5 Logic Inputs to the DC Inhibit Input
The some considerations of paragraph one of this section apply to the input
pulses to the DC INHIBIT INPUT connector. This input provides the facility
to block the passage of signals through the linear gate by the application of
a dc voltage either in the basic form of a battery and switch contact or by
the application of a pulse waveform between dc voltage levels. The input
is dc coupled and has an impedance of approximately 650 ohms. A maximum
dc voltage of 20 volts is allowed on this input.
11
V
k

!•
Linear Output Signal Connections and Terminating Impedance Considerations
The source impedance of the 0-10 volt standard linear outputs of most 400
Series modules is approximately 1 ohm. Interconnection of linear signals
is, thus, non-critical since the input impedance of circuits to be driven is
not important in determining the actual signal span, e.g., 0-10 volts, de
livered to the following circuit. Paralleling several loads on a single out
put is therefore permissible while preserving the 0-10 volt signal span.
Short lengths of interconnecting coaxial cable (up to approximately 4 feet)
need not be terminated. However, if a cable longer than approximately
4 feet is necessary on a linear output, it should be terminated in a resistive
load equal to the cable impedance. Since the output impedance is not
purely resistive, and is slightlydifferent for each individual module, when
a certain given length of coaxial cable is connected and is not terminated
in the characteristic impedance of the cable, oscillations will generally
be observed. These oscillations can be suppressed for any length of cable
by properly terminating the cable either in series at the sending end or in
shunt at the receiving end of the line. To properly terminate the cable
at the receiving end, it maybe necessary to consider the input impedance
of the driven circuit, choosing an additional parallel resistor to make the
combination produce the desired termination resistance. Series terminating
the cable at the sending end may be preferable in some cases where re
ceiving and terminating is notdesirable or possible. When series terminat
ing at the sending end, full signal span, i.e., amplitude, isobtainedat
the receiving end only when it is essentially unloaded or loaded with an
impedance many times that of the cable. This may be accomplished by
inserting a series resistor equal to the characteristic impedance of the ca
ble internally in the module between the actual amplifier output on the
etched board and the output connector. It must be remembered that this
impedance is in series with the input impedance of the load being driven,
and in the case where the driven load is 900 ohms, a decrease in the signal
span of approximately 10% will occur for a 93-ohm transmission line. A
more serious loss occurs when the driven load is 93ohms and the transmis
sion system is 93 ohms. In this case, a50% loss will occur. BNCconnec
tors with internal terminators are available from a number of connector
manufacturers in nominal values of 50, 100, and lOOOohms. ORTEC stocks
in limited quantity both the 50 and 100 ohm BNC terminators. The BNC
terminators are quite convenient to use in conjunction with a BNC tee.

4 - 1
4. OPERATING INSTRUCTIONS
4.1 Froni- Panel Controls
GATE WIDTH — A single-turn potentiometer is provided to adjust the gate
width to the desired value within the nominal range of 0.3 to 4 psec. This
control is recess mounted and as such is a screwdriver adjustment, but it may
be panel mounted so that a knob may be added to the potentiometer shaft to
allow finger-thumb adjustment if this seems desirable.
MODE SWITCH — A three-position switch is used to set the linear gate into
the desired operation mode. The three modes are described below.
Normal — In this mode the linear gate normally blocks al l input signals
unless an enable signal sets the linear gate to pass signals for a selected
duration (as set by the Pulse Width control) after receiving an enable
pulse.
Pulse Inhibit — The reciprocal of the Normal mode is available with the
switch in this position, i.e., the linear gate passes all signals except
when a pulse is applied to the Enable input. The pulse on the Enable
input causes the gate to block the passage of signals through the linear
gate for a duration set by the Pulse Width adjustment.
DC Inhibit — This mode is identical to the Pulse Inhibit mode except the
application of an inhibit or block input must be mode on the rear panel
BNC connector and the linear gate will remain blocked for the duration
that the dc signal is applied to the DC Inhibit connector.
For applications where the linear gate is desired to be switched for Normal,
i.e., selectively passing, to a condition of passing all signals, the switch
should be operated between Normal and DC Inhibit position and there should
be no connection on the DC Inhibit rear panel connector.
4.2 Initial Testing and Observation of Pulse Waveforms
See Sections 6.1 and 6.2 for test performance data.
4.3 Connector Data
CNl Input BNC connector — ac coupled linear gate input. Input imped
ance greater than 5000 ohms. Input rated voltage range 0.2 to lOvolts.
Maximum input 12 volts. To minimize reflections when driving from low
impedance sources into this connector, a terminator equal to the charac
teristic impedance of the driving cable sould be shunted from this connec
tor to ground.

4-2
CN2 Linear Gate output — BNC connector — dc coupled output. Output
impedance less than 2 ohms. Positive ouput signals only with rated
range of 0.2 to 10 volts. Maximum output 12 volts.
TP2 Linear Gate Output Test Point — Oscilloscope test point for moni
toring signal on linear gate output BNC connector CN2. This test
point has 470 ohm series resistor connecting it to CN2.
CN3 Enable input — BNC connector — dc coupled. Input impedance
1000 ohms. Requires a positive 2V pulse. Maximum input 20 volts.
CN4 DC Inhibit Input — BNC connector — dc coupled. Input impedance
650 ohms. Requires a positive 4-volt pulse or dc level. Maximum
input 20 volts.
Power Connector — Nuclear Standard Module Power Connector.
AMP #202515-3.
4.4 Typical Operating Considerations
In the Normal mode the Linear Gate is opened, i.e. passes input signals,
with the application of a positive pulse on the Enable input. The duration
that the linear gate will remain open is normally continuously variable from
0.3 to 4 psec via the front panel control, for other pulse widths refer to
Section 6.2.
Figure 4.1 illustrates the gating action of the Linear Gate. Notice that
only the positive portion of the input signal is passed through the Linear
Gate.
The Linear Gate has an internal pedestal adjustment that al lows the pedestal
to be reduced to a negligible value (refer to Section 6.2 for adjustment pro
cedure). Figure 4.2 shows the output of the Linear Gate with the pedestal
a) properly adjusted and b) improperly adjusted.
4.4.1 The Linear Gate is normally operated in the normally closed mode
of operation with both input and output ac coupled. Two variants
from this mode are possible 1) gate operating normally open, i.e.
normally passes all input signals except when accompanied by an
enable or inhibit pulse, and 2) gate dc coupled operating either
normally closed or normally open. Operation in mode 2 requires
modification to the actual etched circuit board. For dc operation
the input and output capacitors C1 and C6 must be replaced with

4-3
jumper wires for a dc connection. With this arrangement a small dc
offset voltage from input to output will be observed, approximately
160 mV, and must be considered in the connection of the gate to the
input and output equipment.
For operation in the Inhibit mode, all input signals will be passed
except when an inhibit signal is applied to either the Enable input
or to the DC Inhibit input. The particular input depends on the po
sition of the mode switch. Enable input for Pulse Inhibit position and
DC Inhibit Input for the DC Inhibit position (refer to Section 4.1).
With the mode switch set to DC Inhibit and no input to the DC Inhibit
connector, the linear gate will pass all input signals. This can be a
very useful mode for setting up experiments since the proper timing
of the input signal to the Enable input is not necessary to get an out
put signal . A slight difference in the pedestal magnitude may be
noticed when changing operating modes from Normal to DC Inhibit.
The pedestal is normally adjusted for minimum in the Normal mode,
but may be adjusted to suit the experiment in any mode desired.
Notice that as supplied C6 is shorted with a jumper wire and therefore,
the output is dc coupled. There will be a small dc offset voltage that
is dependent on the saturation properties of the gate transistors that
will have to be considered when going into an ADC or other units that
are dc coupled. Capacitor C6 is provided to allow ac coupling in
these cases, but polarity of the offset must be determined to properly
connect the solid tantalum electrolytic capacitor, C6.

5 - 1
CIRCUIT DESCRIPTION
5.1 Linear Gate — Etched Board 426-0201
The input to the linear gate can be either ac or dc coupled. Refer to Draw
ings 426-0201-51, and 426-0201-Bl . The ac-coupled signal is fed in on the
etched board and then into the baseline recovery network consisting of diodes
D1 through D4 and resistors R1 and R40. The dc restoration network works as
follows: With the application of a positive input signal it is coupled through
capacitor C1 to the junction of D2 and R1 . As the junction of D2-R1 increases
in the positive direction, the current through D1 increases while the current
through D2 decreases due to the current flow out of capacitor C1 through R1.
The current flow out of C1 and through R1 is that current necessary to main
tain the amplitude of the input voltage at the junction of D2 and R1. With
the removal of the input pulse, the quiescent current flow through D1 is avail
able to recharge capacitor C1 back to its steady-state value, since the current
through D1 con be reduced to zero and the current through D2 can increase in
magnitude to a value of 21. Therefore, the potential at the junction of D2 and
R1 will be restored to its steady-state value in a period of time approximately
equal to the pulse width of the incoming pulse.
The linear gate will gate through positive signals or the positive part of bi
polar signals. The input signals are coupled through emitter-follower Q1 to
the collector of Q2, the series section of a series-shunt linear gate. The
positive part of the input signal back biases diode D6, while the negative
parts of bipolar signals are blocked by D5. In the steady-state condition Q2
is normally Off, since the current switch, Q4 and Q5, is requiring a current
through R9 of approximately 4 milliamperes. Q4 of the current switch is nor
mally On, and the current required in the emitter circuit of the current switch
is drawn from diode D7 and resistor R5. With the heavy conduction of 04,
the base current for Q2 is zero; therefore, the series resistance of the collec
tor to the emitter of 02 is very high. Conversely, transistor 03 has a constant-
current base drive through R6 of approximately 1 milliampere, and diode D8 is
back biased, causing shunt transistor 04 to be heavily saturated.
With the application of a positive signal to the collector of 02, and with the
absence of a signal to the current switch, transistors 04 and 05, the series-
shunt gate is closed for input signals to C1 . The linear gate is opened by the
application of a positive signal to the base of 05, which causes the current
switch to switch its emitter current from 04 to 05. When 05 conducts the
emitter current of the current switch, the base drive to 02 is available via
R5, and concurrently, base current for 03 become negligible, since the col
lector of 05 requires approximately 4 mil I iamperes. With the current switch

5-2
conducting current In Q5, It Is seen that Q2, the series element. Is In heavy
saturation, with the base drive current supplied from R5 flowing Into the base
through the emitter and back through diode Dll to the emitter-follower, Q1 .
Also, Q3, the shunt element In the linear gate. Is now back biased and pre
sents a high shunt Impedance to signals flowing through the series element, Q2.
With the series-shunt linear gate In the open position. I.e., Q2 saturated and
Q4 back biased, the output signals of emitter-follower Q1 are presented to
emitter-follower Q6 and then to the cascode emitter follower consisting of Q7
and Q8. The output of the cascode emitter-follower Is taken from the emitter
of Q7 through C6 to the output of the linear gate, CN2.
The current switch Q4 and Q5 Is controlled by the enable circuitry, consisting
of transistors Q9 through Q13. With the application of a positive enable sig
nal at CN3 greater than 2 volts the Input trigger circuit generates a standard
ized output pulse which Is fed to the "gate width" trigger pair, Q12 and Q13.
Q9 and QIO constitute a Schmitt trigger circuit which will change from Its
quiescent current carrying state when the Input signal at the base of Q9 exceeds
the base voltage of QIO. In the quiescent state, 09 Is Off and OlO Is On and
conducting approximately 4 mA through R27. This trigger circuit Is Independent
of the Input pulse shape since It Is dc coupled. When the quiescent current Is
transferred from OlO to 09, a positive voltage spike Is generated at the collec
tor of 010 due to LI and R24. This signal causes Oil, which Is normally Off,
to conduct current through R31 which generates a negative voltage spike at the
collector of O 11 . This signal Is coupled to the base of 013 via C8.
013 Is normally On and 012 Is normally Off due to the forward bias on the
base of 013 from D9. With the negative signal from the collector of 011,
013 turns off and 012 conducts the quiescent current through R33, the com
mon emitter resistor. The current through 012 will flow until capacitor C8
charges enough to cause the base of 013 to equal the base voltage of 012.
At this time 013 wil l return to Its stable state conducting the quiescent cur
rent through R33.
The duration 012 conducts Is controlled by the time constant of R34 and R35
and C8. The gate width Is then seen to be control led by the setting of R35.
The positive pulse generated at the collector of 013 Is fed to the current
switch 04 and 05 to switch the current flowing In R9 through 05 during the
gating period.
The above circuit description assumes the mode switch to be In the Normal
position. With the switch In Pulse Inhibit position, the base of 05 Is held
at ground while the base of 04 Is held at -0.6V. Therefore, the current
switch will have the current through R9 flowing In 05 and 04 will be cut

5-3
off. With the current switch in this condition Q2 is saturated and Q3 is cut
off, thereby passing all input signals to the base of Q6.
With the application of an enable input pulse, a positive signal is applied
to Q4 base via capacitor C2 and the transistors Q2 and Q3 change state and
thereby block passage of signals from the input to the base of Q6 and con
sequently there is no output from the linear gate.
In the DC Inhibit position, the same conditions apply to the current switch
Q4 and Q5 and the current switch can change state only with the application
of a positive input on the DC Inhibit input CN4. Notice that in the DC In
hibit position the current switch is dc coupled to the connector CN4 and
therefore, absolute control of the linear gate is available on connector CN4.

6- 1
6. MAINTENANCE
6.1 Testing Performance of Linear Gate
The following paragraphs are intended as an aid in the instal lation and
checkout of the Model 426. These instructions present information on front
panel controls, waveforms at test points and output connectors.
6.1.1 Test Equipment
The following, or equivalent, test equipment is needed:
1. ORTEC Model 419 Pulse Generator
2. Tektronix Model 580 Series Oscilloscope
3. 100 Ohm BNC Terminators
4. Vacuum Tube Voltmeter
5. ORTEC Model 410 Linear Amplifier
6. ORTEC Model 415 Sum-Delay Amplifier
7. ORTEC Model 407 Crossover Pickoff
8. Schematic and Block Diagrams for Model 426 Linear Gate
6.1.2 Preliminary Procedures
1. Visually check module for possible damage due to shipment.
2. Connect ac power to Nuclear Standard Bin, ORTEC Model
401/402.
3. Plug module into Bin and check for proper mechanical alignment.
4. Switch ac power on and check the dc power supply voltages at
the test points on the 401 Power Supply control panel.
6.1.3 Linear Gate
A. 1 . Feed the Model 419 into a Model 410. Feed the Bipolar
Output of the Model 410 into a Model 407. Feed the
Output from the Model 407 into the Enable input of the
Model 426. Set the Model 410 pulse shaping mode to
Double RC (DRC), i.e.. Integrator, First and Second
Differentiator to 0.2 psec.
2. Also feed the Bipolar Output of the Model 410 into the
Delaying input of a Model 415 Sum-Delay Amplifier.
The output of the Model 415 should be approximately
0.5 volts.

p
6-2
B. 1. Observe the output of the Model 426 Linear Gate. Adjust
the trimpot at the topof the board for a minimum pedestal .
2. The amplitude of both the initial and final transient negative
spikes should not exceed 300 mV.
3. Feed the Output of the Model 415 into the linear Input of the
Model 426. Measure the input and output of the Model 426.
The input should not differ from the output by more than 80mV.
4. Adjust the Model 410 Linear Amplifier gain controls to give
a -h8V pulse into the linear Input of the Model 426. The linear
gate Output should be 8 ±0.4V. Load the Model 426 Output
with 100 ohms. The output pulse amplitude should not decrease
more than 0.15V.
5. Adjust the Model 410 Linear Amplifier gain controls to give
a +1IV pulse into the Input of the linear gate. The linear
gate Output should saturate at greater than lOV.
6. Remove the Model 415 Output from the linear Input on the
Model 426. Rotate the Gate Width control over its entire
range and measure the resultant gating period. The minimum
should be 0.3 psec or less and the maximum should be 4 psec
or greater.
6.2 Adjustment of Linear Gating Duration
The linear gating period is continuously variable from approximately 0.3 psec
to 4 psec. The pulse width is controlled by capacitor C8 and resistors R34
and R35. To change the gating duration simply adjust the control R35 which
is recess mounted on the front panel.
In the event that gating durations different from 0.3 to 4 psec are desirable,
the capacitor C8 may be replaced with a capacitor of different value to change
the range of gating duration. R35 wil l stjil provide continuously adjustable
pulse wdith within the new range.
6.3 Adjustment of Linear Gate Pedestal
The Linear Gate has a trimpot, Rll, to allow the pedestal on the Linear
Gate Output to be reduced to a negligible value, typically 1 mV. The
trimpot is located near the top of the etched circuit board. To adjust the
pedestal it is necessary to open the linear gate, with no input signal feeding
into the linear gate input CNl while observing with an oscilloscope the out
put of the linear gate. Observing the linear gate output, adjust the pedestal
trimpot until the pedestal is reduced to a negligible amount.