Philips SA2411 User manual

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SA2411
+20 dBm single chip linear amplifier for WLAN
Product data 2003 Feb 07
INTEGRATED CIRCUITS
Supersedes data of 2002 Jul 31

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2
2003 Feb 07
1. DESCRIPTION
The SA2411 is a linear power amplifier designed for WLAN application in the 2.4 GHz band. Together with the SA2400A the chips form a
complete 802.11b transceiver. The SA2411 is a Si power amplifier with integrated matching and power level detector.
2. FEATURES
•75 Ω+ 25j Ωdifferential inputs, internally matched
•50 Ωsingle-ended output, internally matched
•15 dB gain block
•Power detector
•Bias adjust pin
•18% efficiency at 3 V
•RF matching for SA2400A
3. APPLICATIONS
•IEEE 802.11 and 802.11b radios
•Supports DSSS and CCK modulation
•Supports data rates: 1, 2, 5.5, and 11 Mbps
•2.45 GHz ISM band wireless communication devices
Table 1. Ordering information
TYPE NUMBER
PACKAGE
TYPE
NUMBER
NAME DESCRIPTION VERSION
SA2411DH TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
4. BLOCK DIAGRAM
SR02383
IN+
IN– PA OUTPUT
MATCH ANT
DETECTOR
INPUT
MATCH
SA2411
VDD_DRIVER VDD_BIAS VDD_MAIN
Power-up power mode
Figure 1. Block diagram

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 3
5. PINNING INFORMATION
SR02384
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16VDD_MAIN
VDD_DRIVER
GND
IN+
IN–
GND
DETECTOR
GND
VDD_BIAS
PWRUP
GND
RF_GND
ANT
GND
MODE
GND
SA2411DH
Figure 2. Pin configuration
Table 2. Pin description
PIN type is designated by A = Analog, D = Digital, I = Input, O = Output
SYMBOL PIN DESCRIPTION TYPE
VDD_MAIN 1 Analog supply, VDD for power amplifier, 150 mA A
VDD_DRIVER 2 Analog supply, VDD for biasing driver, 35 mA A
GND 3 Grounding A
IN+ 4 Input pin, positive part of balanced signal AI
IN– 5Input pin, negative part of balanced signal AI
GND 6 Grounding A
DETECTOR 7 Power detector output AO
GND 8 Grounding A
GND 9 Grounding A
MODE 10 Mode switch; floating = high gain, grounded = low gain AI
GND 11 Grounding A
ANT 12 Output pin, RF, to antenna AO
RF_GND 13 RF ground must be connected A
GND 14 Grounding A
PWRUP 15 Power up pin. HIGH = amplifier is on. LOW = amplifier is off. DI
VDD_BIAS 16 Analog supply, VDD for biasing the amplifier, 5 mA A
All GND pins should be connected to ground to guarantee the best performance.

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 4
6. FUNCTIONAL DESCRIPTION
The main building-blocks are:
•Fixed gain amplifier (PA)
•Output matching
•Input matching
•Power Detector
•Power Mode
Input
The device has differential inputs so a balun is needed in the case of single ended operation, input impedance is approximately 75 Ω+ 25j Ω,
balanced. The inputs can be DC biased with the pin VDD_DRIVER. The input matching is optimized to interface with the SA2400A WLAN
transceiver chip.
Amplifier
The amplifier is a fixed gain, class AB amplifier. There is an additional pin, VDD_BIAS, to adjust the class A bias current. Reducing the class A
currents reduces the gain. This allows trade-offs to be made among gain, linearity and current.
Output matching
The output of the amplifier is matched, on chip, for a 50 Ωload. The matching includes the supply feed for the power amplifier. The pin
VDD_MAIN is the main supply for the amplifier. No additional filtering is needed to meet the 802.11b spec.
Power detector
The power detector detects the power level and transforms it into a low frequency current. The detector output must be loaded with a resistor to
ground for the highest accuracy. This resistor has an optimal value of 5.6 kΩ. Lower values can be used to comply with maximum input
sensitivity of ADCs, at the cost of dynamic range. The maximum voltage detected is 2.3 V.
Power mode
This pin selects the desired gain and linearity level (13 dB or 14.5 dB gain). The low gain is more applicable to high voltage applications from
3.3 V to 3.6 V. The high gain is more applicable to low voltage applications lower than 3.3 V.
NOTE:
In order to assure optimal thermal performance, it is recommended that all ground pins be connected, and that the number of vias to ground
under the chip be maximized. In addition, the use of solder mask under the chip (for scratch protection) is not recommended.

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 5
7. CONNECTIVITY DIAGRAM
SR02385
C2
C1
C4 C3
L3
L2
PWRUP
RFin
ANT
L1
VDD VDD GND IN+ IN– GND DET GND
VDD
PwrUp GND
GND
ANT GND MODE GND
RFin
R1
R2
Idet.
Vdet
VDD
SA2411
C1, C2, C3 = 5.6 pF
C4 = 10 nF
R1 = optional connect to ground via 0 Wresistor.
R2 = optional resistor to ground to convert current into voltage
L1, L2, L3 = Optional inductors
1 nH …10 nH, or microstrip lines with length 1 …10 mm.
No inductors and directly connecting all supplies to VDD might cause problems. The optimal values of the inductors
depends on the application board.

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 6
8. OPERATION
The SA2411 linear amplifier is intended for operation in the 2.4 GHz band, specifically for IEEE 802.11 1 and 2 Mbits/s DSSS, and 5.5 and 11
Msymbols/s CCK standards. Throughout this document, the operating RF frequency refers to the ISM band between 2.4 and 2.5 GHz.
Amplifier Output Power
The SA2411 linear amplifier is designed to give at least 19 dBm output power for an 11 Msymbols/s CCK modulated input carrier. At 19 dBm
output power the ACPR specs are met. The fixed gain amplifier amplifies the input signal by 14.5 dB typically.
Power Mode
The biasing can be adjusted to change the gain and therefore the maximum linear output power. For high supply voltages (>3.2 V) the low-gain
mode is advised. For low supply voltages (<3.3 V) the high-gain mode is advised.
Power Mode Pin 9 = Typical output power Typical small
signal Gain Typical DC current (no RF signal) Typical Current consumption
High Floating 20.0 dBm 14.5 dB 35 mA 185 mA @ 20 dBm
Low Grounded 20.0 dBm 13 dB 28 mA 185 mA @ 20 dBm
Power detector
The power detector current output is linear proportional with the RF output voltage. The RF output power is quadratic proportional to the RF
output voltage. Therefore, the detector is quadratic proportional to the output power. The following relation can be expressed:
Pout + k Vndetector
Pout is output power in mWatt, Vdetector is detector voltage in Volt, k = sensitivity in mWatt/V2, n = quadratic factor.
The quadratic factor is 1.5. The sensitivity is then 49 mWatt/V2.
Pout Vdetector (5.6 kΩload) Idetector (5.6 kΩin series)
20 dBm = 100 mW 1.7 V 300 uA
19 dBm = 79 mW 1.4 V 250 uA
17 dBm = 50 mW 1.0 V 175 uA
15 dBm = 32 mW 0.7 V 125 uA
9 dBm = 8 mW 0.3 V 50 uA
The loading of the detector can be different in the application. The highest accuracy is achieved with 5.6 kΩ. But other values can be used to
adapt to the maximum input sensitivity of other circuits. Other detector loading values result in other k-factors. The maximum detector voltage is
limited to about 2.4 V.
DC feed at input
There is a possibility to add a DC voltage at the input pins (pin 4 and pin 5) by feeding pin 2. This option should be used in case the SA2411 is
lined up with the SA2400A.

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 7
9. OPERATING CONDITIONS
The SA2411 shall meet all of the operating conditions outlined in this section. Table 3 specifies the absolute maximum ratings for the device.
Table 4 gives the recommended operating conditions.
Table 3. Absolute maximum ratings
Symbol Parameter Min Max Unit
Tstg Storage temperature –55 +150 °C
VDDa Supply voltage (analog) –0.5 +3.85 V
–Voltage applied to inputs –0.5 VDD+0.5 V
–Short circuit duration, to GND or VDD – 1 sec
Table 4. Recommended operating conditions
Symbol Parameter Min Nom Max Units
Tamb Ambient operating temperature –40 – +85 °C
VDDa Supply voltage (analog) 2.85 3.3 3.6 V
10. SA2411 TRANSMITTER REQUIREMENTS
Table 5. SA2411 transmitter specifications
Tamb = 25 °C; VCC = 3 V; frequency = 2.45 GHz, Rdetector = 5.6 kΩ, unless otherwise stated.
Specification Condition, Remarks Min Nom Max Units
DC
DC current Standard mode (pin 10 is floating) – 35 – mA
DC current Low output power mode (pin 10 is grounded) – 28 – mA
Leakage current Vpwrup = 0 V. Vss = 3.0 V – – 10 µA
AC : 802.11b MODULATION
Output back off (relative to 1 dB compression of single carrier) – 2 – dB
RF frequency 2.4 2.45 2.5 GHz
Input impedance Differential (75 Ω+ 25j Ω) – 100 – Ω
Load impedance Single ended – 50 – Ω
Power gain for small signal Mode = High gain, Input level = –20 dBm – 14.5 – dB
Power gain for small signal Mode = Low gain, Input level = –20 dBm – 13 – dB
Output power Meeting the FCC specs of 30 dBc and 50 dBc, mode = high – +20.0 – dBm
Current consumption “ – 200 – mA
Gain “ – 12.5 – dB
Output power Meeting the FCC specs of 30 dBc and 50 dBc, mode = low – +20.0 – dBm
Current consumption “ – 200 – mA
Gain “ – 12.5 – dB
Power ramping up time 10% to 90% ramp up – 0.5 – µs
Power ramping down (when
enabled) a) 90% to 10% ramp down b) 10% to carrier leakage level – 0.5 0.5 –µs
Error Vector Magnitude 11 Msymbols/s QPSK. Both RF outputs. – 5 – %
Isolation Pin 15 (PWRUP) = 0 V – 15 – dB
Harmonic Suppression at 2 and 3
times fundamental frequency fundamental frequency output power = +20 dBm – 40 – dBc

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 8
Table 6. SA2411 Detector specification
Tamb = 25 °C, VCC = 3.0 V
Specification Condition, Remarks Min Nom Max Units
GENERAL
Detector sensitivity With 5 kΩload resistor to ground – 49 – mW/V2
Detector accuracy per sample At 16 dBm –40 °C to +80 °C; from 2.7 V to 3.6 V – 0.3 – dB
Absolute accuracy From sample to sample – 0.5 – dB
Detector quadratic factor – 1.5 – –
Detector settling time From 10% to 90% of final value – 500 – ns
Spread from sample to sample 20 dBm output power – 1 – dB
Absolute detector voltage 19 dBm output power – 1.4 – V
Absolute detector voltage error From –30 °C to +80 °C;
from 2.7 V to 3.6 V at 19 dBm output power – 0.15 – V
Detector power range +10 – +21 dBm
11. GRAPHS
The following graphs are only for a typical sample measured on a SA2411 test board under nominal condition applying an 11Mb/s CCK 802.11b
modulation. Corrections for input, output and supply losses have been applied. The dotted lines represent the low gain mode. The solid
lines are for the high gain mode.
The first two graphs are small signal graphs. The gain and the DC currents are plotted versus supply voltage.
small signal current[mA]]
SR02464
DC current versus Supply Voltage
10
20
30
40
50
2.7 2.9 3.1 3.3 3.5
Supply Voltage[V]
Figure 3. DC current vs. supply voltage
SR02465
Gain versus Supply Voltage
10.0
12.0
14.0
16.0
18.0
2.7 2.9 3.1 3.3 3.5
Supply Voltage[V]
Small signal gain[dB]]
Figure 4. Gain vs. supply voltage

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 9
The next eight graphs are presenting the power sweep for both gain modes at nominal conditions.
SR02466
Output Power versus Input Power
10
12
14
16
18
20
22
–4 –2 0 2 4 6 8
Pin[dbm]
Pout[dBm]
Figure 5. Output power vs. input power
SR02467
Gain versus Output Power
12
13
14
15
16
5101520
Pout[dbm]
Gain[dB]
Figure 6. Gain vs. output power
SR02468
Efficiency versus Output Power
0.0%
5.0%
10.0%
15.0%
20.0%
25.0%
–2 2 6 10 14 18 22
Pout[dbm]
Efficiency @ 2.7Volt
Figure 7. Efficiency vs. output power
SR02469
Current consumption vs Output Power
0
50
100
150
200
–10 –6 –2 2 6 10 14 18 22
Pout[dbm]
Current consumption [mA]
Figure 8. Current consumption vs. output power

Philips Semiconductors Product data
SA2411+20 dBm single chip linear amplifier for WLAN
2003 Feb 07 10
SR02470
ACPR versus Output Power
–45
–40
–35
–30
–25
7 121722
Pout[dbm]
ACPR[dBc]
Figure 9. ACPR vs. output power
SR02471
ALT versus Output Power
–62
–58
–54
–50
–46
7121722
Pout[dbm]
ALT[dBc]
Figure 10. ALT vs. output power
SR02472
Detector Voltage versus Output Power
0
0.5
1
1.5
2
8 10121416182022
Pout[dbm]
Detector[V]
Figure 11. Detector voltage vs. output power
SR02473
Detector Error versus Output Power
–1.0
–0.5
0.0
0.5
1.0
7 121722
Pout[dbm]
Detector error[dB]
Figure 12. Detector error vs. output power