Philips VES1.1E User manual

Published by MB/SC 1363 Quality Printed in the Netherlands Subject to modification EN 3122 785 19393
2013-Mar-29
2013
©
TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
Colour Television Chassis
VES1.1E
LA
See table of contents on page 3

Revision List
EN 2 VES1.1E LA1.
2013-Mar-29 back to
div. table
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
Manual xxxx xxx xxxx.1
• Added the Service Mode menu.
Manual xxxx xxx xxxx.2
• Added several new sets to this chassis, see table 2-1 Described
model numbers.
• Added the section Hotel Mode setup menu.
Manual xxxx xxx xxxx.3
• Added several schematics of the SSB.
• Added the schematics of the PSU.
2. Technical Specifications and Connections
Index of this chapter:
Technical specifications
Directions for Use
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
Technical Specifications
For on-line product support please use the links in Table 2-1. Here is
product information available, as well as getting started, user manuals,
frequently asked questions and software & drivers.
Table 2-1 Described model numbers
Directions for Use
You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
CTN Styling Published in:
19PFL2908H/12 2900 3122 785 19392
22PFL2807H/12 2800 3122 785 19390
22PFL2908H/12 2900 3122 785 19392
24HFL2808D/12 2800 3122 785 19392
24PFL2908H/12 2900 3122 785 19392
26HFL2808D/12 2800 3122 785 19392
26PFL2908H/12 2900 3122 785 19392
32PFL2807H/12 2800 3122 785 19390

Contents
1 Introduction ............................................................................................................................................. 6
1.1
General Block Diagram ................................................................................................................... 7
1.2 SSB Placement of Blocks.................................................................................................................. 8
2 Tuner (TU3) .............................................................................................................................................. 9
2.1 General description of the Sony RE216 tuner.................................................................................. 9
3 Audio amplifier stage with AZAD2102 (U163, U164)............................................................................. 11
3.1 General description........................................................................................................................ 11
3.2 Features.......................................................................................................................................... 12
3.3 Absolute
Ratings ........................................................................................................................... 13
3.3.1 Electrical
Characteristics ....................................................................................................... 13
3.3.2 Operating
specifications ....................................................................................................... 14
3.4 Pinning............................................................................................................................................ 15
4 Audio amplifier stage with TPA3113 (U168) .......................................................................................... 15
4.1 General Description ....................................................................................................................... 15
4.2 Absolute Ratings............................................................................................................................. 16
4.2.1 Electrical Characteristics ........................................................................................................ 16
4.2.2 Operating
Specifications ...................................................................................................... 17
4.3
Pinning ........................................................................................................................................... 17
5 Power stage ............................................................................................................................................ 18
5.1 Power management....................................................................................................................... 21
6 Microcontroller – MSTAR (U5) ............................................................................................................... 23
6.1 Description ..................................................................................................................................... 23
6.2 MSTAR block diagram .................................................................................................................... 27
6.3 Reset circuit.................................................................................................................................... 28
7 CI interface ............................................................................................................................................. 28
8 USB interface.......................................................................................................................................... 29
9 DDR2 SDRAM K4T1G164QF (U155) ....................................................................................................... 30
9.1 Description ..................................................................................................................................... 30
9.2 Features.......................................................................................................................................... 30
Pinning........................................................................................................................................................ 31
10 Scaler and LVDS sockets ..................................................................................................................... 32
10.1 LVDS sockets block diagram .......................................................................................................... 32
10.2 Panel supply switch circuit............................................................................................................. 32
11 SPI flash memory - MX25L1005 (U158) ............................................................................................. 33
11.1 General Description ....................................................................................................................... 33
11.2 Features.......................................................................................................................................... 33

11.3 Absolute maximum ratings............................................................................................................ 34
11.4 Pinning............................................................................................................................................ 34
12 NAND Flash memory – NAND512XXA2C (U162)................................................................................ 35
12.1 General Description ....................................................................................................................... 35
12.2 Features.......................................................................................................................................... 35
12.3 Pinning............................................................................................................................................ 36
13 LNBH23L (U6)..................................................................................................................................... 37
13.1 Description ..................................................................................................................................... 37
13.2 Features.......................................................................................................................................... 37
13.3 Block diagram................................................................................................................................. 38
14 Advanced DVB-S/S2 demodulator M88DS3002 (U3)....................................................................... 38
14.1 Description ..................................................................................................................................... 38
14.2 Features.......................................................................................................................................... 38
14.3 Pin Assignment .............................................................................................................................. 40
15 LM1117 (U175, U180, U181) .............................................................................................................. 41
15.1 General description........................................................................................................................ 41
15.2 Features.......................................................................................................................................... 41
15.3 Applications.................................................................................................................................... 41
15.4 Absolute maximum ratings ............................................................................................................ 41
15.5 Pinning............................................................................................................................................ 42
16 MP2012 (U176) .................................................................................................................................. 42
17 General description............................................................................................................................ 42
17.1 Features.......................................................................................................................................... 42
17.2 Pinning............................................................................................................................................ 43
18 RTA8283A (U23, U173) ....................................................................................................................... 43
18.1 General description........................................................................................................................ 43
18.2 Features.......................................................................................................................................... 43
18.3 Pinning............................................................................................................................................ 45
19 MP1583 (U174) .................................................................................................................................. 46
19.1 General description........................................................................................................................ 46
19.2 Features.......................................................................................................................................... 46
19.3 Pinning............................................................................................................................................ 46
20 FDC642 ............................................................................................................................................... 47
20.1 General description........................................................................................................................ 47
20.2 Features.......................................................................................................................................... 47
20.3 Pinning............................................................................................................................................ 47
21 FDC604P ............................................................................................................................................. 48

21.1 General description........................................................................................................................ 48
21.2 Features.......................................................................................................................................... 48
21.3 Pinning............................................................................................................................................ 48
22 Connectors ......................................................................................................................................... 49
22.1 SCART (SC1) .................................................................................................................................... 49
22.2 HDMI (CN707, CN708) ................................................................................................................... 49
22.3
VGA (CN711) ................................................................................................................................. 50
23 Service menu mode............................................................................................................................ 51
23.1 Main service menu......................................................................................................................... 51
23.2 Video Settings................................................................................................................................. 52
23.3 Audio Settings ................................................................................................................................ 52
23.4 Options 1 ........................................................................................................................................ 53
23.5 Options 2 ........................................................................................................................................ 53
23.6 Tuning Settings............................................................................................................................... 54
23.7 Source Settings............................................................................................................................... 54
23.8 Diagnostic....................................................................................................................................... 54
23.9 USB operations............................................................................................................................... 54
23.10 Profile Operations ...................................................................................................................... 57
23.10.1 Upload profile Data from USB............................................................................................ 57
23.10.2 PQ Files Operations............................................................................................................ 57
23.10.3 Upload PQ files from USB................................................................................................... 57
23.10.4 Ci+ credentials key update ................................................................................................. 57
23.10.5 HDCP keys update .............................................................................................................. 57
23.10.6 Edid update ....................................................................................................................... 58
23.10.7 DDR settings update........................................................................................................... 58
23.10.8 MAC address update .......................................................................................................... 58
23.11 Hotel Mode setup menu ............................................................................................................ 58
23.11.1 Hotel TV welcome image update (only available in Hotel TVs) ......................................... 58
24 Software update ................................................................................................................................. 59
25 Troubleshooting ................................................................................................................................. 59
25.1 No backlight problem..................................................................................................................... 59
25.2 CI module problem......................................................................................................................... 61
25.3 LED blinking problem ..................................................................................................................... 63
25.4 IR problem...................................................................................................................................... 63
25.5 Keypad touchpad problems........................................................................................................... 64
25.6 USB problems ................................................................................................................................. 65
25.7 No sound problem.......................................................................................................................... 65

25.8 No sound problem at headphone.................................................................................................. 66
25.9 Standby On/Off problem................................................................................................................ 66
25.10 DVD problems ............................................................................................................................ 67
25.11 No signal problem ...................................................................................................................... 67
26 Styling sheet ....................................................................................................................................... 69
27 Schematics.......................................................................................................................................... 70
27.1 SSB.................................................................................................................................................. 70
27.2 PSU ................................................................................................................................................. 79
1Introduction
The SSB is driven by a MStar SOC. This IC is capable of handling Video and audio
processing, Scaling-Display processing, 3D comb filter, OSD and text processing, LVDS
transmitting, channel and MPEG2/4 decoding, integrated DVB-T/C demodulator and
media center functionality.
The TV supports PAL, SECAM, NTSC colour standards and multiple transmission
standards as B/G, D/K, I/I’, and L/L’ including German and NICAM stereo. Also DVB T,
DVB-C are supported internal demodulators of Mstar IC and DVB-S/S2 is supported with
external demodulator.
Sound system output is supplying max. 2 × 2.5 W (less 10% THD at maximum output)
with 4
Ω
speakers or 2 × 6 W for stereo 8 Ω speakers.
Supported peripherals are:
1 RF input VHF I, VHF III, UHF @ 75 Ω (Common)
1 Side AV (CVBS, R/L_Audio)
1 SCART socket (Common)
1 YPbPr (Optional)
1 PC input (Common)
2 HDMI 1.3 input (1 HDMI input is common, 1 input is optional)
1 S/PDIF output (Optional)
1 Headphone (Optional)
1 Common interface (Common)
1 USB (Common)
1 DVD (Optional)
1 On-board Keypad (Optional)
1 External Keypad (Optional)
1 External TouchPad (Optional)

1.1 General Block Diagram
GPIO
D3K
Mstar
••
V GA
H D IJI1
!
i
- H P OE re cr-.
2XI i 'H
.O.U D I O AU '
Block D i a g r am
V 1 . 1
Drawn By U l as Dere i
03 . 0 1 . 2 0 1 1

1.2 SSB Placement of Blocks
Sat
Demod
CI Connector
Nand
Flash
(U162)
USB
YPbPr SAV HP
Satellite Tuner
Keypad
Speaker
Con.
Tuner(T3
)
External
Keyboard
Touchboard
Main IC
(U5)
HDMI
Connectors
VGA
SCART
Connec
tor
Led
Con
DVD
Connector
Power Connector
LVDS
Connectors
DDR2
RAM
(U155)
SPI
Flash
Adapter DC
Input
SPDIF
Out
Inv.
Con

2Tuner (TU3)
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3
Bands (From 48 MHz to 862 MHz for COFDM, from 45.25 MHz to 863.25 MHz for CCIR
channels). The tuning is available through the digitally controlled I2C bus (PLL).
In the active antenna option, the following circuits are used. ANT_CTRL pin is controlled by
microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high,
ANT_PWR will be high.
OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT
is low, ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is
done by circuits and microcontroller.
2.1 General description of the Sony RE216 tuner
The SUT-RE216 is designed for terrestrial TV (digital & analog) and digital cable
reception. It includes a full band tuner and a channel filtering for digital signals. It provides
a low IF output after channel filtering to drive a channel demodulator. Tuning, band
switching and initialization are made via an I2C bus
interface. The module is built on a low-loss printed
circuit board carrying all the components in a metal
housing frame with top and rear covers. The single
aerial connector is mounted on one frame side and all
other connections are made via pins at the bottom.
Features:
 Full frequency range from 47 to 870 Mhz
•Digital Platform (DVB-T/T2, DVB-C, ISDB-T & ATSC)
Analog platforms (PAL B/G/I/D/K, NTSC M & SECAM L/L’)
Low IF tuner concept

./ Programmable channel Filter bandwidth
./ Fully I
2
C bus controlled
./ For Hybrid TV applications
3 . 3V pull up
-
1000 1uF
----{)-------w. -
AGC:
I
1KO
: -------------------------------------- - • --- ---o ..-----'M'h\--{ ® f-----....-!-'N \ \ - O I Aoc I

---Pinning Table
and Application Block Diagram of Tuner---
3Audio amplifier stage with AZAD2102 (U163, U164)
3.1 General description
This chassis uses two 2.5 W Class D Mono Audio Amplifers for from 16" to 24"
TVs.
AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load = 3 Ω,THD = 10%,
AVdd = DVdd = 5.5 Volt) with high efficiency filter-free class-D audio power amplifier
in a 1613 mm x 1613 mm wafer chip scale package (WCSP). AZAD2102B uses
Current- switch technology to achieve high performance class-d amplifier that
features 0.03% THD, 85% efficiency, –70 dB PSRR, to improve RF-rectification immunity.
AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output. This
vibration frequency is around 10 kHz shift (+/- 5 kHz of Fpwm).
The advantage of the small size package (WCSP) makes AZAD2102B very suitable for
mobile phone and PDA device application. And the Class-D amplifier structure let
AZAD2102B to have highly efficiency power consumption than Class-AB amplifier.
AZAD2102B can shrink the application board, reduce system cost, and external
components.
ESD level protection I/O embedded in AZAD2102B. For general applications, there is
no need to add extra ESD protection devices (like Varistors) in application systems for
AZAD2102B’s I/O.

3.2 Features
•CMOS Technology
•High Efficiency 85%
•High PSRR 70 dB at 217 Hz
•Differential OP-amp Input
•AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI
•Provide Mute function (set Mute_B to GND will go into Mute status)
•For the input stage AZAD2102B built-in a 10Kohm resistors (Gain
setting = 29.5 dB)
•Maximum Battery Life and Minimum Heat
•Efficiency With an 8 Ω
Speaker:
•3.5 mA Quiescent Current
•Output Power at 10% THD
•2.85 Watts at AVdd = DVdd = 5.0 Volt, Rload = 4 Ω
•1.45 Watts at AVdd = DVdd = 3.6 Volt, Rload = 4Ω
•0.30 Watts at AVdd = DVdd = 3.0 Volt, Rload = 4Ω
•1.75 Watts at AVdd = DVdd = 5.5 Volt, Rload = 8Ω
•0.87 Watts at AVdd = DVdd = 3.6 Volt, Rload = 8Ω
•0.41 Watts at AVdd = DVdd = 3.0 Volt, Rload = 8Ω
•Eliminate Power on and Power-off “Pop” noise
•A fewer external components
•Optimized PWM output stage eliminates LC output filter
•Internally generate 290 kHz switching frequency to eliminate capacitor and resistor
•Improve PSRR (–70 dB) and wide supply voltage (3.0 V to 5.5 V)
•Fully differential design reduces RF rectification
•This chip has been built-in a very strong ESD protection.
•System level ESD 4 KV (IEC 61000-4-2 ESD Contact Level)
•Wafer chip scale package (WCSP)
•TSSOP package with exposed pad

.
3.3 Absolute
Ratings
3.3.1 Electrical Characteristics
VDD = AVdd = DVdd , VSS = AVss = DVss = Ground
TA =
25˚C, F il ter Bandwidth = 20 Hz -20 kHz
P ARA M ET E R Symbo l TEST COND TI ON S M N I TYP M AX
UN IT
Operat i ng Vo t l age
Vop
AVdd-DVdd to AVss - DVss
3.0 5 5.5
v
Output offset vo l tage vos
VDD = 5.5 V,VI= 0 V,AV = 6 V/V 4.5 6.5
mV VDD = 3.6 V,VI= 0 V,AV = 6 V/V 2 . 1 4. 0
VDD = 3.0 V,VI= 0 V,AV = 6 V/V 1.2 3.0
Power supply rejection
ra tio
PSRR
VDD
= 3.0 V to 5.5 V, AV = 2 V/V
i npu t ac grounded w i th
Ci = 2.2uF , Vr i pp l e= 200mVpp,
RL=80 f= 217Hz
- 68
dB
Common mode rejec t io n
ra tio
Cf':lRR VDD
= 3 . 0 V to 5 . 5 V,Vic = VDD/2 to
0 . 5 V, V i c = VDD/2 to 0.5 VDD -0.8 V,
- 65
dB
H i gh lev e l nput
c u rr e n t
I IIH II
VDD= 5.5V, V i = 5.8V
25 uA
Low l eve l Input
c u rr en t
I IlLI
VDD= 5.5V, V i =- 0.3V
1 uA
Operat i on c u r ren t lop
VDD
= 5.5 V,no l oad 3.6
5 . 0
mA
VDD = 3.6 V,no l oad 3.0 4.2
VDD = 3.0 V,no l oad 2 . 5 3.5
Output
sw i t c h i n g
frequency
F pwm
VDD = 5.5 V,no l oad 290
KHz
VDD = 3.6 V,no l oad 300
VDD = 3.0 V,no l oad 3 1 5
Vibration-Spectrum
Modulation clock Ranqe
F vs VDD = 5 . 0 V,no l oad
+/-5 + / - 1 0
KHz
Under Voltage
Protect ion UVP
Vin+ and Vin- connect to GND,no lo ad 2 . 0 2.5
v
Mute_B pin Impedance
RMuBMute_B
to Ground
270 KQ
Gain G a i n
VDD=5.0V , R i =5K0+10K
O
(Av = 20V/V)
18
I
20
I
22
V/V

3.3.2 Operating specifications
TA = 25 ° C , Gai n = 20 V/V,
P ARA M ETER TEST COND TIO N S MIN TYP M AX
UN IT
Pw
Output powe r
THO+ N = 1 0%, f = 1 kHz, R L
= 4Q
VDD
= 5.0V
2.85
w
VDD = 3 . 6 V
1 .45
VDD = 3.0 V
0.77
THO + N = 1%, f = 1 kHz,
RL = 4 Q
VDD
= 5.0 V 2.25
w
VDD = 3 . 6 V 1.15
VDD = 3.0 V
0.60
THO+ N = 10%, f = 1 kH z , R L
= 8Q
VDD = 5 . 0 V 1.75
w
VDD = 3.6 V 0.87
VDD = 3 . 0 V 0.47
THO + N = 1%, f = 1 k H z,
RL
= 8 Q
VDD
= 5.0 V 1.39
w
VDD = 3 . 6 V
0 . 70
VDD = 3.0 V
0.36
THD+N
Total ha rmonic
d i stortion plus noise
VDD
= 5.0 V,PO = 1 W, RL = 8 Q,f = 1 kHz
0 . 15
% VDD = 3.6 V,PO = 0.5 W,RL = 8 Q, f = 1 kHz 0 . 1 2
VDD = 3.0 V,PO = 200 mW, RL = 8 Q, f = 1 kHz
0,09
PSRR
Sup p l y ripple
rejec t i on ra t i o
VDD
= 3.6 V,
Av=20V/V,Inputs connect to
grounded w i t h Ci = l . OJ,JF
F
= 217 H . z,
VRip p l e = 200
mVpp
- 67
dB
SNR
S i gna l -to-no i se r atio VDD
= 5 V,PO = 1 W, R L = 8 Q 95 dB
Vno i se Output noise lev e l
VDD
= 3.6 V,f = 20 Hz to 20
kHz, nputs ac-grounded w i th
C i = l . OJJF
No weigh t ing
45
J,JVRMS
A we i ght in g
40
CMRR Common
mode
rejec t i on ratio
VDD = 3.6 V,V i n = 1 00mVpp f = 217Hz
-72
dB
ZI Input impedance 8
10 12 kQ
ZF Feedback res
isto r
120
1 5 0 1 80
kQ

3.4 Pinning
4Audio amplifier stage with TPA3113 (U168)
4.1 General Description
This chassis uses a 6 W Class D Mono Audio Amplifier for from 26” to 32” TVs.
The TPA3113D2 is a 6 W (per channel) efficient, Class-D audio power amplifier for driving
bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of
inexpensive ferrite bead filters at the outputs while meeting EMC requirements.
SpeakerGuard™ speaker protection circuitry includes an adjustable power limiter and a
DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage
rail lower than the chip supply to limit the amount of current through the speaker. The DC
detect circuit measures the frequency and amplitude of the PWM signal and shuts off the
output stage if the input capacitors are damaged or shorts exist on the inputs.
The TPA3113D2 can drive stereo speakers as low as 4 Ω. The high efficiency of the
TPA3113D2, 87%, eliminates the need for an external heat sink when
playing music.
The outputs are also fully protected against shorts to GND, VCC, and output-to-output.
The short-circuit protection and thermal protection includes an auto-recovery feature.

3.2. Features
• 6 W/ch into an 8-ΩLoads at 10% THD+N From a 10-V Supply
• 12-W into a 4-ΩMono Load at 10% THD+N From a 10-V Supply
• 87% Efficient Class-D Operation Eliminates Need for Heat Sinks
• Wide Supply Voltage Range Allows Operation from 8 V to 26 V
• Filter-Free Operation
• SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter plus DC
Protection
• Flow Through Pin Out Facilitates Easy Board Layout
• Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto
Recovery Option
• Excellent THD+N / Pop-Free Performance
• Four Selectable, Fixed Gain Settings
• Differential inputs
4.2 Absolute Ratings
4.2.1 Electrical Characteristics

4.2.2 Operating Specifications
AC CHAR A CTER I ST I CS
TA = 25•c, Vee = 12 V, R L = 8 0 (unless otherw i se n o t e d )
PARAM E TER TEST COND I T I ONS M I N TYP MAX UN I T
KsvR
Supply ripp l e re j ec t i on 200 mVpp
r i pp l e from 20 Hz-1 k H z,
Ga i n = 20 d B, I n pu t s ac-coupled to AG NO
- 70 dB
THO+N T ota l harmonic distortion +n o i se RL = 8 0, f = 1 kH z , Po = 3 W ( h a lf - p owe r )
0 . 06 %
Vn
Output i n t e gr ate d n o i s e 20 Hz to 22 k Hz , A - we i g h ted fi lter , Gani = 20 d B
65
IJV
-80
d BV
Crossta l k P
0
= 1 W , Ga i n = 20 dB , f = 1 kH z - 1 00
dB
SNR Signa-l to-noise r a t o i
M ax i mum output at THO+N < 1% , f = 1 k Hz ,
Ga i n = 20 dB, A - w e i ghted
102
dB
fosc
Oscillator f r e qu en cy
250 310 350 k H z
T herma l tr i p poi n t 1 50
· c
T h e rma l h ysteresis 15
·c
4.3 Pinning
P I N
110/P D E SCR I P T I ON
N AM E
P i n
Numbe r
so
1 I Shutdown
log i c i n p u t for a u d i o amp (LOW = outputs Hi-Z,HIGH = ou t pu t s
enab l ed) . T T L l ogic l eve l s w i th comp l i anc e to AVCC.
FAUL T 2 0
Open
dra i n output used to display short c i r cuit or de detect fa u l t s t a tu s. Vo t lag e
comp i lan t to AVC C . S hort ci r cu i t faults can be set to auto-recovery by co n necti n g
FAULT p i n to SO pi n . Otherwis e , both short c i r c u i t fau l ts and de detect faults must
be reset by c y c l ing PVCC .
LI NP 3 I Pos t i i ve audio input for l eft channeL Biased at 3V.
LI N N 4 I Negat i v e audio i npu t for l eft channeL Biased at 3V .
GA l N O
5
I Gani se l ec t least s i g n ifi can t bit. TTL log i c levels w i th c om p l ian ce to AVC C .
GAIN 1 6 I Gani seel ct most significant b i t TT L l ogic l eve l s w i th comp l ian c e to AVCC.
AVCC 7
p
Ana l og su pp l y
AGNO
8
A n a l og s i g na l gr ou nd. Connect to the t he r ma l pa d .
GVOO 9 0
H i g h - s i d e FET gate drive su p p l y.N o m i n a l vo l tag e i s 7V. A l so should be used
as supply for PLIMIT fu n c ti o n
P LI M I T 1 0 I Power
l i m t i leveladjust Connect a r es i sto r d i v i der from GVOO to GND to s e t
power l im i t. Connect d i rec tl y to GVOO for no power li mit.
R I NN 11 I Negat i ve audio i npu t for r i g ht c h anne . l B i ased at 3V.
R I NP 12 I Posit i ve audio input for r i gh t channeL B i ase d at 3V.
NC 13 Not connected
PBTL 1 4 I P a r a l l el B TL mode switc h
PVCCR 1 5
p Power supply for
r i gh t c h a n nel H - br i d g e. R i ght c han n e l and left c h an n e l powe r
supply i nputs are connect i n t ernally .
PVCCR
1 6
p Power supply for
r i g h t channel H - br i dge. R i ght channeland l eft
cha n n e l power supply i nputs are connect i n t ernally.
BS P R 1 7 I Bootstrap 11 0 for right channe l , posi t i ve high-side FET.
OUTPR 1 8 0 C l ass - 0 H-bridge pos i tive output for r i g h t c han ne l.
PGNO 1 9 Power ground for the H - br i dges .
OU T NR 20
0
C l ass - 0 H-bridge negative output for r i g h t c han ne l.
BS N R 21 I Bootstrap 1 / 0 for right chan ne l , nega t i ve high-side FET.
BS N L 22 I Bootstrap 1 /0 for left c hanne , l n ega t i ve high-side F ET .
O U T NL 23 0 C l ass - 0 H-bridge n e gat i ve output for l eft chan ne l.
PGNO 2 4 Power ground for the H - br i dges .
OU T PL 25
0
C l ass - 0 H-bridge pos i tive output for l eft channe L
BSPL 26 I Bootstrap 1 / 0 for left c hanne , l p os i t i ve high-side FE T .
PVCCL 27
p Power supply for
l eft channe l H - br i dge. Right channe l and l eft channe l power
supply
i np u ts are connect i n t ernally .
PVCCL 28
p Power supply for
l eft channe l H- br i dge. Right chan ne l and l eft channe l power
supply
i nputs are connect i nternally.

5Power stage
The DC voltages required at various parts of the chassis and panel are provided by a
main power supply unit. This chassis can operate with the different supplies: IPS60,
IPS16, IPS17, PW26, PW27 as main power supply and also with 12V adaptor.
CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW27.
JK9 is used for the adapter option and also CN705 inverter socket or DB32 chassis with
CN706 is used to supply backlight.
The power supplies generate 18V, 12V, 5V, 3,3V and 12V, 5V, stand-by mode DC
voltages. Power stage which is on-chassis generates 5V, 3V3 stand by voltage and 12V,
8V, 5V, 3V3, 2.5V, 1,8V and 1,2V supplies for other different parts of the chassis. Chassis
block diagram is indicated below.

The blocks on power block diagram is using dependent to main supply. For PW26 and
PW27 just common blocks are enough for proper operation.
For IPS16, IPS17, IPS60 below blocks must work properly.
For adapter case also below blocks are necessary.

Short CCT Protection Circuit
Short circuit protection is necessary for protecting chassis and main IC against damages
when any Vcc supply shorts to ground. Protect pin should be logic high while normal
operation. When there is a short circuit protect pin shold be logic low. After any short
detection, SW forces LEDs on LED card to blink.