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ORDER NO.
PIONEER CORPORATION 4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, Japan
PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
PIONEER CORPORATION 2006
CRT3815
CD MECHANISM MODULE(S10.5COMP2)
CX-3195
Model Service
Manual CD Mechanism
Module
This service manual describes the operation of the CD mechanism module incorporated
in models listed in the table below.
When performing repairs use this manual together with the specific manual for model
under repair.
DEH-2900MP/XN/EW5 CRT3802
DEH-2920MP/XN/EW5
DEH-2900MPB/XN/EW5
DEH-2910MP/XN/UR
DEH-2950MP/XN/ES CRT3820
DEH-2950MP/XN/ES1
DEH-2990MP/XN/ID
DEH-P390MP/XU/UC CRT3816
DEH-P3900MP/XU/UC
DEH-P4950MP/XU/ES CRT3817
DEH-P4950MP/XU/CN5
DEH-P2900MP/XU/UC CRT3823
DEH-P3950MP/XU/ES CRT3824
DEH-P3950MP/XU/CN5
DEH-P5900MP/XU/EW5 CRT3828
DEH-3900MP/XN/EW5 CRT3804
DEH-3990MP/XN/ID CRT3829
DEH-P40MP/XU/EW5 CRT3834
DEH-P4950MP/XU/ES CRT3835
DEH-P490IB/XN/UC CRT3846
DEH-P4900IB/XN/UC
DEH-P4900IB/XN/EW5 CRT3847
DEH-P5950IB/XN/ES CRT3848
DEH-P5950IB/XN/ES1
DEH-P5990IB/XN/ID
DEH-P590IB/XN/UC CRT3851
DEH-P5900IB/XN/UC
DEH-P6900IB/XN/EW5 CRT3852
DEH-P6950IB/XN/ES CRT3853
DEH-P6950IB/XN/ES1
Model Service
Manual CD Mechanism
Module
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
CXK5760
K-ZZA. OCT. 2006 Printed in Japan
CX-3195
2
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CONTENTS
1. CIRCUIT DESCRIPTIONS ............................................................................................................................... 3
2. MECHANISM DESCRIPTIONS...................................................................................................................... 20
3. DISASSEMBLY .............................................................................................................................................. 22
CX-3195 3
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1. CIRCUIT DESCRIPTIONS
V850ES core
BMC
EFM
decoder
1bit DAC
Internal RAM
(1Mbit)
PE5547A
Port control
Audio
DSP
CIRC
PORT I/F
SRAM
Analog output
RF amplifier
CD-ROM
decoder
Digital servo
A,B,E,F Signal
The recent mainstay of the CD LSI is the LSI integrating the core DSP with DAC or RF amplifier, which are generally
employed as peripheral circuits, however, PE5547A, used in this product, is an LSI integrating the afore-mentioned
LSI unit and microcomputer unit in one chip.
Fig.1.0.1 Block diagram of CD LSI PE5547A
CX-3195
4
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6.5k
+
-
1k
100k
+
-
6.5k
100k
+
-
150k
1k
REG 1.25V
Vref
3p
142
PD
LD
PE5547A
143
+
5
7
15
5
7
15
14 14
Pickup Unit CD CORE UNIT
2R4 x 2
2SA1577
LD-
LD+
MD
VR
LDS
APN
2R7
4.7
In the preamplifier block, the pickup output signals are processed to generate signals that are used in the subsequent
blocks: servo, demodulator, and control blocks. Signals from the pickup are I/V converted in the pickup with the
preamplifier with built-in photo detectors, and after added with the RF amplifier, they are used to produce such signals as
RF, FE, TE, and TE zero-cross signals. The preamplifier block is built in CD LSI PE5547A (IC201), whose parts are
described individually below. Incidentally, as this LSI employs a single power supply (+ 3.3 V) specification, the reference
voltages of this LSI and the pickup are the REFO (1.65 V) for both. The REFO is an output obtained from REFOUT in the
LSI via the buffer amplifier, and is output from the pin 133 of this LSI. All measurements will be performed with this REFO
as the reference.
Caution: Be careful not to short-circuit the REFO and GND when measuring.
1.1.1 APC (Automatic Power Control) circuit
Since laser diodes have extremely negative temperature characteristics in optical output when driven in constant current,
it is necessary to control the current with the monitor diodes in order to keep the output constant. This is the feature of the
APC circuit. The LD current is obtained by measuring the voltage between LD1 and V3R3, and divide the value by 7.5
(ohms), which becomes about 30 mA. The voltage between LD1 and V3R3 is set to about 225 mV.
Fig.1.1.1 APC
1.1 PREAMPLIFIER BLOCK
CX-3195 5
5 678
5678
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D
F
A
B
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13
6
A+C
B+C
VREF
13
6
10k 8.8k
10k 8.8k
61.0k
61.0k
140k
R2
15.2k
15.2k
44k 20k 11.75k
3.55k
5k 5k
129
130
125
123
124
119
135
134
RFOFF setup
FEOFF setup
VREF
VREF
A
B
RFO
AGCI
RF2-
RF-
EQ2
EQ1
AGCO
FEO
FE-
FE A/D
121
122
+
-
+
-
+
-
+
-
+
-
+
-
-
+
P3
P7
P9
P2
P4
P8
Pickup Unit
CD CORE UNIT
PE5547A
4.7k
5.6k
1.2k
1.2k
22p
56p
4p
126
For RFOK generation
To DEFECT/A3T detection
160k
1.1.2 RF and RFAGC amplifiers
The output from the photo-detector (A + C) and (B + D) is provided from the RFO terminal as the RF signal (which can be
used for eye-pattern check), after it is added, amplified, and equalized inside this LSI. The low frequency component of the
voltage RFO is calculated as below.
RFO = (A + B + C + D) x 2
The RFO is used for the FOK generation circuit and RF offset adjustment circuit.
The RFO signal, output from the pin 122, is A/C-coupled externally, input to the pin 121, and amplified in the RFAGC
amplifier to obtain the RFAGC signal.
Also, this LSI is equipped with the RFAGC auto-adjustment function, explained below, which switches feedback gains of
the RFAGC amplifier so that the RFO output will be 1.5 V.
This RFO signal is also used for the EFM, DFCT, MIRR, and RFAGC auto-adjustment circuits.
Fig.1.1.2 RF/AGC/FE
CX-3195
6
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F
A
B
E
11
9
E
F
VREF
11
9
112k
112k
63k
45.36k
63k
160k 160k
45.36k
161k
80k 160k
60k
20k
132
131
TEOFF setup
TE A/D
Inside TEC
Pickup Unit
P5
P10
P1
P6
E
F
PE5547A
CD CORE UNIT
+
-
+
-
+
-
+
-
+
-
+
-
-
+
VREF
TEO
TE-
TEC
TE2
138
137
139
140
47p
10000p
1.1.3 Focus error amplifier
The photo-detector outputs (A + C) and (B + D) are passed through the differential amplifier and the error amplifier, and (A
+ C - B - D) is provided from the pin 135 as the FE signal. The low frequency component of the voltage FE is calculated as
below.
FE = (A + C - B - D) x 8.8k / 10k x 111k / 61k x 160k / 72k
= (A + C - B - D) x 3.5
For the FE outputs, an S-shaped curve of 1.5 Vp-p is obtained with the REFO as the reference. The cutoff frequency for
the subsequent stage amplifiers is 14.6 kHz.
1.1.4 RFOK circuit
This circuit generates the RFOK signal, which indicates the timing to close the focus loop and focus-close status during
the play mode, from the pin 70. As for the signal, "H" is output in closing the focus loop and during the play mode.
Additionally, the RFOK becomes "H" even in a non-pit area, since the DC level of the RFO signal is peak-held in the
subsequent digital block and compared at a certain threshold level to generate the RFOK signal. Therefore, the focus is
closed even on a mirror-surface area of a disc. This signal is also supplied to the microcomputer via the low-pass filer as
the FOK signal, which is used for protection and gain switching of the RF amplifier.
1.1.5 Tracking error amplifier
The photo-detector outputs E and F are passed through the differential amplifier and the error amplifier to obtain (E - F),
and then provided from the pin 138 as the TE signal. The low frequency component of the voltage TE is calculated as
below.
TEO = (E - F) x 63k / 112k x 160k / 160k x 181k / 45.4k x 160k / 80k
= (E - F) x 4.48
For the TE output, TE waveform of about 1.3 Vp-p with the REFO as the reference. The cutoff frequency in the subsequent
is 21.1 kHz.
Fig.1.1.3 TE
CX-3195 7
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1.1.6 Tracking zero-cross amplifier
The tracking zero-cross signal (hereinafter referred to as TEC signal) is obtained by amplifying the TE signal by fourfold,
and used to detect the tracking-error zero-cross point. As the purpose of detecting the zero-cross point, the following two
points can be named:
1. To use for track-counting in the carriage move and track jump modes
2. To use for detecting the direction in which the lens moves in tracking close. (Used in the tracking brake circuit to be
explained later.)
The frequency range of the TEC signal is from 300 Hz to 20 kHz, and
TEC voltage = TE level x 4
The TEC level can be calculated at 4.62 V, which, at this level, exceeds the D range of the operational amplifier, and clips
the signal, but, because the CD LSI only uses the signal at the zero-cross point, it poses no particular problem.
1.1.7 EFM circuit
The EFM circuit converts the RF signal into digital signals of 0 and 1. The AGCO signal output from the pin 119 is
A/C-coupled externally, input to the pin 118, and supplied to the EFM circuit.
Missing RF signal due to scratches and stains on the disc, and asymmetry of the upper and lower parts of the RF, caused
by variation in disc production, cannot be entirely eliminated in AC coupling process, the reference voltage ASY of the
EFM comparator is controlled, using the probability that 0 and 1 occur at 50%. Thus, the comparator level will always stay
around the center of the RFO signal. This reference voltage ASY is generated by passing the EFM comparator output
through the low-pass filter. The EFM signal is output from the pin 113.
Fig.1.1.4 EFM
RFI
40k
40k 1.5k 7.5k
2k
118
114
113
Vdd
Vdd
EFM signal
EFM
ASY
PE5547A
+
-
+
-
+
-
CX-3195
8
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The servo block performs servo control such as error signal equalizing, in-focus, track jump and carriage move. The DSP
block is the signal-processing unit, where data decoding, error correction, and compensation are performed. The FE and
TE signals, generated in the preamplifier stage, are A/D-converted, and output drive signals for the focus, tracking, and
carriage systems via the servo block. Also, the EFM signal is decoded in the signal-processing unit, and ends up in
outputting D/A-converted audio signals through the D/A converter. Furthermore, in this decoding process, the spindle
servo error signal is generated, supplied to the spindle servo block, and used to output the spindle drive signal.
Each drive signal for focus, tracking, carriage, and spindle servos (FD, TD, SD, and MD) are output as PWM3 data, and
then converted to analog data through the LPF. These drive signals, after changed to analog form, can be monitored with
the FIN, TIN, CIN, and SIN signals, respectively. Subsequently, the signals are amplified and supplied to the actuator and
motor for each signal.
1.2.1 Focus servo system
The main equalizer of the focus servo consists of the digital equalizer block. The figure 1.2.1 shows the block diagram of
the focus servo system.
In the focus servo system, it is necessary to move the lens within the in-focus range in order to close the focus loop. For
that purpose, the in-focus point is looked for by moving the lens up and down with the focus search voltage of triangular
signal. During this time, the rotation of the spindle motor is retained at a certain set speed by kicking the spindle motor.
The servo LSI monitors the FE and RFOK signals and automatically performs the focus-close operations at an appropriate
timing. The focus-close operation is performed when the following three conditions are satisfied at the same time:
1) The lens moves toward the disc surface.
2) RFOK = "H"
3) The FE signal is zero-crossed.
Consequently, the FE converges to "0" (= REFO).
When the above-mentioned conditions are met and the focus loop is closed, the FSS bit is shifted from "H" to "L," and
then, in 10 ms, the CPU of the LSI starts monitoring the RFOK signal obtained through the low-pass filter.
If the RFOK signal is determined to be "L," the CPU of the LSI takes several actions including protection.
Fig.1.2.2 shows a series of actions concerning the focus close operations. (It shows a case where the focus loop cannot
be closed.)
With the focus mode selector displaying 01 in the test mode, pressing the focus close button, allows to check the
S-shaped curve, search voltage, and actual lens behavior.
Fig.1.2.1 Block diagram of the focus servo system
1.2 SERVO BLOCK (PE5547A: IC201)
129
130
A + C
B + D
PWM FD
109
IC201 PE5547A
6
11
12 FOP
FOM
LENS
IC301 BA5839FP
FE
AMP A/D DIG.
EQ
FOCUS SEARCH
TRIANGULAR
WAVE GENERATOR
CONTROL
CX-3195 9
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Fig.1.2.2 Timing chart for focus close operations
1.2.2 Tracking servo system
The main equalizer of the tracking servo consists of the digital equalizer block. The figure 1.2.3 shows the block diagram of
the tracking servo system.
Fig.1.2.3 Block diagram of the tracking servo system
E
F
LENS
132
131
PWM TD
110 2
13
14 TOP
TOM
IC301 BA5839FP
IC201 PE5547A
TE
AMP A/D DIG.
EQ
JUMP
PARAMETERS
CONTROL
FE controlling signals
FSS bit of SRVSTS1 resistor
RFOK signals
Output from FD terminal
A blind period
Search start
You can ignore this for blind periods.
The broken line in the figure is assumed in the
case without focus servo.
The status of focus close is judged from the statuses
of FSS and RFOK after about 10 mS.
CX-3195
10
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(a) The track jump operation is automatically performed by the auto-sequence function inside the LSI with a command
from the CPU of the LSI. For the track jumps used in the search mode, a single track jump and four to 100 multi-track jump
are available in this system. In the test mode, out of these track jumps, 1, 32, and 32 * 3 track jumps, as well as carriage
move can be performed and checked in mode selection. In a track jump, the CPU of the LSI sets about half the number of
the total tracks to jump (about five tracks for a 10-track jump), and the set number of tracks are counted using the TEC
signal. By outputting the brake pulse for a certain period of time (set by the CPU of the LSI) from the time the set number
is counted, and stopping the lens, the tracking loop can be closed so that the normal play can be continued.
Also, in order to facilitate closing of the tracking loop in a track jump, the brake circuit is kept ON for 50 msec, after the
brake pulse is stopped, for increasing the tracking servo gain. The FF/REW action in the normal operation mode is
realized by performing single jumps consecutively. The speed is approximately 10 times faster than in the normal mode.
(b) Brake circuit
Since the servo loop is not closed very well in the setup mode and track jump mode, the brake circuit is used for stabilizing
the servo-loop close operation. The brake circuit detects the direction in which the lens moves, and outputs only the drive
signal for the direction opposite to the movement to slow down the lens, thereby stabilizing the tracking servo-loop close
operation. Additionally, the off-track direction is determined from the TEC and MIRR signals, as well as their phase
relation.
Fig.1.2.4 Single-track jump
t1
t2
GAIN NORMAL
TD
KICK
BRAKE
TEC
T. BRAKE
EQUALIZER
T. SERVO
CLOSED
OPEN
NORMAL
GAIN UP
OFF
ON