Pioneer CX-3168 User manual

ORDER NO.
PIONEER CORPORATION 4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, Japan
PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
PIONEER CORPORATION 2005
CRT3467
CD MECHANISM MODULE(G3)
CX-3168
CX-3116
K-ZZU. APR.2005 Printed in Japan
X-3168 :TOYOTA
X-3116 : FORD
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This service manual describes the operation of the CD mechanism module incorporated in models listed
in the table below.
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When performing repairs use this manual together with the specific manual for model under repair.
Model Service Manual CD Mechanism Module
AVIC-XD1057ZF/UC
AVIC-XD1557ZF/UC
AVIC-XD1957ZF/UC
CRT3458 CXK7300
DEH-MG2057ZF/XU/UC CRT3480 CXK7300
DEX-MG8157ZT/UC
DEX-MG8057ZT/XU/UC CRT3486 CXK7310
DEH-MG8257ZT/UC CRT3487 CXK7310
CONTENTS
1. CIRCUIT OVER VIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. MECHANISM OVER VIEW . . . . . . . . . . . . . . . . . . . . . . 23
3. DISASSEMBLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4. HOW TO ASSEMBLE . . . . . . . . . . . . . . . . . . . . . . . . . . 45

CX-31682
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1. CIRCUIT OVER VIEW
Fig.1 UPD63763AGJ(X-3168),UPD63761AGJ(X-3116) block diagram
A-F
UPD63763AGJ,
UPD63761AGJ Audio output
SDRAM
16Mbit
Microcomputer
Digital servo
RF amp
CD-ROM
decoder
EFM
Signal
processing
Built-in SRAM (1M bit)
Buffer memory
controller (BMC)
MP3/WMA
decoder
DAC
Concerning CD LSI, beside the core DSP, LSI which unifies DAC once used as peripheral circuit or RF amp is the
mainstream, and UPD63763AGJ,UPD63761AGJ is a multifunction LSI which has a plenty of functions such as existing
CD and replay CD-ROM storing MP3/WMA file by embedding CD-ROM decoder or MP3/WMAdecoder.
*X-3116 has built-in WMA decoder by each LSI function, but is not corresponded to its specification.

CX-3168 3
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1.1 PREAMP SECTION
1.1.1 APC circuit (Automatic Power Control)
Fig.2 APC
PU unit CD core unit
MD
VR
LD-
LD+
11
13
10
9
11
13
10
9
1000P
CTF1389
0.1µF
15/3R3 2SB1132
2R4 x 22R7
+
+
-
+
-
+
-
PD
VREF
REG 1.25V
APN
LDS
UPD63763AGJ,
UPD63761AGJ
LD
143
142
6R5K
1K
6R5K
1K
110K
100K
100K
3P
The preamp section is processing pick-up output signal and generating signal to servo section, demodulator section and
control section of the next stage. The signal from pick-up is I-V converted by photodetector-built-in preamp in the pick-up,
then added by RF amp and created RF, FE, TE, TE empty cross signal. This preamp section is embedded in CD LSI
UPD63763AGJ,UPD63761AGJ (IC201), and each section of it is explained below. Since the spec of this LSI is single
power supply (+3.3V), reference voltage of this LSI and pick-up should be all REFO (1.65V). REFO is the output from
REFOUT in the LSI through buffer amp, and its output comes from the number 133 pin of the LSI. All measurement is
based on the REFO.
NOTE: Never short-circuit REFO and GND.
Since light output has large minus temperature characteristics when laser diode is operated under constant current, it is
necessary to control current by monitor diode so that constant output is maintained. This is APC circuit. LD current is
generated by measuring current between LD1 and V3 R3 and dividing the value by 7.5 , and its current value should be
about 30mA.

CX-31684
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1.1.3 Focus error amp
1.1.4 RFOK circuit
1.1.5 Tracking error amp
Fig.3 TE
P5
VERF
E11
F
E
F
9
11
9
P6
P1
P10 130 112K
160K
129 112K
160K160K
63K
80K
181K
45R36K
45R36K
+
-
63K
+
-
+
-
VREF
TEOFF setting TE A/D
+
-
+
-
+
-
+
-
60K
20K
Internal TEC
139
TEO
138
TE-
140
TE2
141
TEC
47P
68P
CD core unit
PU unit
UPD63763AGJ,
UPD63761AGJ
The photodetector output (A+C), (B+D) comes from the number 91 pin as FE signal which is (A+C-B-D) through
differential amp and then error amp. The low frequency of voltage FE is showed in the following formula.
FE=(A+C-B-D) X 8.8k / 10k X 111k / 61k X 160k / 64k =(A+C-B-D) X 4
The FE output generates 1.5Vpp of S curve based on REFO. The cut-off frequency of the amp in back stage is 14.6kHz.
This circuit is signal expressing timing of focus-close and focus-close condition during playing, and output from the
number 55 pin as RFOK signal output. During playing at focus-close, "H" is output as signal.
Since RFOK signal holds a peak of DC level of RFAGCI at digital section in back stage and is converted and generated
by certain threshold level, RFOK is "H" without a bit. Therefore, focus-close is also performed in disc mirror surface. This
signal is supplied to a microcomputer via LPF as FOK signal and used for protection and switching gain of RF amp.
The photodetector output E, F comes from the number 139 pin, taking (E-F) as TE signal through a differential amp and
then an error amp. The low frequency of TE is showed in the following formula.
TEO=(E-F) X 63k / 112k X 160k / 160k X 181k / 45.4k X 160k / 80k = (E-F) X 4.48
TE output generates 1.15Vpp level TE waveform based on REFO. The cut-off frequency of the amp in back stage is
21.1kHz.

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1.1.6 Tracking empty cross amp
1.1.7 EFM circuit
Fig.4 EFM
114
2K
100K
40K
40K
VDD
VDD
+
-
+
-
+
-
RFI
UPD63763AGJ,
UPD63761AGJ
EFM signal
111
EFM
112
ASY
The tracking empty cross signal (hereafter, TEC signal) is the signal amplifying TE signal for 4 times and used to find an
empty cross point of tracking error. The purpose for finding the empty cross point is;
1To use for track count at carriage movement and track jump
2To use for detecting direction of lens movement at tracking close (used in a tracking brake circuit described later)
The frequency range of TEC signal is 300 Hz - 20kHz, and voltage TEC=TE level X 4.
That is, TEC level is 4.62V as calculated, and this level is over D range of an operation amp and so that the signal is
clipped, but only empty cross point is used in CD LSI, so there is no problem.
EFM circuit is the circuit for converting RF signal into "0" "1" digital signal. AGCO signal output from the number 116 pin
is AC-combined, input to the number 114 pin, and supplied to EFM circuit.
Since RF vertical asymmetry occurred because of the lack of RF signal by a scratch or dirt on a disc, and quality
variation of disc production is not deleted only by AC-combination, reference voltage ASY of EFM comparator is
controlled, taking advantage of the fact that the occurring rate of "0" "1" in EFM signal is 50%. In this way, the
comparator level is always around the center of RFO signal. This reference voltage ASY is generated with passing EFM
comparator output through LPF. EFM signal is output from the number 111 pin.

CX-31686
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1.2 SERVO SECTION (UPD63763AGJ,UPD63761AGJ: IC 201)
1) Focus servo system
FE
AMP DIG. EQ
125
A+C
B+D FD FO+
FO-
IC302
BD7962FM
LENS
IC201 UPD63763AGJ,UPD63761AGJ
128 101 18
17
FOCUS SEARCH
TRIANGULAR
WAVE GENERATOR
DAC
CONTROL
A/D R218
10K
R311
C219
1000pF
8R2K
R313
27K
C302
150P
10
11
Fig.5 Focus servo block diagram
The servo section operates servo control such as
equalizing of error signal, in-focus, track jump, carriage
move, etc. DSP is section for signal processing and
operates data decoding, error correction, interpolation
processing, etc. FE, TE signal generated in preamp stage
is A/D converted and outputs drive signal of focus,
tracking, and carriage system via servo block. And EFM
signal is decoded in the signal processing section and
outputs audio signal after D/A convert via D/A converter
finally. In addition, in this decoding process, error signal of
a spindle servo is generated, and supplied to the spindle
servo section, and outputs drive signal for the spindle.
Each drive signal of focus, tracking, carriage and spindle
is amplified by the driver IC BD7962FM (IC302) after that
and supplied to each actuator and motor.
The main equalizer of focus servo is made up of digital
equalizer section. The fig 10 shows a block diagram of
focus servo.
In the focus servo system, it is necessary to bring a lens
within in-focus range to focus-close. In order to do that,
triangle wave of focus search voltage moves a lens up
and down to find in-focus point. During that time, a
spindle motor is kicked to maintain rotation at the fixed
speed. The servo LSI monitors FE signal & RFOK signal,
and operates focus-close automatically in appropriate
point. The focus-close is performed when following 3
conditions are set;
1A lens is moving from away to near toward a disc.
2RFOK= "H"
3Just at the moment when FZC signal is once over the
threshold of FZD register and latched to "H" again (the
edge of FDZ). As the result, FE converges "0" (=REFO).

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REFO
FD
Relative lens position
toward a disc
NEAR
FAR
Level of
"focusing time"
MD
REFO
Zoom-in of "focusing point"
REFO
RFI
FOK
FE FZD
threshold
level
FZD
(internal signal)
Usually, focus-close occurs at these points.
XSI
(focus is
closed)
Fig.6 Focus-close sequence
When the conditions described above are set and focus-
close is performed, XSI terminal becomes "H" -> "L" and
after 40ms, the microcomputer starts to monitor RFOK
signal through LPF.
When RFOK signal is detected as "L", the microcomputer
takes a various action such as protection.
Fig 11 shows a series of action concerning focus-close
(this figure shows a case when focus-close is impossible).
If pressing focus-close button in condition that a select of
focus mode is "display 01" in the test mode, it is possible
to check S curve, search voltage and actual lens
operation.

CX-31688
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The main equalizer of tracking servo is made up of digital
equalizer section. A block diagram of tracking servo is
showed in Fig 12.
2) Tracking servo system
a) Track jump
TE
AMP DIG. EQ
129
F
ETD TO-
TO+
IC302
BD7962FM
LENS
IC201 UPD63763AGJ,UPD63761AGJ
130
103
16
15
JUMP
PARAMETERS
DAC
CONTROL
A/D
t1
t2
GAIN NORMAL
TD
KICK
BRAKE
TEC
T. BRAKE
EQUALIZER
T. SERVO CLOSED
OPEN
NORMAL
GAIN UP
OFF
ON
Fig.7 Tracking servo block diagram
Fig.8 Single track jump
Fig.9-1 Multi-track jump
R214
10K
R312
C215
1500pF
8R2K
R314
18K
C301
220P
13
12
Track jump is performed automatically by the command of
the microcomputer according to the auto-sequence
function inside LSI. In this system, up to 100 tracks of
multi-jump is prepared for using as track jump at the
search time. In the test mode, 1, 4, 10, 32, 32 X 3 jump of
it and carriage move can be checked by mode selection.
For jumps up to 4 tracks, about half number of total jumps
(e.g., about 2 tracks are set for 4 tracks) are set by
microcomputer. The speed control (which counts the
length of TEC interval and controls TD so as to keep a
constant frequency) is conducted for any jump up to 5-100
tracks and a target number of total tracks is set by
microcomputer. The established number of tracks is
counted by using TEC signal.
From the moment when the set number is counted, brake
pulse is output for defined period of time, and a lens is
stopped. In this way, it is possible to close tracking and
continue normal play.
In addition, gain up of a tracking servo in the brake circuit
ON is performed for 50ms after stopping brake pulse in
order to increase lead-in of servo during track jump.
FF/REW operation in normal mode is carried out with
executing a single jump continuously. The speed is varied
according to place of destination and is about 10 or 20
times of normal mode.
TD
t1
t2
TEC
EQUALIZER
T.BRAKE
SERVO
50ms GAIN UP
NORMAL
ON
OFF
OPEN
CLOSED

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b) Brake circuit
TEC
TZC
(TEC becomes pulse)
(Internal signal)
MIRR
MIRR is latched
by the edge of
TZC pulse.
=
SWITCHING PULSE
EQUALIZER OUTPUT
(SWITCHED)
DRIVE DIRECTION
(NOTES) The phase of equalizer output is written as the same as TEC phase.
FORWARD
Lens moving forward
(from inner side to outer side) Lens moving backward
Time
REVERSE
Fig.10 Tracking brake circuit
Since lead-in of servo is weakened during set-up or track
jump, stable lead-in to servo loop is performed, using a
brake circuit. The brake circuit detects the direction of a
lens and outputs only the drive signal of the cross
direction toward its operation to slow the lens speed down
and performs stable lead-in to the tracking servo. In
addition, the direction for sliding a track is determined by
TEC signal, MIRR signal and its phase relation.
Fig.9-2 Multi-track jump(Speed control)
TD
TEC
EQUALIZER
T.BRAKE
SERVO
SD
50ms

CX-316810
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COM
COP
IC302
BD7962FM
CARRIAGE
MOTOR
19
20 M
R321
27K
R319
39K
C306
4R7P
33
32
3) Carriage servo system
DIG.
EQ SD
IC201 UPD63763AGJ,UPD63761AGJ
105
KICK, BRAKE
REGISTERS
DAC
CONTROL
FROM
TRACK. EQ
DRIVE ON/OFF THRESHOLD
Carriage is moved by these points.
TRACKING DRIVE
(LOW FREQUENCY)
LENS POSITION
CRG DRIVE
(INSIDE UPD63711GC)
CRG MOTOR VOLTAGE
Fig.11 Carriage servo block diagramFig 16: Carriage servo block diagram
Fig.12 Carriage signal waveform
The carriage servo is input the output from low frequency
number composite of tracking equalizer (position
information of lens) to carriage equalizer, and after
acquiring fixed gain, it outputs drive signal from LSI. The
signal is impressed to carriage motor via driver IC.
To be more precise, since it is necessary to move the
entire pick-up to forward direction when lens off-set during
playing reaches to certain level, the gain of equalizer is
set to generate higher voltage than start-up voltage of
carriage motor at that time. In addition, actual operation is
set to fix a certain threshold for equalizer output inside
servo LSI, and to output the drive voltage only when the
level of equalizer output is over that fixed level. In that
way, power consumption is reduced. Moreover, according
to decentering of a disc, the level of equalizer output
voltage may cross threshold level several times before the
entire pick-up starts to move. At that time, output
waveform of drive voltage from LSI is pulse state.

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4) Spindle servo system
DSP
BLOCK DIG. EQ
MD
A3
A1
IC301
BA6859AFP
SPINDLE
MOTOR
IC201 UPD63763AGJ,UPD63761AGJ
107 20
4
6
DAC
EFM
SIGNAL
M
SPEED ERROR SIGNAL
PHASE ERROR SIGNAL
R322
18K
27 26
R320
33K
C307
0.01µ
EC
IC302
BD7962FM ECR
SPCONT
FG
5A2
19
21
22
Fig.13 Spindle servo block diagram
There are following modes for spindle servo.
1Simple FG servo:
It is for maintaining the rotation of a disc to be in closer
condition of regular rotation.
The microcomputer monitors FG signal output pulse
according to the rotation of a spindle motor and controls
the drive voltage of the spindle motor.
This is used in following situation.
a) At set-up time, it is used during transition from power
ON with focus-close to rough servo.
b) It is used until recovering from out-of-focus during
playing.
2Adaptation servo:
It is CLV servo mode of normal operation.
It takes a sample of WFCK/16 at EFM demodulation
block to check whether frame synchronized signal and
internal frame counter output agree, then generates
signal showing "agree" or "disagree". When this signal
shows "disagree" 8 times continuously, it is considered
as asynchronous and otherwise, it is considered as
synchronous. This adaptation servo selects lead-in servo
in asynchronous, and regular servo in synchronous
automatically.
3Brake:
It is a mode for stopping a spindle motor. The
microcomputer monitors FG pulse and applies the brake
fully to certain interval (speed) and decreases the brake
level and stops it when the speed is under that.
4Stop:
It is a mode used at the time of POWER ON and eject.
Both ends of voltage of a spindle motor is 0V at this time.
5Rough servo:
It is a mode used at the time of carriage feed (carriage
move of long search, etc.).
It inputs which one of H level or L level to a spindle
equalizer after calculating line speed according to EFM
waveform.
Also this mode is to confirm the grating in test mode.

CX-316812
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1.3 AUTOMATIC ADJUSTMENT FUNCTION
In this system, all circuit adjustment is automatically
operated inside CD-LSI.
All adjustment is performed every time of inserting disc or
selecting CD mode by source key.
The contents about each automatic adjustment are in the
following;
1) FZD cancellation setting
It makes focus-closing performed certainly. FE offset level
at the time of POWER ON is read, and the reverse
voltage of offset value is written into CRAM inside IC, then
the offset is cancelled. In this way, FZD threshold level
can be set to fixed value (+240mV) and one of focus-close
conditions inside IC such as "FZD signal is latched to H" is
certainly carried out.
2) TE, FE, RF offset automatic adjustment
With this adjustment, TE, FE, RF amp offset of preamp at
the time of POWER ON are adjusted to each desired
value with REFO reference.
(The desired value: TE, FE, RF) = (0, 0, -1) [V])
Adjustment steps are;
(1) The microcomputer reads each offset during LDOFF
condition via servo LSI.
(2) The microcomputer calculates voltage to be corrected
from read value in step (1), and substitutes the
corrected value in the given place.
3) Tracking balance (T.BAL) automatic adjustment
With this adjustment, output difference between Ech
and Fch is equalized by changing gain of LSI internal
amp. Actually, TE waveform is adjusted to be vertical
symmetry to REFO.
Adjustment steps are;
(1) After focus-close,
(2) Kicking a lens toward radial direction to generate TE
waveform certainly.
(3) The microcomputer reads offset volume of TE signal
calculated inside LSI at that time via servo LSI.
(4) The microcomputer detects offset volume as which
one of 0, positive or negative.
If offset volume = 0, adjustment is finished.
If offset volume = positive or negative, change amp gain
of Ech or Fch according to certain rule.
Then, repeat step 2) - 4) until reaching "offset volume = 0"
or "limit number" and adjustment is finished.
4) FE bias automatic adjustment
With this adjustment, RFI level is maximized by making
focus point during playing optimal. Adjustment is
performed by utilizing phase difference between 3T level
waveform of RF waveform and disturbance input of focus
error. Since disturbance is input to focus loop, the
adjustment is performed at the same timing as automatic
gain control described later.
Adjustment steps are;
(1) Filling disturbance into focus loop by microcomputer
commands (internal servo LSI)
(2) Detecting jiggle of 3T components in RF signal inside
LSI.
(3) Processing relation between 3T components described
above and disturbance inside LSI to find misalignment
of focus and its direction.
(4) The microcomputer reads out the result found above
by a command from servo LSI.
(5) The microcomputer calculates the required correction
volume and substitutes the result into bias adjustment
items inside servo LSI.
In addition, a series of adjustment steps is repeated
several times (same as automatic gain control) to
increase adjustment accuracy.
5) Focus, tracking AGC
With this adjustment, servo loop gain of focus and tracking
is adjusted automatically.
Adjustment steps are;
(1) Filling disturbance into servo loop.
(2) Acquiring G1, G2 signal by extracting error signal at
the time of filling disturbance (FE, TE) via B.P.F.
(3) Reading signal of the microcomputer, G1 and G2 via
servo LSI.
(4) The microcomputer calculates the required correction
volume and performs loop gain adjustment inside servo
LSI.
In addition, a series of adjustment steps is repeated
several times to increase adjustment accuracy.

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6) RF level automatic adjustment (RFAGC)
+6dB play increases because of dirt of
lens, etc. (Set-up starts with TYP gain.) Time
Entire RFAMP GAIN
+ 12dB
+ 6dB
TYP
Playing with +12dB gain with CD-RW, etc.
Detecting that "lens is dirty"
and playing with +6dB from
the start
Fig.14 Conceptual diagram of gain of preamp stage
This adjustment is performed in order to adjust variation
of RF signal (RFO) level to fixed value and to realize
reliable signal transmission. The adjustment is performed
with changing amp gain between RFI and RFO.
Adjustment steps
(1) The microcomputer reads out output from RF level
detect circuit inside servo LSI by a command.
(2) The microcomputer calculates desired RFO level of
amp gain volume from read value.
(3) The microcomputer sends an appropriate command
to servo LSI to reach to the gain volume of (2).
This adjustment is performed at the following timing,
•During set-up, only focus-close is finished
•At the point of set-up completion (just before playing)
•During playing, after recovering from out-of-focus
7) Adjustment of gain of preamp stage
If there is lens dirt, or reflected light of a disc is notably
small during CD-RW replaying, gain of entire RFAMP(FE,
TE, RF amp) should be +6dB, +12dB according to the
situation.
Adjustment steps
When reflected light of a disc is notably small during set-
up, the entire RFAMP should be +6dB, +12dB. In
addition, when changing gain, perform again the set-up
procedure from the start. When it is considered that "the
entire gain of RFAMP is always played at +6dB", perform
the set-up at +6dB in advance from the next time.
See the figure below.

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8) Adjustment initial value
All adjustment is performed based on the latest
adjusted value that is considered as initial value
unless the power of the microcomputer is off (back
up is stopped). (There is an exception, though.) If
back up is stopped, automatic adjustment is done
by the initial value, not by the latest adjusted
value.
9) Coefficient indication of adjustment result
It is possible to display and check certain
automatic adjusted (FE, RF offset, FZD cancel,
FT, and RFAGC) in test mode.
Coefficient indication of each automatic
adjustment is showed below:
(1) FE, RF offset, FZD cancel
Reference value = 32 (Coefficient 32 means no
adjustment was required.)
Indication is every approx. 40mV.
Example: FZD cancel coefficient = 35
35-32=3X40mV=120mV
Since corrected volume is about +120mV, FE
offset before correction is -120mV.
(2) F.T gain adjustment
Reference value: focus, tracking = 20
Coefficient indication / reference value express
adjusted volume.
Example: AGC coefficient = 40
40 / 20 = 2 times (+ 6dB) adjustment was
performed. (It means "since it was originally 1/2
time of loop gain, the entire gain was doubled to
make it to the desired value.")
(3) RF level adjustment (RFAGC)
Reference value = 8
Coefficient = 9 - 15 ......Increasing RF level
(Increasing gain)
Coefficient = 7 - 0 ......Decreasing RF level
(Decreasing gain)
If a coefficient moves 1, 0.7 - 1dB of gain
changes accordingly.
Maximum gain = when a coefficient is 15, TYP
+6.5dB
Minimum gain = when a coefficient is 0, TYP -
6.0dB

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1.4 POWER SUPPLY SECTION
Control unit Mechanism
unit
VDCONT
VD(8V)
System side
IC301
VM
IC302
IC203
IC201 IC202
IC204 V1R5(1.5V)
P.U unit
PGND
SWDVDD(5V)
SWDVDD2(5V)
VD
Power supply
SVCONT
VD circuit
LED for
disc
detection
3+3ch
Driver SPDL Driver
Laser
Diode
CD Control
LSI(CD DSP)
V3R3(3.3V)
VDD circuit
System side
CD contorol
micro
computer
VDD
switching
Fig.15 Power supply section
3.3V Reg
1.5V Reg
3.3V Reg 3.3V
BVDD IC701 Control unit 3VDD
X-3116
SD-RAM
VDD
switching SPDL Driver
PGND
VD 8V: Power supply for mechanism servo. It supplies to driver directly and also generates 3.3V
and 1.5V (compression model) with a regulator in the unit.
VDD 5V: Power supply for microcomputer. If back up (+B) is connected, it is always supplied from
a product.
GND: There are 3 systems (servo system, digital system and reference GND of audio described
in the next section). They are divided in the core unit.

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1.5 STS CIRCUIT EXPLANATION
Sure Track System circuit pools music data read from CD, and when pick up is out of the track by some reasons, it
outputs data from memory during recovery and prevents sound break effectively.
Operation theory
STS circuit is controlled by uPD63761AGJ (IC201) having a built-in shockproof memory controller. Signal read from
CD with double rate is demodulated to data in CDLSI, and the built-in memory controller memorizes SDRAM audio
data, then reads out SDRAM data with single rate based on the output clock from C33M port of the LSI (33.86MHz)
as reference clock, and outputs DAC.
Since the writing speed is faster than the reading speed from SDRAM, the memory may overflow soon. However, if
it overflows, reading is stopped temporarily and to be in pause. Reading data from SDRAM continues and when
empty space is available, writing data is restarted. (Remaining RAM can be monitored by "RAM0, RAM1 and
RAM2" terminal.)
By repeating this process, SDRAM is always utilized effectively and data during 12 seconds (at the time of CD-DA)
can be stored. For example, pick up is out of the track because of vibration, sound break is avoided if recovery is
performed within 12 seconds by using memory.
Compact Disk CD LSI
(RF Amp./Servo DSP/
Signal Processor/
Audio DAC/LPF)
IC201
UPD63763AGJ,UPD63761AGJ
16M DRAM/IC202
MSM56V16160 F8TKFM
x2 Data Read
Double Rate
Single Rate
x1 Playback
3.3V system
V3R3
Analog Audio
DAC+LPF

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1.6 MECHANISM CONTROL
- Overview
At the time of loading E/L+<E/L- ; (E/LFWD; L, E/LREV; H)
At the time of ejecting E/L+>E/L- ; (E/LFWD; H, E/LREV; L)
Drive voltage (E/LVOL1=Hi-Z, E/LVOL2=Hi-Z) ; 8V
Drive voltage (E/LVOL1=L, E/LVOL2=Hi-Z) ; 7V
Drive voltage (E/LVOL1=Hi-Z, E/LVOL2=L) ; 4.4V
IC701
E/LVOL1 E/LVOL2
SWDVDD2
LOADPHT
LOADSWL
LOADSWR E/LFWD
E/L+
E/L
MOTOR
E/L-
E/LREV
IN/SW
MECHANISM
CONTROLLER
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IC302
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DRIVER
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The combination of load/eject operation, camgear motor
(operation mode) operation, elevation operation and
clamp operation enables the operation as changer
mechanism module.
1) Loading system
Disc position is detected with 3 switches attached to mechanism unit, photo,
and LED, and load/eject is performed by driving an E/L motor. *E/L is
abbreviation of Elevation/Loading. (G3 mechanism shares a motor, unlike G2
mechanism.)
1.1) Detect system
The 3 switches, photo and LED operate load start/load end, disc form detection
and watching disc eject.
1.2) Drive system
Controlling an E/L motor by the control unit enables the following function:
Loading of disc
Ejecting of disc
a) Drive system
It controls drive direction by output E/LFWD, E/LREV from
the microcomputer (IC701), and 3 values of drive voltage
by Hi-Z/L of ELVVOL1,ELVVOL2.

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b) Drive sequence
At the time of loading:
1One of LOADPHT, LOADSWR, LOADSWL starts driving with H. 2All of LOADPHT, LOADSWR, LOADSWL detect
H at the same time. 3Detecting H of INISW. 4Detecting L of LOADSWR. 5Detecting L of LOADSWL and stopping
E/L motor.
LOADPHT
LOADSWR
LOADSWL
INISW
1
1
15
3
4
At the time of ejecting:
1Starting driving H of LOADSWR. 2Detecting L of INISW.
3Detecting L of LOADSWL and after reverse brake (16ms), stopping E/L monitor.
2) Elevation system
2.1) Detect system
It uses a linear position sensor (VR1), converts stage chassis level to voltage value and captures it by a microcomputer
A/D to detect absolute position.
Detect circuit
2.2) Drive system
Controlling an E/L motor by the control unit enables the following function.
Elevation function
SWDVDD
VR11
ELVREF
GND
ELVSNS
Linear position sensor
VR1
2
LOADPHT
LOADSWR
LOADSWL
INISW
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2

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a) Drive circuit
b)Drive sequence
1 Driving continuously to the position of brake start.
2 Detecting of passing the position of brake start and starting short brake.
3 Starting of driving pulse to reach OK range. After confirmation of entering OK range, it is completed.
Driving upper direction E/L+>E/L- , (E/LFWD; H, E/LREV; L)
Driving lower direction E/L+<E/L- , (E/LFWD; L, E/LREV; H)
Drive voltage CAMVOL=Hi-Z, 8VCAMVOL=L, 7V
CAMVOL=L, 7V
IC701
E/LVOL1 E/LVOL2
SWDVDD2
LOADPHT
LOADSWL
LOADSWR E/LFWD
E/L+
E/L
MOTOR
E/L-
E/LREV
IN/SW
MECHANISM
CONTROLLER
91
58
57
43
31
730
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IC302
3+3ch
DRIVER
4
5
2
8
3
t controls drive direction by output E/LFWD, E/LREV from
the microcomputer (IC701), and 3 values of drive voltage
by Hi-Z/L of ELVVOL1,ELVVOL2.

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2)Camgear motor system
2.1) Detect system
Detect circuit
2.2) Drive system
SWDVDD
VR21
CAMREF
GND
CAMSNS
Rotary position sensor
VR2
It uses a rotary position sensor (VR2), converts a
camgear rotation angle to voltage value and captures
it by a microcomputer A/D to detect absolute position.
Controlling a cam gear motor by the control unit
enables the following function:
Open/close of shutter
Open /close of tray tab
Division of tray
Rotation operation of CRG chassis
(moving to the play position)
Release of mechanism lock
Drive of eject arm