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Portwell ROBO-603 User manual

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Introduction
ROBO-603 User’s Manual 1-1
1. Introduction
1.1 System Overview
The ROBO-603 is a compact 5.25” CD-ROM size Single Board Computer that equips with VIA
Apollo Pro 133A AGPset, SMI AGP 2X Lynx3DM 2D/3D Graphics and Multimedia Accelerator
w/ Embedded 4MB SGRAM, Dual LCD interfaces, NTSC/PAL TV output, AC97 Audio, and dual
PCI-bus Ethernet interfaces.
Targeting on the rapid growing networking and multimedia embedded markets, the ROBO-603
comes designed with dual PCI-bus Intel 82559ER 10/100Base-Tx chips and dual LCD interfaces.
This make it a perfect solution for not only popular Networking Devices like Firewall, Gateway,
Router, Thin Server, and E-Box but also Retail / Financial Transaction Terminals, and high-end
multimedia POS / KIOSK Terminals.
In addition, the on board 24-bit Panel Link interface, Zoom Video port, and NTSC/PAL TV output
interface make the ROBO-603 also ideal for demanding high-end Entertainment Devices that
require high integration multimedia Single Board Computer.
Other impressive features include PC133 FSB, Ultra DMA66 IDE, a Compact Flash socket for type
I/II Compact Flash storage card, four serial ports, one parallel port, one 168-pin DIMM socket
allowing for up to 256MB of SDRAM to be installed, and a PCI slot for future expansion.
1.2 Check List
 1 ROBO-603 All-in-One FC370 Celeron / Pentium III Computing Module
 1 Quick Installation Guide
 1 CD-ROM contains the followings:
— User’s Manual (this manual in PDF file)
— Ethernet driver and utilities
— VGA drivers and utilities
— Audio drivers and utilities
Latest BIOS (as of the CD-ROM was made)
Introduction
ROBO-603 User’s Manual 1-2
1.3 System Specifications
General Functions
•
••
•CPU: Intel FC-370 Pentium III/Celeron (with system bus frequencies of 66/100/133MHz)
•
••
•CPU socket: Intel Socket 370
•
••
•BIOS: Award 256KB Flash BIOS
•
••
•Chipset: VIA Apollo Pro 133A, VT82C694X
•
••
•I/O Chipset: VT82C686A / Winbond W83977EF-AW
•
••
•Memory: Onboard one 168-pin DIMM socket supports up to 256 Mbytes SDRAM
•
••
•Enhanced IDE: Supports two IDE devices. Supports Ultra DMA/66 mode with data transfer
rate up to 66MB/sec. (20 x 2 header onboard)
•
••
•FDD interface: Supports up to two floppy disk drives, 5.25" (360KB and 1.2MB) and/or 3.5"
(720KB, 1.44MB and 2.88MB)
•
••
•Parallel port: One bi-directional parallel port. Supports SPP, ECP, and EPP modes
•
••
•
Serial port: Three RS-232 and one RS-232/422/485 serial port. Ports can be configured as COM1,
COM2, COM3, COM4, or disabled individually. (16C550 equivalent)
•
••
•IR interface: Supports one IrDA Tx/Rx header
•
••
•KB/Mouse connector: 8-pin (4 x 2) connector supports PS/2 keyboard and mouse
•
••
•USB connectors: One 5 x 2 header onboard supports dual USB ports
•
••
•Watchdog Timer: Can generate a system reset, IRQ15 or NMI. Software selectable time out
interval (32 sec. ~ 254 min., 1 min./step)
•
••
•DMA: 7 DMA channels (8237 equivalent)
•
••
•Interrupt: 15 interrupt levels (8259 equivalent)
Introduction
ROBO-603 User’s Manual 1-3
•
••
•Power management: Supports ATX power supply. Supports PC97, LAN wake up and modem
ring-in functions. I/O peripheral devices support power saving and doze/standby/suspend modes.
APM 1.2 compliant.
Flat Panel/CRT Interface
•
••
•Chipset: SMI Lynx3DM SM721, high performance 128-bit GUI, 3D engine
•
••
•Display memory: 4 MB of SGRAM frame buffer on Lynx3DM SM721G4. Optional 8 MB
SGRAM frame buffer on Lynx3DM SM721G8
•
••
•Display type: Simultaneously supports CRT and flat panel (EL, LCD and gas plasma) displays
•
••
•Interface: 2X AGP, Accelerator Graphics Ports 1.0 compliant
•
••
•Display mode:
LCD panel supports up to 800 x 600 @ 24 bpp, 1024 x 768 @ 24 bpp
CRT displays support up to 800 x 600 @ 24 bpp, 1024 x 768 @ 24 bpp
•
••
•Video capture port: 40-pin YUV Direct Video Input Port onboard
•
••
•TV output interface: Supports both RCA jack and S terminal
Panel Link (Optional)
•
••
•Chipset: Sil 164 PanelLink Digital Transmitter
•
••
•Scalable bandwidth: Ranging from 25 ~ 112 MHz (VGA ~ SXGA); 24/48-bit one/two pixel per
clock
Audio Interface
•
••
•Chipset: VT82C686A
•
••
•Audio controller: AC97 ver. 2.0 compliant interface, Multi-stream Direct Sound and Direct
Sound 3D acceleration
•
••
•Audio interface: Microphone in, Line in, CD audio in, line out, Speaker L, Speaker R
Introduction
ROBO-603 User’s Manual 1-4
Ethernet Interface
•
••
•Chipset: Dual Intel 82559ER PCI-bus Ethernet controllers onboard
•
••
•Ethernet interface: PCI 100/10 Mbps, IEEE 802.3U compatible
•
••
•Remote Boot-ROM: For diskless system
SSD Interface
One CF socket supports Type I/II Compact Flash Card
Expansion Interface
•
••
•
PC/104 connector: One 16-bit 104-pin connector onboard
•
••
•
PCI slot: One 32-bit PCI slot onboard
Mechanical and Environmental
•
••
•
Power supply voltage: ATX type, +5V and +12V
•Typical power requirement: 5V @ 5.2A, 12V @ 80mA w/ PIII 800MHz & 128MB SDRAM
•
••
•
Operating temperature: 32 to 140°F (0 to 60°C)
•
••
•
Board size: 8”(L) x 5.75”(W) (203mm x 146mm)
•
••
•
Weight: 0.5 Kg
Introduction
ROBO-603 User’s Manual 1-5
1.4 Architecture Overview
The following block diagram shows the architecture and main components of ROBO-603.
The two key components on board are the VIA VT82C694X North Bridge and VT82C686A super
South Bridge. These two devices provide the ISA and PCI bus to which all the major components
are attached.
The following sections provide detail information about the functions provided onboard.
Introduction
ROBO-603 User’s Manual 1-6
1.4.1 VIA VT82C694X
The VIA VT82C694X along with the VT82C686A companion chip provide the basic functionality
and buses of the system:
 High Performance CPU interface.
 Full Featured Accelerated Graphics Port (AGP) controller.
 Advanced High-Performance DRAM controller. PC133 compliant SDRAM must be used if
133MHz FSB CPU is to be used.
 Concurrent PCI Bus controller.
 PCI to ISA Bridge provided by VT82C686A super south bridge.
 Universal Serial Bus controller integrated in the VT82C686A.
 UltraDMA-33 / 66 Master Mode PCI EIDE controller. Two connectors are provided: A 40 pin
pitch 2.54mm standard IDE interface on the primary controller and a Compact Flash connector
on the secondary controller.
 SoundBlaster Pro hardware and Direct Sound ready AC97 Digital Audio controller.
1.4.2 DRAM Interface
The VT82C694X supports eight banks of DRAMs up to 1.5GB. The DRAM controller supports
standard Fast Page Mode (FPM) DRAM, EDO-DRAM, Synchronous DRAM (SDRAM) and
Virtual Channel SDRAM (VC SDRAM), in a flexible mix / match manner. The Synchronous
DRAM interface allows zero wait state bursting between the DRAM and the data buffers at
66/100/133 MHz. The eight banks of DRAM can be composed of an arbitrary mixture of 1M / 2M /
4M / 8M / 16M / 32MxN DRAMs. The DRAM controller also supports optional ECC (single-bit
error correction and multi-bit detection) or EC (error checking) capability separately selectable on a
bank-by-bank basis. The DRAM controller can run at either the host CPU bus frequency (66 /100
/133MHz) or at the AGP bus frequency (66 MHz) with built-in PLL timing control.
Introduction
ROBO-603 User’s Manual 1-7
1.4.3 AGP Interface
The VT82C694X system controller also supports full AGP v2.0 capability for maximum bus
utilization including 2x and 4x mode transfers, SBA (SideBand Addressing), Flush/Fence
commands, and pipelined grants. An eight level request queue plus a four level post-write request
queue with thirty-two and sixteen quadwords of read and write data FIFO's respectively are
included for deep pipelined and split AGP transactions. A single-level GART TLB with 16 full
associative entries and flexible CPU / AGP / PCI remapping control is also provided for operation
under protected mode operating environments. Both Windows-95 VXD and Windows-98 / NT5
miniport drivers are supported for interoperability with major AGP-based 3D and DVD-capable
multimedia accelerators.
1.4.4 PCI Interface
The VT82C694X supports two 32-bit 3.3 / 5V system buses (one AGP and one PCI) that are
synchronous / pseudo-synchronous to the CPU bus. The chip also contains a built-in bus-to-bus
bridge to allow simultaneous concurrent operations on each bus. Five levels (doublewords) of post
write buffers are included to allow for concurrent CPU and PCI operation. For PCI master operation,
forty-eight levels (doublewords) of post write buffers and sixteen levels (doublewords) of prefetch
buffers are included for concurrent PCI bus and DRAM/cache accesses. The chip also supports
enhanced PCI bus commands such as Memory-Read-Line, Memory-Read-Multiple and
Memory-Write-Invalid commands to minimize snoop overhead. In addition, advanced features are
supported such as snoop ahead, snoop filtering, L1 write-back forward to PCI master, and L1
write-back merged with PCI post write buffers to minimize PCI master read latency and DRAM
utilization. Delay transaction and read caching mechanisms are also implemented for further
improvement of overall system performance.
Introduction
ROBO-603 User’s Manual 1-8
1.4.5 VIA VT82C686A
The VT82C686A PSIPC (PCI Super-I/O Integrated Peripheral Controller) is a high integration,
high performance, power-efficient, and high compatibility device that supports Intel and non-Intel
based processor to PCI bus bridge functionality to make a complete Microsoft PC99-compliant
PCI/ISA system. In addition to complete ISA extension bus functionality, the VT82C686A includes
standard intelligent peripheral controllers:

Two 16550-compatible serial I/O ports with infrared communications port option on the
second port.

LPT. Support for SPP, EPP and ECP modes.

Standard floppy disk drive interface.

Keyboard controller with PS2 mouse support.

Real Time Clock with 256 byte extended CMOS. In addition to the standard ISA RTC
functionality, the integrated RTC also includes the date alarm, century field, and other
enhancements for compatibility with the ACPI standard.

Notebook-class power management functionality compliant with ACPI and legacy APM
requirements. Multiple sleep states (power-on suspend, suspend-to-DRAM, and
suspend-to-Disk) are supported with hardware automatic wake-up. Additional
functionality includes event monitoring, CPU clock throttling and stop (Intel processor
protocol), PCI bus clock stop control, modular power, clock and leakage control,
hardware-based and software-based event handling, general purpose I/O, chip select and
external SMI.

Full System Management Bus (SMBus) interface.

Integrated PCI-mastering dual full-duplex direct-sound AC97-link-compatible sound system.
Hardware soundblaster-pro and hardware-assisted FM blocks are included for Windows
DOS box and real-mode DOS compatibility. Loopback capability is also implemented for
directing mixed audio streams into USB and 1394 speakers for high quality digital audio.

Plug and Play controller that allows complete steerability of all PCI interrupts and internal
interrupts / DMA channels to any interrupt channel. One additional steerable interrupt
channel is provided to allow plug and play and reconfigurability of on-board peripherals
for Windows family compliance.

Internal I/O APIC (Advanced Programmable Interrupt Controller).
Introduction
ROBO-603 User’s Manual 1-9
1.4.6 IDE Interface (Bus Master Capability and Synchronous DMA Mode)
Master mode enhanced IDE controller with dual channel DMA engine and interlaced dual channel
commands. Dedicated FIFO coupled with scatter and gather master mode operation allows high
performance transfers between PCI and IDE devices. In addition to standard PIO and DMA mode
operation, the VT82C686A also supports the UltraDMA-33 standard to allow reliable data transfer
rates up to 33MB/sec throughput. The VT82C686A also supports the UltraDMA-66 standard. The
IDE controller is SFF-8038i v1.0 and Microsoft Windows-family compliant.
Access to these controllers is provided by one standard IDC 40-pin connector and one Compact
Flash type II connector.
1.4.7 USB
The Universal Serial Bus controller is USB v1.1 and Universal HCI v1.1 compliant. The
VT82C686A includes the root hub with four function ports with integrated physical layer
transceivers. The USB controller allows hot plug and play and isochronous peripherals to be
inserted into the system with universal driver support. The controller also implements legacy
keyboard and mouse support so that legacy software can run transparently in a non-USB-aware
operating system environment.
Introduction
ROBO-603 User’s Manual 1-10
1.4.8 SMI Lynx3DM SM721 VGA Controller
The Lynx3DM consists of a logic block, which interfaces to a 4MB or 8MB block of integrated
memory. The integrated memory supports single clock cycle transfers up to 100MHz. Peak memory
bandwidth for the integrated 128-bit memory bus is over 1.6GB/s.
The logic within the Lynx3DM consists of 11 functional blocks: PCI Interface, Host Interface (HIF),
Memory Controller, Drawing Engine, Power Down Control Unit, Video Processor, Video Capture
Module, LCD Backend Controller, VGA Core, PLL Module, and RAMDAC. A summary of each
of the functional blocks, along with important features follows:
 AGP 2X sideband support
 PCI 2.1 compliant
 33 MHz PCI Master/Slave interface
 Dual aperture feature for concurrent VGA and video/drawing engine access
 Independent memory interface control
 Up to 128-bit memory interface
 Over 1.6GB/s memory bandwidth
 100MHz single clock/cycle engine
 Designed to accelerate DirectDraw and Direct3D
 IEEE Floating Point Setup Engine
 Complete 3D Rendering Engine set:
- Bi-linear and tri-linear filtering
- Mip Mapping
- Vertex and global fog
- Source and destination alpha blend
- Specular highlights
- Edge anti-aliasing
- Z-buffering
- Gouraud shading
- Mirrored textures
-Texture decompression
 Offloads motion compensation portion of MPEG-2 decode process from CPU