QMTECH XC7A100T User manual
QMTECH XC7A100T Starter Kit User Manual V01
QMTECH XC7A100T STARTER KIT
USER MANUAL(CORE BOARD)
Preface
The QMTech®XC7A100T core board uses Xilinx Artix®-7 devices to demonstrate the highest performance-
per-watt fabric, transceiver line rates, DSP processing, and AMS integration in a cost-optimized FPGA.
Featuring the MicroBlaze™ soft processor and 1,066Mb/s DDR3 support, the family is the best value for a
variety of cost and power-sensitive applications including software-definedradio, machine vision cameras,
and low-end wireless backhaul.
For more information, updates and useful links, please visit QMTECH OfficialWebsite:
http://www.chinaqmtech.com
QMTECH XC7A100T Starter Kit User Manual V01
Table of Contents
1. INTRODUCTION........................................................................3
1.1 DOCUMENT SCOPE................................................................................3
1.2 KIT OVERVIEW......................................................................................3
2. GETTING STARTED ....................................................................4
2.1 INSTALL DEVELOPMENT TOOLS..............................................................5
2.2 QMTECH XC7A100T STARTER KIT HARDWARE DESIGN......................6
2.2.1 FPGA Power Supply ............................................................6
2.2.2 SPI Flash Boot......................................................................7
2.2.3 System Clock........................................................................8
2.2.4 User Extension IOs..............................................................8
2.2.1 3.3V Power Supply..............................................................9
2.2.2 JTAG Port .............................................................................9
2.2.3 User LEDs ...........................................................................10
2.2.4 User Keys............................................................................10
2.2.5 DDR3 Memory...................................................................11
3. REFERENCE............................................................................12
4. REVISION ..............................................................................13
QMTECH XC7A100T Starter Kit User Manual V01
1. Introduction
1.1 Document Scope
This demo user manual introduces the QMTECH XC7A100T core board and describes howto setup the
core board running with applicationsoftware Xilinx Vivado 2018.3. Users may employee the on board rich
logic resource FPGA XC7A100T-2FGG676I and large DDR3 memory MT41K128M16 to implement
various applications. The core board also has 108 non-multiplexed FPGA IOs forextending customized
modules, such as UART module, CMOS/CCD camera module, LCD/HDMI/VGA display moduleetc.
1.2 Kit Overview
Below section lists the parameters of the QMTECH XC7A100T core board:
➢On-Board FPGA: XC7A100T-2FGG676I;
➢On-Board FPGA external crystal frequency: 50MHz;
➢XC7A100T-2FGG676I has rich block RAM resource up to 4,860Kb;
➢XC7A100T-2FGG676I has 101,440 logic cells;
➢On-Board MT25QL128 SPI Flash, 16M bytes for user configuration code;
➢On-Board 256MB Micron DDR3, MT41K128M16JT-125:K;
➢On-Board 3.3V power supply for FPGA by using MP2315 wide input range DC/DC;
➢XC7A100T core board has two 64p, 2.54mm pitch headers for extending user IOs. All IOs are
precisely designed with length matching;
➢XC7A100T core board has 2 user switches;
➢XC7A100T core board has 3 user LEDs;
➢XC7A100T core board has JTAG interface, by using 6p, 2.54mm pitch header;
➢XC7A100T core board PCB size is: 6.7cm x 8.4cm;
➢Default power source for board is: 2A@5V DC, the DC header type: DC-050, 5.5mmx2.1mm;
Figure 1-1. QMTECH XC7A100T Core Board Overview
QMTECH XC7A100T Starter Kit User Manual V01
2. Getting Started
The QMTECH XCA100T core board includes below item:
Figure 2-1. QMTECH XC7A100T Top View
Below image shows the dimension of the QMTECH XC7A100T core board: 6.71cm x 8.41cm. The unit in
below image is millimeter(mm).
Figure 2-2. QMTECH XC7A100T Core Board Dimension
QMTECH XC7A100T Starter Kit User Manual V01
2.1 Install Development Tools
The QMTECH XC7A100Tcore board tool chain consists of Xilinx Vivado 2018.3, Xilinx USBplatform cable,
XC7A100T core board and 5V DCpower supply. Belowimage shows the Xilinx Vivado 2018.3 development
environment which could be downloaded from Xilinx office website:
Figure 2-3. Vivado 2018.3
Below image shows the JTAG connection between XilinxUSB platform cable and XC7A100Tcore board:
Figure 2-4. JTAG Connection and Power Supply
VREF (Red)
GND (Black)
TCK (Yellow)
TDO (White)
TDI (Purple)
TMS (Green)
5V DC
QMTECH XC7A100T Starter Kit User Manual V01
2.2 QMTECH XC7A100T Starter Kit Hardware Design
2.2.1 FPGA Power Supply
The coreboard needs5V DC input as power supply which could be directly injected from power header or the
64P female header U2/U4. Users may refer to the hardware schematic for the detailed design. The on board
LED D4 indicates the 3.3V supply,it will be turned on when the 5V power supply is active. In default status, all
the FPGA banks IO power level is 3.3V because bank power supply is 3.3V.However, BANK34 and BANK35
IO’s power level could be changed according to detailed custom requirement. There’re two 0 ohm resisters
could be removed: R26/R27, and instead the BANK34 and BANK35’s power supply could be injected from 64P
female header U8. Detailed design refers to hardware schematic.
Note: FPGA core supply 1.0Vis regulatedby Monolithic PowerSystems, Inc. (MPS) DC/DCchip MP2143
which could output maximum 3A current.
Figure 2-5. Power Supply for the FPGA
1V0
1V8
1V0
XC7A100T-FGG676
U1M
NC_1 AA15
NC_2 AA17
NC_3 AA18
NC_4 AA19
NC_5 AA2
NC_6 AA20
NC_7 AA3
NC_8 AA4
NC_9 AA5
NC_10 AA7
NC_11 AA8
NC_12 AB1
NC_13 AB16
NC_14 AB17
NC_15 AB19
NC_16 AB2
NC_17 AB20
NC_18 AB21
NC_19 AB22
NC_20 AB4
NC_21 AB5
NC_22 AB6
NC_23 AC1
NC_24 AC16
NC_25 AC17
NC_26 AC18
NC_27 AC19
NC_28 AC2
NC_29 AC21
NC_30 AC22
NC_31 AC23
NC_32 AC3
NC_33 AC4
NC_34 AC6
NC_35 AD1
NC_36 AD17
NC_37 AD18
NC_38 AD19
NC_39 AD20
NC_40 AD21
NC_41 AD23
NC_42 AD24
NC_43 AD25
NC_44 AD26
NC_45 AD3
NC_46 AD4
NC_47 AD5
NC_48 AE1
NC_49 AE17
NC_50 AE18
NC_51 AE2
NC_52 AE20
NC_53 AE21
NC_54 AE22
NC_55 AE23
NC_56 AE25
NC_57 AE26
NC_58 AE3
NC_59 AE5
NC_60 AF17
NC_61 AF18
NC_62 AF19
NC_63 AF2
NC_64 AF20
NC_65 AF22
NC_66 AF23
NC_67 AF24
NC_68 AF25
NC_69 AF3
NC_70 AF4
NC_71 AF5
NC_72 U7
NC_73 V1
NC_74 V2
NC_75 V3
NC_76 V4
NC_77 V6
NC_78 V7
NC_79 V8
NC_80 V9
NC_81 W1
NC_82 W14
NC_83 W15
NC_84 W16
NC_85 W3
NC_86 W4
NC_87 W5
NC_88 W6
NC_89 W8
NC_90 Y1
NC_91 Y15
NC_92 Y16
NC_93 Y17
NC_94 Y18
NC_95 Y2
NC_96 Y3
NC_97 Y5
NC_98 Y6
NC_99 Y7
NC_100 Y8
XC7A100T-FGG676
U1L
VCCO_0_1 Y14
VCCO_0_2 W11
VCCO_12_1 AA21
VCCO_12_2 AB18
VCCO_12_3 AD22
VCCO_12_4 AE19
VCCO_12_5 AF26
VCCO_12_6 W17
VCCO_13_1 AC25
VCCO_13_2 T16
VCCO_13_3 T26
VCCO_13_4 U23
VCCO_13_5 V20
VCCO_13_6 Y24
VCCO_14_1 K24
VCCO_14_2 L21
VCCO_14_3 N15
VCCO_14_4 N25
VCCO_14_5 P22
VCCO_14_6 R19
VCCO_15_1 F26
VCCO_15_2 G23
VCCO_15_3 H20
VCCO_15_4 J17
VCCO_15_5 K14
VCCO_15_6 M18
VCCO_16_1 A21
VCCO_16_2 B18
VCCO_16_3 C25
VCCO_16_4 D22
VCCO_16_5 E19
VCCO_16_6 F16
VCCO_33_1 AA1
VCCO_33_2 AC5
VCCO_33_3 AD2
VCCO_33_4 U3
VCCO_33_5 W7
VCCO_33_6 Y4
VCCO_34_1 K4
VCCO_34_2 L1
VCCO_34_3 M8
VCCO_34_4 N5
VCCO_34_5 P2
VCCO_34_6 T6
VCCO_35_1 A1
VCCO_35_2 C5
VCCO_35_3 D2
VCCO_35_4 F6
VCCO_35_5 G3
VCCO_35_6 J7
XC7A100T-FGG676
U1J
GND_1 AE15
GND_2 B15
GND_3 A10
GND_4 A12
GND_5 A14
GND_6 A16
GND_7 A26
GND_8 A6
GND_9 A8
GND_10 AA14
GND_11 AA16
GND_12 AA26
GND_13 AA6
GND_14 AB10
GND_15 AB12
GND_16 AB14
GND_17 AB23
GND_18 AB3
GND_19 AA9
GND_20 AB8
GND_21 AC15
GND_22 AC20
GND_23 AC7
GND_24 AD11
GND_25 AD13
GND_26 AD6
GND_27 AD9
GND_28 AD16
GND_29 AE24
GND_30 AE4
GND_31 AE6
GND_32 AF1
GND_33 AF10
GND_34 AF12
GND_35 AF14
GND_36 AF16
GND_37 AF21
GND_38 AF6
GND_39 AF8
GND_40 B16
GND_41 B23
GND_42 B3
GND_43 B6
GND_44 C11
GND_45 C13
GND_46 C16
GND_47 C20
GND_48 C6
GND_49 C9
GND_50 D15
GND_51 D17
GND_52 D7
GND_53 E10
GND_54 E12
GND_55 E14
GND_56 E24
GND_57 E4
GND_58 E7
GND_59 E8
GND_60 E9
GND_61 F1
GND_62 F14
GND_63 F21
GND_64 F9
GND_65 G10
GND_66 G11
GND_67 AB9
GND_68 G13
GND_69 Y12
GND_70 G18
GND_71 G12
GND_72 H25
GND_73 H5
GND_74 J12
GND_75 J2
GND_76 J22
GND_77 K11
GND_78 K13
GND_79 K19
GND_80 K9
GND_81 L10
GND_82 L12
GND_83 L16
GND_84 L26
GND_85 L6
GND_86 M13
GND_87 M23
GND_88 M3
GND_89 M9
GND_90 N10
GND_91 N20
GND_92 P13
GND_93 P17
GND_94 P7
GND_95 P9
GND_96 R10
GND_97 R24
GND_98 R4
GND_99 T1
GND_100 T11
GND_101 T13
GND_102 T21
GND_103 T9
GND_104 U10
GND_105 U12
GND_106 U18
GND_107 U8
GND_108 V15
GND_109 V25
GND_110 V5
GND_111 E15
GND_112 W12
GND_113 W2
GND_114 W22
GND_115 Y11
GND_116 Y10
GND_117 Y13
GND_118 Y19
GND_119 V13
XC7A100T-FGG676
U1G
MGTPTXP3_213 AE7
MGTPTXN3_213 AF7
MGTPTXP2_213 AC8
MGTPTXN2_213 AD8
MGTPTXP1_213 AE9
MGTPTXP0_213 AC10
MGTPRXP3_213 AE11
MGTPRXP0_213 AC12
MGTPRXP1_213 AE13
MGTPRXP2_213 AC14
MGTREFCLK0N_213 AB13
MGTREFCLK0P_213 AA13
MGTPTXN1_213 AF9
MGTPTXN0_213 AD10
MGTPRXN3_213 AF11
MGTPRXN0_213 AD12
MGTPRXN1_213 AF13
MGTPRXN2_213 AD14
MGTREFCLK1P_213 AA11
MGTREFCLK1N_213 AB11
MGTRREF_213 AF15
XC7A100T-FGG676
U1H
MGTPTXP2_216 B9
MGTPTXP3_216 D10
MGTPRXP0_216 B11
MGTPRXP3_216 D12
MGTPRXP2_216 B13
MGTPRXP1_216 D14
MGTREFCLK0P_216 F11
MGTREFCLK0N_216 E11
MGTRREF_216 A15
MGTPTXN2_216 A9
MGTPTXN3_216 C10
MGTPRXN0_216 A11
MGTPRXN3_216 C12
MGTPRXN2_216 A13
MGTPRXN1_216 C14
MGTREFCLK1N_216 E13
MGTREFCLK1P_216 F13
MGTPTXP1_216 D8
MGTPTXN1_216 C8
MGTPTXP0_216 B7
MGTPTXN0_216 A7
XC7A100T-FGG676
U1I
MGTAVCC_G11_1 D11
MGTAVCC_G11_2 D13
MGTAVCC_G11_3 D9
MGTAVCC_G11_4 F10
MGTAVCC_G11_5 F12
MGTAVCC_G10_1 AA10
MGTAVCC_G10_2 AA12
MGTAVCC_G10_3 AC11
MGTAVCC_G10_4 AC13
MGTAVCC_G10_5 AC9
MGTAVTT_G11_1 B10
MGTAVTT_G11_2 B12
MGTAVTT_G11_3 B14
MGTAVTT_G11_4 B8
MGTAVTT_G11_5 C15
MGTAVTT_G11_6 C7
MGTAVTT_G10_1 AD15
MGTAVTT_G10_2 AD7
MGTAVTT_G10_3 AE10
MGTAVTT_G10_4 AE12
MGTAVTT_G10_5 AE14
MGTAVTT_G10_6 AE8
XC7A100T-FGG676
U1K
VCCINT_1 J11
VCCINT_2 J13
VCCINT_3 K10
VCCINT_4 K12
VCCINT_5 L11
VCCINT_6 L13
VCCINT_7 M10
VCCINT_8 P10
VCCINT_9 T10
VCCINT_10 T12
VCCINT_11 U11
VCCINT_12 V10
VCCINT_13 V12
VCCAUX_1 L9
VCCAUX_2 N9
VCCAUX_3 R9
VCCAUX_4 U9
VCCAUX_5 J9
VCCBRAM_1 N13
VCCBRAM_2 R13
VCCBRAM_3 U13
VCCBRAM_4 W13
3V3
3V3
1V35
VCCO_34_35
QMTECH XC7A100T Starter Kit User Manual V01
2.2.2 SPI Flash Boot
In default, the FPGA XC7A100Tboots from external SPIFlash,detailed hardware design is shown in below
figure. The SPIflash is using MT25QL128 manufactured byMicron, with 128Mbit memorystorage.
Figure 2-6. SPI Flash
The FPGA boot sequence setting M0:M1:M2 is configured as 1:0:0which indicates FPGAwill boot fromSPI
Flash after power on.
Figure 2-7. M0:M1:M2 Hardware Settings
The LED D1 will be turned on after the FPGA successfully loading configuration file fromSPI Flash during
power on stage. In this case,LED D1 could be used as FPGA loading status indicator.
Figure 2-8. FPGA_DONE Status Indicator
FPGA_DQ0
FPGA_DQ2
FPGA_DQ1 FPGA_DQ3
FPGA_CCLK
U3
MT25QL128ABA1ESE
nCE
1
SIO3 7
SO/SIO1
2
VSS
4SI/SIO0 5
SCK 6
SIO2
3
VDD 8
C1
100nF
3V3
R34.7K
3V3
FPGA_CSO_B
R44.7K
R24.7K
TDO
TDI
TCK
TMS
3V3
1V8
FPGA_DONE
PROG_B
R9 4.7K 3V3
3V3
FPGA_CCLK
XC7A100T-FGG676
U1A
DONE_0 W10
TCK_0
H12
VCCBATT_0
G14
VN_0 P11
VREFP_0 P12
GNDADC_0
M11
VCCADC_0
M12
DXP_0
R12
CCLK_0 H13
VP_0 N12
VREFN_0 N11
DXN_0
R11
TDO_0
J10
TDI_0
H10
INIT_B_0 V11
M1_0
Y9
M0_0
AB7
TMS_0
H11
PROGRAM_B_0 AE16
CFGBVS_0 AB15
M2_0
W9
R1
1K
D1
Red
1
2
3V3
R5
1K
FPGA_DONE
QMTECH XC7A100T Starter Kit User Manual V01
2.2.3 System Clock
FPGA chip XC7A100T-2FTG676I has system clock frequency 50MHz which is directly provided by external
crystal. The crystal is designed with high accuracy and stability with low temperature drift 10ppm/°c. Below
image shows the detailed hardware design:
Figure 2-9. 50MHz System Clock
2.2.4 User Extension IOs
The coreboard has two 64P 2.54mm pitch female headers which are used for extending user modules,
such as ADC/DAC module, audio/video module, ethernet module, etc.
C2
100NF
50 MHz
VDD
VSS OUT
OE
Y1
SG-8002JC-50.0000M-PCB
41
32 SYS_CLK
R13 4.7K
3V3
IO_N2IO_N3
IO_A2 IO_A3
IO_B4
IO_A5
IO_A4 IO_B5
IO_H4 IO_J4
IO_G2IO_G1
IO_D1 IO_E1
IO_F4 IO_G4
U2
HDR_32X2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
VCCO_34_35
IO_C1IO_B1
IO_E2 IO_F2
VCCO_34_35
IO_H2IO_H1
IO_M2IO_L2
VIN_5V VIN_5V
IO_B2_VREFIO_C2
IO_U2IO_U1
IO_D5 IO_E5
IO_D4 IO_C4
IO_H9IO_G9_VREF
IO_T2IO_R2 IO_R1IO_P1 IO_N1IO_M1
IO_P5_VREF IO_P6
IO_K1IO_J1
IO_T4IO_T3 IO_M6IO_M5_VREF
IO_L5
IO_M4IO_L4
IO_P3 IO_R3
IO_K5
BANK34/35 Voltage
Supply Pins.
Connected to VIN
power header.
QMTECH XC7A100T Starter Kit User Manual V01
Figure 2-10. Extension IO
2.2.1 3.3V Power Supply
The core board’s 3.3V power supply is using high efficiencyDC/DCchip MP2315 provided byMPSInc. The
MP2315 supports wide voltage inputrange from4.5V to 24V.In normal use case,5V DC power supply is
suggested to be applied on the board. Belowimage shows the MP2315 hardware design:
Figure 2-11. MP2315 Hardware Design
2.2.2 JTAG Port
The on board JTAG port uses6P 2.54mmpitch header which could be easily connected to Xilinx USB platform
cable. Below image showsthe hardware design of the JTAG port:
BANK14_M25 BANK14_M24
BANK14_N22 BANK14_N21
BANK14_P24 BANK14_P23
BANK14_P25 BANK14_R25
VIN_5VVIN_5V
3V3 3V3
U4
HDR_32X2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
BANK14_T25 BANK14_T24
BANK13_AC26 BANK13_AB26
BANK13_Y26 BANK13_W25
BANK13_AB24BANK13_AC24
BANK13_U21BANK13_V21
BANK13_W23 BANK13_V23
BANK13_Y23 BANK13_Y22
BANK13_Y21 BANK13_W21
BANK13_AA25 BANK13_Y25
BANK15_D26 BANK15_E26
BANK15_D25 BANK15_E25
BANK15_G26 BANK15_H26
BANK15_E23 BANK15_F23
BANK15_G22BANK15_F22
BANK15_J26 BANK15_J25
BANK15_G20BANK15_G21 BANK15_H21BANK15_H22 BANK15_K21BANK15_J21
BANK14_K26 BANK14_K25
BANK15_K23 BANK15_K22
BANK14_M26 BANK14_N26
BANK14_L22BANK14_L23
BANK14_P26 BANK14_R26
REGULATED
5V O NLY
+C19
47uF C21
100nF
L3
4.7uH
JP1
1
2
3
4
VIN_5V
C17
100nF
R22 100K
R25
33K
C18 22pF
3V3 U7
MP2315
AAM 1
IN 2
SW
3
GND
4
BST
5
EN/SYNC 6
VCC 7
FB
8
C20 100nF
R24 75K
C15
100nF R20
20R
R23 33K
R21 100K
+C16
47uF
Connected to VIN
power header.
QMTECH XC7A100T Starter Kit User Manual V01
Figure 2-12. JTAG Port
2.2.3 User LEDs
Below image shows two user LEDs and 3.3Vpower supply indicator:
Figure 2-13. LEDs
2.2.4 User Keys
Below image shows the PROGRAM_B key and two user keys:
Figure 2-14. Keys
TCK
J1
JTAG
1
2
3
4
5
6
TDI
TDO
3V3
TMS
D4
1 2
R7
1K
3V3
IO_LED_J19
R36
1K
D5
1 2
3V3
SW1
1
2
PROG_B
3V3
R10
4.7k
SW2
1
2
IO_KEY_H19
3V3
R37
4.7k
QMTECH XC7A100T Starter Kit User Manual V01
2.2.5 DDR3 Memory
The core board has on board 16bitwidth data bus, 256MB memory size DDR3 MT41K128M16JT-125:K
provided by Micron. Belowimage showsthe detailed hardware design:
Figure 2-15. DDR3
DDR_VREF
DDR_D4
DDR_D3
DDR_D2
DDR_D1
DDR_D0
DDR_D9
DDR_D8
DDR_D7
DDR_D6
DDR_D5
DDR_D15
DDR_D14
DDR_D13
DDR_D12
DDR_D11
DDR_D10
DDR_A4
DDR_A3
DDR_A2
DDR_A1
DDR_A0
DDR_A8
DDR_A7
DDR_A6
DDR_A5
DDR_A13
DDR_A12
DDR_A11
DDR_A10
DDR_A9
DDR_BA2
DDR_BA1
DDR_BA0
DDR_RESETN
DDR_CAS
DDR_RAS
DDR_CS
DDR_CKE
DDR_CLK-
DDR_CLK+
DDR_DQS1+
DDR_DQS1-
DDR_DQS0+
DDR_DQS0-
DDR_WE
DDR_VREF
DDR_DQM0
DDR_DQM1
Rout ing t op or bot t om
100 ohms dif f er entialt r ace
impedance
R31
240R 1%
U9
MT41K128M16JT-125:K
CK
J7
CK#
K7
CKE
K9
CS#
L2
RAS#
J3
CAS#
K3
WE#
L3
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC# N7
A13 T3
A14 T7
BA0 M2
BA1 N8
BA2 M3
DQ0
E3
DQ1
F7
DQ2
F2
DQ3
F8
DQ4
H3
DQ5
H8
DQ6
G2
DQ7
H7
ODT K1
VSS1 A9
VSS2 B3
VSS3 E1
VSS4 G8
VSSQ4 D8
VSSQ3 D1
VSSQ2 B9
VSSQ1 B1
VSSQ5 E2
VDDQ1
A1
VDDQ2
A8
VDDQ3
C1
VDDQ4
C9
VDDQ5
D2
VDD1 B2
VDD2 G7
UDQS#
B7
UDM
D3
LDM
E7
LDQS#
G3
UDQS
C7
LDQS
F3
DQ8
D7
DQ10
C8
DQ11
C2
DQ14
B8 DQ12
A7
DQ15
A3 DQ13
A2
VDD9 D9
VSSQ6 E8
VDDQ6
E9
VDDQ7
F1
VSSQ7 F9
VSSQ8 G1
VSSQ9 G9
VREFDQ
H1
VDDQ8
H2
VDDQ9
H9
NC1
J1
NC2
J9
VSS5 J2
VSS6 J8
VDD4 K2
VDD5 K8
NC3
L1
ZQ L8
NC4
L9
VSS7 M1
A15 M7
VREFCA
M8
VSS8 M9
VDD6 N1
VDD7 N9
VSS9 P1
VSS10 P9
VDD8 R1
VDD3 R9
VSS11 T1
RESET#
T2
VSS12 T9
DQ9
C3
C34
100nF
DDR_ODT
C35
100nF
1V35
C36
100nF
DDR_VREF
C37
100nF
R32
100R
DDR_CLK-
C38
100nF R8
1K 1%
R33
1K 1%
1V35
C40 100NF
C39 100NF
1V35
R34
4.7K
R35
4.7K
1V35
DDR_CS
DDR_RESETN
DDR_CLK+
C58 100NF
C59 100NF
1V35
QMTECH XC7A100T Starter Kit User Manual V01
3. Reference
[1] ug470_7Series_Config.pdf
[2] ds181_Artix_7_Data_Sheet.pdf
[3] ug475_7Series_Pkg_Pinout.pdf
[4] MT25Q_QLHS_L_128_ABA_0.pdf
[5] MT41J128M16JT-125K.pdf
[6] MP2315.pdf
[7] MP2143.PDF
QMTECH XC7A100T Starter Kit User Manual V01
4. Revision
Doc. Rev.
Date
Comments
0.1
01/09/2019
Initial Version.
1.0
03/09/2019
V1.0 Formal Release.
Table of contents
