Quantum Q2080 Technical specifications

OUAmUID
PRODUCT
DESCRIPTION
TECHNICAL REFERENCE MANUAL
Q2080
8" Media Fixed Disk Drive

QUANTUM CORPORATION
1804 McCarthy Boulevard
Milpitas, California 95035
(408) 262·1100
TWX 910 338 2203
©Copyright QUANTUM CORPORATION 1983 All Rights Reserved

81-49218 Rev A
Q2080 DISK DRIVE
Technical Reference Manual
Prepared for
QUANTUM CORPORATION
by
Inpsych, Inc.
January,
1984

First Printing, 1983
© Copyright 1983 by Quantum, Inc., Milpitas, California, USA.
Publication No.
83
Quantum reserves the right to make changes and/or improvements to its products without incurring any obligation
to incorporate such changes
or improvements in units previously sold or shipped.
Quantum publications may be requested from your Quantum Sales Representative, or may be ordered from Quan-
tum in the same manner as spare parts. '
Comments
on all Quantum publications or their use are invited. Please use the Comment Form at the back of this
manual.
WARRANTY
Quantum Q2080 disk drives are warranted against defects in materials and workmanship for one year from the date
of shipment. Any questions regarding the warranty should be directed to your Quantum Sales Representative. All re-
quests for repair should be directed to the Quantum Service Center in your area. This
will assure you of the fastest
possible service.
UL/CSA/UDE
UL recognized under File No. E78016.
CSA certification applied for under Reference No. LR 49896-1.
UDE certification pending.

TABLE OF CONTENTS
Section I - PRINCIPLES OF OPERATION
1.1 Model Q2080 Block Diagram .. '.' ......................................................... 1-1
1.2 Model Q2080 Drive Mechanism .......................................................... 1-1
1.2.1 Drive Mechanism Block Diagram ................................................... 1-2
1.2.2 Optical Encoder ................................................................. 1-2
1.2.3 Rotary Positioner Assembly ....................................................... 1-2
1.2.4 Head Stack Assembly
............................................................ 1-2
1.2.5 Disk Stack Assembly ............................................................. 1-3
1.2.6 Base Casting Assembly ........................................................... 1-3
1.2.7 ACDriveMotor ................................................................. 1-3
1.2.8 DC Drive Motor ................................................................. 1-3
1.2.9 Air Filtration ................................................................... 1-4
1.2.10 Automatic Actuator Lock ......................................................... 1-5
1.3 Model Q2080 Drive Electronics ........................................................... 1-6
1.3.1 General Features ................................................................ 1-6
1.3.2 Encoder Board .................................................................. 1-8
1.3.3 Drive Control Board ............................................................. 1-9
1.3.4 AGC Circuit. .................................................................. 1-10
1.3.5 PI and P2 Generation ........................................................... 1-10
1.3.6 Coarse Seek Positioning .......................................................... 1-12
1.3.7 Actuator Drive Circuits .......................................................... 1-13
1.3.8 Servo Read and Conversion Circuits ................................................ 1-19
1.3.9 Data Interface ................................................................. 1-23
1.3.10 Head Switching Matrix .......................................................... 1-24
1.3.11 Write Data Circuits ............................................................. 1-24
1.3.12 Read Data Circuits
.............................................................. 1-28
1.3.13 Microprocessor Circuits .......................................................... 1-32
1.3.14 Index Generation .............................................. '" .............. 1-32
1.3.15 Control Signal Interface .......................................................... 1-35
1.3.16 Interface and Drive Select Logic ................................................... 1-38
1.3.17 Power On Reset. ............................................................... 1-38
1.3.18 DC Power Filter and Regulators ................................................... 1-38
Section II -LOGIC CONVENTIONS AND CIRCUIT DIAGRAMS
2.1 General Discussion ..................................................................... 2-1
2.2 Logic Symbology ...................................................................... 2-1
2.3 Component Locations .................................................................. 2-1
2.4 Circuit Diagrams ...................................................................... 2-2
Section III -APPLICATIONS
3.1 Introduction. . . . . . . . . . . . . . . . . . . . ...................................................... 3-1
3.2 Power On Recalibration Sequence ........................................................ 3-1
3.3 Interface ............................................................................. 3-1
3.4 Errors and Media Defects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 -1
3.4.1 Errors ......................................................................... 3-1
3.4.2 Defect Detection and Reporting .................................................... 3-2
3.4.3 Media Quality Criteria
............................................................ 3-2
ii

3.5 Self Diagnostics ....................................................................... 3-2
3.6 Track Formatting ..... , ...................................... , ......................... 3-2
3.6.1 Introduction .................................................................... 3-2
3.6.2 Track Format. .................................................................. 3-2
3.6.3 Write Pre-compensation .......................................................... 3-4
3.7 EMUnduced Soft Read Errors ........... : ............................................... 3-5
3.7.1 Magnetic Coupling
.............................................................. 3-5
3.7.2
Ground Current Coupling ..................................................... , ... 3-6
Section IV -MAINTENANCE
4.1 General Information ................................................................... 4-1
4.2 Maintenance Precautions
................................................................ 4-1
4.3 Preventive Maintenance
................................................................. 4-1
4.4 Maintenance Procedures
................................................................ 4-1
4.4.1 Level 1 Maintenance
............................................................. 4-1
4.4.2 Level 2 Maintenance
............................................................. 4-5
Section V - ILLUSTRATED PARTS BREAKDOWN
5.1 General Discussion ..................................................................... 5-1
5.2
Major Assemblies ...................................................................... 5-1
5.3 Sub-Assemblies
....................................................................... 5-1
5.4
Printed Circuit Boards .................................................................. 5-1
Figure
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
1-9
1-10
1-11
1-12
1-13
1-14
1-15
1-16
1-17
1-18
1-19
1-20
1-21
1-22
1-23
5.4.1
Encoder PCB ................................................................... 5-1
5.4.2 Drive
Control PCB ...................................... , ....................... 5-1
LIST OF FIGURES
Model Q2080 Block Diagram ............................................................. 1-1
Model Q2080 Mechanical Layout. .......................... ; ............................. 1-2
DC Drive Motor Current Profile .......................................................... 1-4
Air Filtration System ................................................................... 1-5
Drive Electronics Block Diagram
.......................................................... 1-7
Encoder PCB Block Diagram ............................................................ 1-8
Drive
Control PCBA Block Diagram ...................................................... 1-9
Simplified
AGC Circuit. ............................................................... 1-10
PI and P2 Generation .................................................................. 1-11
PI and P2 Signals vs. Position ........................................................... 1-12
Actuator Current During Seek ........................................................... 1-12
Angular Positioning:
PI vs. P2 .......................................................... 1-13
Actuator Drive Block Diagram ...........•.............................................. 1-14
Actuator Enable Driver ................................................................ 1-15
Actuator Compensator ................................................................. 1-16
Actuator Drive Circuits ................................................................ 1-17
Actuator Drive Circuit Voltage/Current Relationship ........................................ 1-19
Servo Wedges
............ , ........................................................... 1-20
Servo Circuitry Block Diagram
.......................................................... 1-20
Servo
Read Amp and Filter Circuits ...................................................... 1-21
Servo Peak Detector ................................................................... 1-21
Servo AID Conversion ....................... " ........................................ 1-22
AID Reset. .......................................................................... 1-22
iii

Figure
1-24
1-25
1-26
1-27
1-28
1-29
1-30
1-31
1-32
1-33
1-34
1-35
1-36
1-37
1-38
1-39
1-40
1-41
1-42
1-43
1-44
2-1
2-2
2-3
2-4
2-5
2-6
2-7
3-1
3-2
3-3
3-4
3-5
4-1
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
Tables
1-1
1-2
3-1
4-1
MFM Write Data Timing ............................................................... 1-23
MFM Read Data Timing ............................................................... 1-23
Head Switching Matrix ................................................................ 1-24
Write CKT Block Diagram .. , .......................................................... 1-25
Write Enable Switch ................................................................... 1-26
Write Data Receiver and Switch ......................................................... 1-27
Write Current Detector ................................................................ 1-28
Read Channel Block Diagram ........................................................... 1-29
Read Droop and Droop Ignore .................... , ..................................... 1-29
Read Channel Front End ............................................................... 1-30
Read Data Pulse Generation ............................................................ 1-31
Microprocessor Circuits Block Diagram ................................................... 1-32
Index Generation ..................................................................... 1-33
Index Comparator .................................................................... 1-33
Index Separator ...................................................................... 1-34
Timing Relationships Between Index Signals ............................................... 1-34
Reset One-Shot. ...................................................................... 1-35
Normal Step Mode Timing ............................................................. 1-35
Burst Step Mode Timing ............................................................... 1-36
Index Timing ........................................................................ 1-37
General Control Timing Requirements ........... " ....................................... 1-37
Power Interface Circuits ................................................................ 2-3
Write Data Circuits .................................................................... 2-4
Read Data Circuits ............... " .................................................... 2-5
Actuator Driver Circuits ................................................................ 2-6
Microprocessor Circuits ................................................................. 2-7
Servo Burst and Index Circuits ........................................................... 2-8
Encoder PCB Circuits .................................................................. 2-9
Sample Track Format ................................................................... 3-3
Magnetic Induced EMI Error. ........................................................... 3-5
Current Flow Through Chassis ........................................................... 3-6
Ground Induced EMI Error ............................................................. 3-6
Connecting Drive Ground to Chassis ...................................................... 3-7
Connector Locations ................................................................... 4-4
Major Assemblies ...................................................................... 5-2
Exploded Drive Assembly ............................................................... 5-5
Power Op Amp Assembly Part Number 20-20816 ............................................ 5-6
Actuator Sub-Assembly ................................................................. 5-7
Spindle and Disk Sub-Assembly .......................................................... 5-9
Head Arm Sub-Assembly ............................................................... 5-11
Cabinet Sub-Assembly ................................................................. 5-13
AC Drive Motor ...................................................................... 5-15
DC Drive Motor Assembly ............................................................. 5-17
Bubble Sub-Assembly ................................................................. 5-19
Encoder PCB Assembly ................................................................ 5-21
Drive Control PCB Assembly ........................................................... 5-23
TABLES
DA Actuator Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ............ 1-14
Servo Bursts................................................................ ......... 1-19
Write Pre-Compensation ................................................................ 3-4
Voltage and Frequency Parts ............................................................. 4-2
iv

PREFACE
Document Objective
The Quantum Q2080 Disk Drive Technical Reference Manual describes the principles of operation, major cir-
cuits, component parts,
maint~nance, and applications of the Q2080 drive.
Intended Audience
This manual is for experienced Design Engineers, Applications Engineers, Software Programmers, and Repair
Technicians using the Q2080 drive for OEM applications.
Document Structure
Section 1 describes the principles of operation of the drive mechanics and electronics.
Section 2 shows schematics
of the Q2080 circuits.
Section 3 describes errors and media defects, self diagnostics, and track format applications.
Section 4 summarizes maintenance procedures.
Section 5 shows illustrated parts diagrams for all major assemblies including bills
of material.
Associated Documents
Additional information on the Q2080 drive, including general specifications and installation procedures, is con-
tained in the Q2080 Product Description
OEM Manual.
v

SECTION I
PRINCIPLES
OF OPERATION
1.1 MODEL Q2080 BLOCK DIAGRAM
The block diagram shown in Figure 1-1 represents the Model Q2080 disk drive. The spindle drive motor may be
powered by either
no VAC, 220 VAC or 24 VDC. The motor drives the spindle by a belt and pulley arrangement. There is
a different belt/pulley set for 50 HZ and 60 HZ AC. The DC motor uses the60 HZ belt/pulley set. These interchangeable
belt/puley sets allow the spindle to rotate the disks
at 3,000 RPM for either frequency.
The head stack assembly
is mounted to the rotor of the proprietary rotor positioner assembly. The positioner motor
is driven from circuitry on the control PCB via power drivers on the heat sink. Track crossing and coarse position feed-
back signals are obtained from
an optical encoder and scale assembly via the encoder PCB. A dedicated servo surface pro-
vides fine track position. This servo
data is written on the bottom surface of the lowest platter. Read/write signals are ob-
tained from
or written to seven disk surfaces via the heads, head switching matrix, and preamplifier encoder. The drive
control PCB contains electronics for reading and writing, as well as the microprocessor that controls actuator positioning
and servo position decoding.
~OWER_
DC I
AC INPUT (NOT USED ON DC MOTOR OPTION)
DC INPUT (NOT USED ON AC MOTOR OPTION)
ENCODER PCB
ACTUATOR
DRIVER
HEAT
SINK
OPTICAL
TRACK CROSSING
DETECTOR
FIGURE 1-1
MODEL Q2080 BLOCK
DIAGRAM
1.2 MODEL Q2080 DRIVE MECHANISM
DRIVE BELT
\1
INDEX
TRANSDUCER
The drive mechanism consists of the mechanical drive sub-assemblies in a sealed enclosure. None of
these sub-assemblies requires adjustment nor are they field repairable.
1-1 REV A (01/84)

1.2.1 DRIVE MECHANISM BLOCK DIAGRAM
FIGURE 1-2
MODEL Q2080 MECHANICAL LAYOUT
1.2.2 OPTICAL ENCODER
DC orAC
MOTOR
The optical encoder is mounted on a shaft that is pressed and bonded into the base casting. The assembly con-
sists
of a housing, an infrared light emitting diode, an optical reticle, and a multi-cell photo diode matrix.
The infrared LED
is mounted in the lower half of the housing. This allows the optical scale near the lower arm
of the head stack to move between the infrared LED and the upper half of the housing that contains the reticle and
photo cells. The reticle masks five photo cells so that each cell only receives light through a specific portion
of the
moveable scale. Both the clearance and angular position
of reticle and scale are precision adjustments that are made
when the drive
is manufactured.
1.2.3 ROTARY POSITIONER ASSEMBLY
The positioner used in the Model Q2080 (a design proprietary to Quantum) consists of upper and lower magnet
plates, rotary single phase coil, head stack mounting hub, two magnet rings,
and bearing shaft. The magnets are
composed
of alternating poles bonded to the magnet plates that, in turn, are bolted to the base casting. The rotor
and hub are bonded together and the bearings
and shaft are bonded into the hub. This entire bearing shaftassembly
is bonded into the base casting. The shaft/casting bond provides both mounting rigidity and
an air-tight seal be-
tween the shaft
and mounting bore. The bearing to shaft bond and bearing to hub bond are also rigid and air-tight.
This design allows the mass center
of the head stack to be placed at the hub so that bearing wear and friction are
minimized
and gravity forces cannot apply torques to the head stack that would have to be countered by rotor cur-
rent. This enables the drive
to operate in any orientation. The crash stops, which prevent the heads from being
driven into the spindle
or off the disk surface, are mounted to the upper magnet plate.
1.2.4 HEAD STACK ASSEMBLY
The head stack assembly consists of the heads, head arms, and counter balances. In addition, the optical scale is
bonded to the lower counter balance. The counter balances are castings whose shape and weight are designed to in-
sure that the mass center
of the entire stack is at the center of the mounting hub. The lower counter balanceis slightly
different than the others as it holds the rubber crash stop bumper
and optical scale. The heads are Winchester slider
type mounted
to spring steel flexures that are staked to the head arm. The head conductors are routed in plastic
guides
and tacked in place with an adhesive. All head stack assemblies consist of an upper head arm assembly, a
lower head
arm assembly, and three dual head arm assemblies.
REV A (01184) 1-2

1.2.5 DISK STACK ASSEMBLY
The disk stack assembly consists of the spindle bearing assembly, disk mounting hub, disks, disk spacers, disk
clamp, drive pulley, spindle grounding system, and ferrous exclusion seal. The bearing assembly
is bonded in place
and a ferrofluid magnetic seal
is applied at the top of the assembly. This seal prevents outside air from entering the
drive through the bearing bore or along the bearing shaft. A sector ring, which provides index pulses to the user and
servo timing to the microprocessor,
is mounted on the disk hub. A drive pulley mounted on the bottom of the spin-
dle bearing assembly couples the spindle to the motor pulley through a flat belt. The spindle grounding system con-
sists
of a carbon button bonded to the spindle screw and a spring contact on the belt guard. Four disks and three
spacers are clamped
on the hub. These disks are an aluminum alloy with a magnetic oxide coating that is polished
and lubricated. The lubrication prevents head and media wear when the heads are in contact with the disk surface,
which only occurs outside the data area when the disks are not rotating.
1.2.6 BASE CASTING ASSEMBLY
The base casting is a single piece cast aluminum alloy that provides a mounting surface for the rest of the drive
mechanism.
It has two machined holes used to mount the positioner assembly and optical encoder. The outside top
edge
is flat to ensure an air-tight seal with the bubble cover. Surfaces are provided for mounting the transducer PCB,
and the upper and lower magnet plates for the positioner motor. Mounting holes are also provided, outside the bub-
ble area, for the drive motor and belt guard spindle-ground assembly.
1.2.7 AC DRIVE MOTOR
The Q2080 spindle is driven by an induction AC motor and belt/pulley combination. Two motors areavailable,
one for
110 VAC operation and another for 220 VAC operation. Both motors will operate at either 50 or 60 HZ.
However, since the
50 HZ input will result in a slower motor rotational speed than the 60 HZ input, different size
pulleys and belts are used to set the spindle rotational speed at 3,000
RPM regardless of input frequency. Changing
the Q2080 from one frequency
or voltage to the other is described in section 4.4.1 of this manual.
The motor capacitor and AC input connector are both part
of the AC motor assembly. The capacitor is used to
provide the necessary phase shift to get the motor to start and run in the correct direction. The motor
is mounted on
the base casting with three studs and
is isolated from direct contact with the base casting with plastic washers. The
washers provide AC ground isolation and prevent excessive motor vibrations from being mechanically coupled into
the drive base. The drive pulley
is mounted to the motor shaft. Pulley size is dependent on AC line frequency. (The
50
HZ pulley is larger than the 60 HZ pulley.)
1.2.8 DC DRIVE MOTOR
The Q2080 is available with an optional DC spindle drive motor assembled by Quantum, which directly replaces
the standard AC motor. The motor
is microprocessor controlled using an Intel 8048 single chip microprocessor.
Three Hall effect devices provide position and velocity feedback to the microprocessor that controls, using pulse
width modulation, three Darlington transistors. The Darlington transistors, by having their collectors connected to
motor coils, control the current driving the motor coils. The currents from emitters
of the three Darlington tran-
sistors pass through one current sense resistor. The current sense resistor, in conjunction with the microprocessor,
regulates the startup and running current
of the motor.
Figure
1.3 displays a typical current profile of a DC motor on the Q2080 drive.
1-3 REV A (01/84)

.0
U
3D
U
2. VOlT
CURRENT 2D
IAMPSI
1.5
1.0
• 2
START CURRENT lOAMI'S TYPICAL
INOTE 11
\tv \A
4.0 AMPS MOTOR AT SPEED
PLUS SEEKING WITH PEAKS
OF DURATION LESS THAN
300 us(NOTE 3)
2DAMPSMOTOR '--_....J____ 100 rnA for on track
• •
AT SPHD HEADS
IN LANDING ZONE
INOTE 2)
• 10 IZ
ToME ISECI
FIGURE 1-3
'-'--------
MOTOR O"'lY --./
II II
DC DRIVE MOTOR CURRENT PROFILE
The start sequence for the Q2080 with the DC motoroption has four steps. Each step uses a different amount
of
24 volt current.
1. During start up, themotor takes 3.0amps and the actuator is disabled so that the entire 24 volt current is used
in the motor. This state lasts until the microprocessor senses that the motor
is 9ODJo of full speed, typically twelve to
sixteen seconds.
2. After the motor reaches 90%
of full speed the microprocessor limits the motor to 2.0 amps. There is a period
of one to two seconds when the motor is in the lower current limit and actuation is disabled.
3. When the drive reaches 92%
of regulated speed, the actuator begins its recalibration sequence. The motor
continues to draw 2.0 amps and the actuator draws 2.0 amps.
At the end of each buffered seek, this 4.0 amp level is
topped by a spike of less than4.0 amps and less than 300us duration. The recalibration current level is repeated dur-
ing normal seeking.
4. After recalibration and the motor has reached full speed, the actuator remains
on track using 100 rnA of 24
volt current and motor current drops to 1.75 amps. The total motor and actuator current
is then 1.85 amps. This is
the nominal drive current during the read/write and quiescent states.
1.2.9 AIR FILTRATION
The Model Q2080 is a Winchester type drive, and as such, the heads fly very close to the media surface. The
nominal flying height
is eighteen micro inches or roughly 1,600 times smaller than the period at the end of this
sentence.
REV A (01/84) 1-4

It is absolutely essential that the air circulating within the drive is kept clean of particles. Sealing the drive in a
bubble and using the rotating disks as an air pump to force the air through a filter ensures clean circulating air.
Figure 1-4 shows the air flow in the enclosed area
of the drive. The lowest pressure area within the drive is located at
the top in the center
of the spindle. A 0.3 micron breather filter is bonded in this area of the bubble. This filter allows
outside air into the bubble enclosure to equalize internal and external pressures. The highest pressure area within the
drive
is located at the inner surface of the bubble. Bonded in the base casting at this location is another 0.3 micron
filter called the circulation filter. Air constantly pumped into the top
of this filter exits from the bottom into a chan-
nel cut in the base casting. This channel extends from the filter to a location close to the spindle where pressure
is
lower than at the top of the filter. This ensures a continuous flow of filtered air as soon as the disks start to rotate.
Due to the stringent requirements for cleanliness, the bubble
and/or seals should not be tampered.
RECIRCULATION
FILTER
FIGURE 1-4
AIR FILTRATION SYSTEM
1.2.10 AUTOMATIC ACTUATOR LOCK
The Q2080 uses a dedicated landing zone inside track 1171 to prevent damage to the media data area during
shipping
or handling.
The AIRLOCK
™used in the Model Q2080 (a design proprietary to Quantum) is an entirely mechanical means
of locking the heads in the landing zone. The AIRLOCK™consists of an airvane mounted close to the edge of the
disk stack with an arm that holds the head stack in the landing zone when the disks are not rotating. As power
is ap-
plied to the motor and the disk stack starts rotating, an airflow
is generated around the disk. As airflow increases,
the airvane and its arm rotate, allowing the arm stack to move freely out
of the landing zone.
1-5 REV A (01/84)

1.3 MODEL Q2080 DRIVE ELECTRONICS
1.3.1 GENERAL FEATURES
This section describes the functions performed by the Model Q2080 drive electronics. Figure 1-5 is a
functional block diagram
of the Model Q2080 drive electronics. The drive electronics consist of the follow-
ing circuitry:
• Interface Buffers -These drivers and receivers buffer the control and data signals between
the drive and the drive controller.
• DC Power Circuits -
• Index Generator -
This circuitry provides decoupling and regulation as well as the power up
reset signal.
Using the mechanical sector ring as a reference, input time slots for
reading the servo data are generated and
an index pulse is provided to the
user interface.
• Read/Write Electronics -This circuitry provides the write current to record data and the circuits to
detect recorded data.
• Encoder PCB -
• Servo Peak Detection -
This PCB contains the head switching matrix, the servo and data read
preamplifier, and the circuits used to generate track signals provided by
the scale and optical encoder.
By using the signals from the factory-recorded servo, this circuitry, in
conjunction with the microprocessor, controls fine position correction
while on track.
• Actuator Drive Circuits -This circuitry provides the power to drive the actuator.
•
Microprocessor-
REV A (01/84)
This single chip processor controls the drive during its various modes of
operation. Primarily, it controls the actuator, either by processing servo
information when the actuator
is on track or by monitoring track cross-
ings to provide velocity feedback when the actuator
is moving.
1-6

USER DC
-
POWER
-
CIRCUITS
POWER
SUPPLY
,1
---
leo
ACTUATOR
...
MUX
~
AID D/A
DRIVE
. CIRCUITS
MICRO
PROCESSOR --
--
SERVO
PEAK
DETECTION
J~
READ/WRITE
ELECTRONICS
ENCODER --
PCB --
TRACK POSITION INFO
RNI AND SERVO
SIGNALS
FIGURE 1-5
DRIVE ELECTRONICS BLOCK DIAGRAM
1-7
INDEX
GEN
rPARATOj
-
..
,
INTERFACE
BUFFERS
J~
f4-
-
-
IND
EX
ES
PULS
ACTWITOR
TO CONTRO LLER
--
--
--
REV A (01184)

1.3.2 ENCODER BOARD
Figure 1-6 is a functional block diagram of the encoder PCB. The board contains the diodes used for head
switching, a through bubble connector (for the head signals, actuator drive signals, and actuator position signals),
the amplifiers and comparators used to detect the encoder photo
cell outputs, and the AGC amplifier used to control
the infrared LED drive current.
8
AGe
REV A (01/84)
IR
LEO
*
c,
....
...
::=
SERVO HEAD
HD CTt-6
...
...
DATA HEADS
FIGURE 1-6
ENCODER PCB BLOCK DIAGRAM
1-8
"
P2
RSl
FIRST
~
STAGE
SERVO
kEAD
AMP
RS2
f---
RDI
~
FIRST
STAGE
DATA
IlEAD
AHP
RD2
-----

1.3.3 DRIVE CONTROL BOARD
Figure 1-7 is a functional block diagram of the drive control board. The board is mounted to the top of the drive
and connects
on one end to the through bubble connector of the transducer PCB. The opposite end of the board
provides connectors for the controller data and control signals and DC power.
Two additional connectors are pro-
vided for the index transducer and the actuator power driver.
Applying AC power to the drive starts the AC motor that rotates the disks. This results in the heads lifting
off
the disk surface and flying above the landing zone. Applying DC power generates a power on reset by the POR cir-
cuit, which resets the microprocessor and all drive logic. Until the rotational speed
of the disks exceeds 2,000 RPM,
the RESET ONE SHOT keeps the microprocessor reset. Then, the microprocessor waits until the speed reaches ap-
proximately 3,000 RPM via the -INDEX line, at which point it waits two seconds for the heads
to contact the land-
ing zone. Next, the microprocessor calibrates the
PI and P2 signals by computing center values.
The heads then perform
100 five track seeks and continue to servo on the last seeked track for greater than one
second to compute the Null Current Value. The Null Current Value
is the current required to keep the actuator mo-
tionless. Following this, the heads single step out to
Thack 0, then the microprocessor sets READY and SEEK COM-
PLETE. The heads continue to servo on
Thack 0 until interrupted by a command from the controller.
When DRIVE SELECT
"X" is driven true and matches the drive select jumper, the drive select logic enables
the interface logic to gate control and data signals to and from the drive. The drive
will read or write data on the
selected head at the present track depending
on the state of the WRITE GATE line. The read/write circuits transfer
the MFM data as required.
The drive may be commanded to move the heads by receiving step pulses. The pulses can be sent in one
of two
modes:
1. Normal mode, in which the step pulses are sent slower than every 1.5 msec.
2. Buffered mode, in which the step pulses are sent faster than every 2001lsec.
USER
PWR
SUPPLY
+5
~
~
-~
I
POWER
FILTERS
&
REG
t
POWER
+24
~
12 r t +
5
~ ~
ACTUATOR
POWER
RESET
---
ON
RESET t r
MICRO
h PROCESSOR h
SERVO / " / )
ACTUATOR
f-+-CONVERSION
DRIVE
, I ,
t
READ
DATA
TO
CON
TROLLER
INTERFACE
&
DRIVE
SELECT J
WRITE
DATA
FIGURE 1-7
DRIVE CONTROL PCBA BLOCK DIAGRAM
1-9
TO
ARM
STACK
REV A (01/84)

1.3.4 AGC CIRCUIT
Paragraph 1.2.2 describes the mechanical operation of the transducer scale reticle and photo cell. The AGC
window in the reticle provides its photo cell with a large view
of the scale in order to sense an average of the amount
of light striking any of the other cells. Figure 1-8 is a simplified schematic of the AGC circuit.
Amplifier
VI drives the base of QI that provides the current for the infrared LED. RI is adjusted at the factory
to provide the proper signal amplitude out
of the track position amplifiers. Once RI is adjusted, the amount of light
produced by the LED depends
on the amount of light seen by the AGC photo diode. If the photo diode output
decreases (less light seen) amplifier
VI output increases and QI conducts harder, passing more current to the LED
which outputs more light until the circuit stabilizes again. In this way, the signal amplitude
of the other photo diodes
remains constant over the entire scale, compensating for aging and variations in temperature and voltage.
PHOTOCELL
AGCCELL
SCALE
=
IRLED
FIGURE 1-8
SIMPLIFIED AGC CIRCUIT
1.3.5 P1 AND P2 GENERATION
R1
10
Q1
2N2222A
The PI and P2 signals are used to determine coarse track position and track crossing. As seen on the simplified
schematic in Figure 1-9A, one pair
of photo cells (connected to comparator A) are in opposite states. The cell with
no light results in minimum voltage to the inverting input and the cell with maximum light results in maximum
voltage to the non-inverting input. With these inputs comparator A outputs maximum positive voltage at
Pl. On the
other hand, the cells connected to comparator B
see equal light and therefore result in equal voltages to both inputs
of comparator B. This results in a zero voltage output at P2. Moving the scale to the next state gives the conditions
shown in 1-9B. Here comparator A has equal inputs, hence, zero output
at Pl. Comparator Bhas maximum voltage
on the non-inverting input and zero voltage
on the inverting input, resulting in a maximum positive output at P2.
Moving the scale again gives the condition shown in 1-9C. Once again, comparator B sees equal inputs and P2
is
zero volts. Comparator A has different inputs, but they are in the opposite state from I-9A; here there is maximum
voltage at the inverting input and minimum voltage at the non-inverting input. This results in a maximum negative
output from comparator A
at Pl. Figure 1-90 shows the last of the four possible conditions. Here we have no ouput
at
PI and maximum negative output at P2. The waveforms in Figure I-9E illustrate the outputs from PI and P2 that
would occur with the scale constantly moving in one direction. The scale and reticle are etched in such a way that the
zero voltage point
of the PI or P2 waveform indicates a track center. Therefore, the disk contains four tracks in the
space between the beginning
of one scale line and the beginning of the next scale line.
REV A (01/84)
1-10

(A)
(8)
(C)
(D)
P1
P2
P1
P2
P1
P2
P1
P2
P1_----.
P2_---I
w ~ ~ ~ W ~ ~ ~
(E)
FIGURE 1-9
PI AND P2 GENERATION
1-11
REV A (01/84)

1.3.6 COARSE SEEK POSITIONING
The microprocessor of the Q2080 uses the PI and P2 signals for track crossings and coarse position settling dur-
ing seeks. Following coarse positioning, the Q2080 reads servo bursts for fine positioning. Thedrive performs coarse
seeks in two modes: slew mode seeks (seeks
of more than six tracks), a single step mode seeks (1-6 step bursts with
step rate less than 200J-tsec
or single STEP pulse of greater than 1.5 msec).
The last STEP pulse, when STEP pulses are sent in slew mode, results in a full current pulse
to the actuator for
the direction set by the direction bit. During the start
of the seek, the microprocessor looks at zero crossings of PI
and P2 to compute track crossings (see Figure 1-10 at points A, B, C, and D). During longer seeks, once the arm
stack gains speed, the microprocessor only looks
at zero crossings for PI or P2. This results in detection of track
crossings every two tracks.
PHASE
IN
( I D)
OUT
(00)
--~--------~--------~--------~--------~--POSITION
B c D
2 a 3
FIGURE 1-10
P1 AND
P2 SIGNALS VS. POSITION
To decelerate the arm stack during slew mode seeks, the microprocessor sends the actuator full current in the
opposite direction once approximately half
of the seek has been completed (See Figure 1-11).
REV A (01/84)
o
I-
a:.
ACCELERATE
~ ~ COAST
UJe::(
a:.:::>
a:. I-
:::>u
Ue::(
DECELERATE
~
u
>~
1-(1)
-%:
U a:.
0«
....J
UJ LL
>0
START
SE.EK TIME
FIGURE 1-11
1/2
ACTUATOR CURRENT DURING SEEK
1-12
~
END