Realtek Ameba RTL8195AM DEV01 User manual

Realtek Ameba RTL8195AM DEV01 User Manual
This document define pin out of Ameba RTL8195AM DEV.
Version 1.10

Document Number: UM0058
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October 6, 2016 2
Table of Contents
1System requirements............................................................................................................... 3
2Hardware block diagram......................................................................................................... 3
3Pin out reference ..................................................................................................................... 4
4Antenna hardware setup.......................................................................................................... 5
5Peripherals support.................................................................................................................. 6
5.1 Pin function table setup................................................................................................... 6
5.2 Peripheral Descriptions................................................................................................... 7
6Hardware configuration .......................................................................................................... 8
6.1 CMSIS-DAP................................................................................................................... 8
6.2 J-Link/JTAG................................................................................................................... 9
6.3 DAP mode..................................................................................................................... 11
7Reference electrical schematics ............................................................................................ 12
8Sensor board.......................................................................................................................... 14

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1System requirements
Windows PC (XP, Vista, 7)
USB type A to Micro-B USB cable x 1
RS-232 to UART board(debug) x 1, JTAG cable x1 (option)
2Hardware block diagram
IC: RTL8195AM
Module HDK version: HDK-AM95A03_1V0
DEV HDK version: RTL-AMEBA_DEV01_1v1
DAP update
Mode button
DAP reset
button
NFC Antenna
Wi-Fi PCB
Antenna
Wi-Fi external
ANT connector
Ameba
reset button
USB
Host
DAP+DC
+serial port
DC 5V
J22
J20
J21
J19
RTL8195AM
DAP
J-TAG
UART

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3Pin out reference

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R20 6
R20
7
R20
8
4Antenna hardware setup
I-PEX/U.FL connector: R206
External antenna: R207
PCB antenna: R208

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5Peripherals support
Debug UART: GPIOB_[0..1]
JTAG: GPIOE_[0..4]
5.1 Pin function table setup
Multiple functions are supported by group setup.
For example: GPIOA_6(Rx), GPIOA_7(Tx), GPIOA_3(RTS) and
GPIOA_5(CTS) are used if UART0 function. GPIOA_3(RTS) and
GPIOA_5(CTS) can not be used as other functions.
For example: GPIOC_0, GPIOC_1, GPIOC_2, GPIOC_2, GPIOC_3 are
used if PWM is occupied. GPIOC_1(PWM1) and GPIOC_2(PWM2) can
not be used as other functions.
NOTE1: PH = Pull-High, HI = High-impedance
NOTE2: GPIOA_1 needs external Circuit to do the pull high control; others’ pull
control can be done by register setting (including GPIOA_1’s PD).
JTAG
Debug console
I2S
PWM
SDIO
UART
UART
I2C
SPI
SPI

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5.2 Peripheral Descriptions
Baud rate
UART
UART_LOG
38400 Hz
UART0
4 MHz
UART2
4 MHz
Clock rate
SPI
SPI0_Master
20.8 MHz
SPI0_Slave_TRx
4.1 MHz
SPI1_Master
41.6 MHz
SPI1_Slave_TRx
--
Clock rate
I2C
Standard mode
0~100 kb/s
Fast mode
<400 kb/s
High-speed mode
<3.4Mb/s

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6Hardware configuration
6.1CMSIS-DAP
RTL-AMEBA_DEV01 supports CMSIS-DAP debugger. It requires installing
“serial to USB driver”at first. Serial to USB driver can be found in
tools\serial_to_usb\mbedWinSerial_16466.
Connect board to the PC with micro-USB cable.

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6.2J-Link/JTAG
Weld JTAG and log UART connectors to HDK board and connect with pitch
2.54mm 2x5pins connector. It is recommended to weld the connector on the
bottom side. Users can connect extension boards from top side.
Dupont Line or 2.54mm 2x5 pins connector.
JTAG
UART
5V DC

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Power On(Disable DAP mode)
Holding TGT_NRESET button (J24, red-circled) then press Pdn button (J13, blur-
circled). Release the button after power on.
J24
J17
J13

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6.3DAP mode
In DAP mode, the DAP firmware can be updated.
Holding TGT_NRESET button (J24, red-circled) then press nRESET button (J17,
blur-circled). Then the DAP mode window will show up.
DAP window will show up when entering DAP mode.
J24
J17
J13

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7Reference electrical schematics
SD11
1010603MRHF/NC
D2 LED
VBUS USB INPUT(Device for Ameba)
+3.3V_IF
HSDM
U_GND
CON3
USB_AB TYPE
1 2 3 4 5
7 6
98
VBUS
D-
D+
ID
GND
GND GND
GNDGND
D-
R50 0
C6 0.1uF
DAP
VDD33
U_GND
VDD33
5VDD
SD5 1010603MRHF
C2
0.1uF
AMB
D+
U_GND
C4 10uF
HSDM
SD6 SS12/NC
AMB Host
U1
G5728
1 2 34
5
EN
GND
SWVin
FB
+3.3V_WIFI
U_GND
D+
C3
10uF
SD3 SS12/NC
5VDD
L1 4.7uH
U_GND
VDD33
HSDM
SD10
1010603MRHF/NC
R52 0
U_GND
D+
C28 NL C/402
R1 470
DC Power 1.0
ARMEBA_DEV
Custom
1 2
Title Size Document Number Rev Date: Sheet of
U_GND
R54 0
HSDP
R55 0
C5 22uF
U_GND
R57 0
UD1+5V
HSDM
R2 470
U_GND
C26 22pF
VDD33
CON1
USB_B TYPE
1 2 3 4 511
10
9
8 7
6
VBUS
D-
D+
ID
GNDGND
GND
GND
GND GND
GND
+3.3V_IF
SD7 1010603MRHF
5V Adapter Input Only
SD2 1010603MRHF
VDD33
UD1+5V
CON2
USB_B TYPE
1 2 3 4 511
10
8 7
9 6
VBUS
D-
D+
ID
GNDGND
GND GND GND
GND GND
SD9 SS12/NC
Power indicator
SD8 1010603MRHF +3.3V_WIFI
D-
SD1 1010603MRHF
+5V --> +3.3V
R46 68k
5VDD
R51 0
VDD33
R43 0
R56 0R5 0
5.0V=2A
HSDP
VDD5V R47
100k
HSDP
C1 22uF
D1 LED
VBUS USB 1 INPUT(Device for DAP)
5VDD
5VDD
SD4 1010603MRHF
R53 0
VDD5V
R48 0
VBUS USB 2 INPUT(Host for Ameba)
D-
VDD33
C27 10nF
R49 15k
HSDP

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ADC_CH2
PD10/ SPI_CS/ PWM
J18
CON5x2/NP
1 2 3 4 5 6 7 8 910
DIGITAL (PWM~)
I2C_SDA
+3.3V_IF
D-
GPIOE_2
GPIOE_3
R34 100k
+3.3V_WIFI
nRESET
GPIOB_2
D5
LED
GPIOB_3
PD5
UART
UART_RX
R39
100k
GPIOC_4 GPIOC_0
A0 A1 A2 DAC I2C_SDA I2C_SCL
+3.3V_IF
U9
TP
11
PD1/ UART_TX
GPIOE_4
GPIOD_5
JTAG_CLK
5VDD
GPIOB_1
C25
20pF
PD7
UR_TX
HSDM
R41
10k
I2C_SDA
PD2
R25
470
NFC
+3.3V_IF
GPIOA_7
GPIOD_6
GPIOE_1
U11
TP
1
1
JTAG_TMS
GPIOA_1
R44 0
+3.3V_WIFI
GPIOA_2
R28 100k
Q1
BSS84
G
DS
UR_RX
GPIOA_3
PD3/ PWM
HSDP
DAP
SWCLK
C22 1uF
PD4/ PWM
GPIOE_5
UART_TX
GPIOA_0
GPIOC_2
R27
470
+3.3V_IF
PDn/W_Disable#
GPIOA_6
J21
CON1x12
2 1 4 3 5 6 7 8 9
10 11 12
PD7
D+
R23 0
D7 PWM/D6 D5 PWM/D4 PWM/D3 D2 TX/D1 RX/D0
VDD33
VDD33
JTAG_TDO
+3.3V_WIFI
R20 0/NC
R36 0
5VDD
VDD33
NFCIP
+3.3V_IF
J14
CON1x2
2 1
PDn SW CTRL
GPIOA_2
+3.3V_IF
JTAG_TMS
U15
TP
11
D15 D14 I2C_SCL I2C_SDA AREF GND SCK/D13 MISO/D12
PWM/MOSI/D11 PWM/CS/D10 PWM/D9 PWM_RTK/D8
UART_TX
R37 24k
GPIOE_2
RF_OUT
GPIOB_1
VDD33
R38 24k
I2C_SCL
GPIOB_0
JA1 SMA/NC
1
2 3
45
D-
R21,R22 Del. CHIP_EN WIRE TO Pdn.
+3.3V_WIFI
U13
TP
1
1
PD3/ PWM GPIOE_3
RSVD D18 D17 D16 RSVD IOREF RESET 3.3V
5V GND GND Vin
UART_RX
HSDM
ADC_CH2
U14
TP
11
UART_RX
ADC_CH1
JTAG_CLK
NFCIN
U16
TP
1
1
JTAG_TDO
R35 10K
SW CTRL
GPIOA_4
VDD33
GPIOD_4
PD13/ SPI_CLK
C23 1uF
n/R
JTAG_TDI
D4
LED
JTAG_TRST
GPIOD_4
GPIOB_0
+3.3V_IF
module platform 53pin
CON4A
1
2
3
4
5
8
6
7
9
10
12
15
14
13
11
17 18
16
19 21 20 22 23 24 25
28 29 30 31 26 27 32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
53
51
52
GND
CHIP_EN
GPIOD_4
GPIOD_5
GPIOD_6
GPIOE_5
GPIOD_7
VDDIO_E
GPIOE_4
GPIOE_3
GPIOE_1
ADC_CH2
ADC_CH1
GPIOE_0
GPIOE_2
GND
NC
DAC_CH0
GPIOA_0 GPIOA_2 GPIOA_1 GPIOA_3 GPIOA_4 GPIOA_5 GPIOA_7
HSDM
HSDP
GND
VDDIO2
GPIOA_6
GND_USB
N/A
GND
V33
GND
GPIOC_3
GPIOC_2
GPIOC_1
GPIOC_0
GPIOC_4
GPIOC_5
GPIOB_3
GPIOB_2
GPIOB_1
GIPOB_0
GPIOB_4
GPIOB_5
GND
NFCIP
NFCIN
RF
GND
GND
U12
TP
1
1
GPIOE_4
GPIOB_4
+3.3V_IF
GPIOB_5
Func.
GPIOA_5
D3
LED
GPIOC_5 GPIOC_1
T/R
GPIOE_1
R24 10k
GPIOE_0
GPIOD_7
J24
2 1
3
4
5
UART_TX
+3.3V_IF
VDD33
GPIOC_5
+3.3V_IF
PD12/SPI_MISO
J17
2 1
3
4
5
Release
GPIOA_0
GPIOD_7
Y1 12MHz
1 2
C21
22pF
SWD Debug Pin1
JTAG_TMS
DAP/Ameba 1.0
ARDUINO
Custom
2 2
Title Size Document Number Rev Date: Sheet of
D+
PD5
PDn
TGT_NRESET/
nRESET
C24
20pF
PD6/ PWM
GPIOB_2
TGT_NRESET/
I2C_SCL
J19
CON1x8
2 1 4 3 5 6 7 8
Pdn
+3.3V_WIFI
R19 0/NC
DAC_CH0
SWD Debug Pin2
JTAG_TDI
R40
10k
GPIOA_4
CHIP_EN
R29 270
5VDD
+3.3V_IF
+3.3V_IF
GPIOA_3
+3.3V_WIFI
J25
CON1x4
2 1 4 3
NFCIN
VDD33
PL
HSDP
PD0/ UART_RX
LPC11U35FHI33/501
U8A
1 2 3
4 5
8
6
7
9
10
12
15 14 13
11
17 18 16
19
21
20
22
23
24
25
28
29
30
31 26 27 32
EXP
PIO1_19/nDTR/SSEL1 IF_NRESET NRESET_FB_ISP
XTALIN XTALOUT
TGT_NRESET
VDD1
LED_MSD
USB_VBUS
NC2
LED_HID
USB_SCON USB_D+ USB_D-
NC3
TGT_SWDIO
TGT_SWO
TGT_SWCLK
NC4
LED_UART
NC5
NC6
NC7
NC8
NC9
NC10
VDD2
NC11
TGT_TX
WAKE_NREQ
SLEEP_NREQ
TGT_RX
VSS
SWD Debug Pin4
+3.3V_WIFI
PD4/ PWM
PDn HSDP
+3.3V_IF
JTAG_TDO
C17
10uF
PD2
GPIOC_0
RF_OUT
PD10/ SPI_CS/ PWM
R18 100k
Press
CHIP_EN
R30 1.5k
PD11/ SPI_MOSI/ PWM
SWD Debug Pin5
RST
C18 0.1uF
GPIOD_5
POWER
JTAG_TRST
JTAG_CLK
HSDM
GPIOA_5
GPIOC_4
ADC_CH1
R32 33
D+
AGND
PH
GPIOA_1
R17 10k GPIOC_2
J20
CON1x6
2 1 4 3 5 6
SWD Debug Pin3/5/9
JTAG_TRST
5VDD
PD6/ PWM
C20
22pF ANALOG IN
PD11/ SPI_MOSI/ PWM
+3.3V_IF
J22
CON1x12
2 1 4 3 5 6 7 8 9
10 11 12
+3.3V_IF
PD0/ UART_RX
GPIOC_3
DAC_CH0
NFCIP
GPIOB_4
U10 TP
11
GPIOA_7
GPIOC_3
R33 10k
GPIOE_1 ent to JTAG_TDI.
GPIOE_5
J13
2 1
3
4
5
GPIOD_6 PD1/ UART_TX
DIGITAL (PWM~)
PD13/ SPI_CLK
JTAG_TRST
R31
33
GPIOA_6
GPIOB_5
GPIOE_0
R26
470
D-
D+
GPIOB_3
GPIOC_1
R42
10k
PD12/SPI_MISO
JATG
SWDIO

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8Sensor board
Extension board: RTL-AMEBA_EXT B2_2V0