
GARD 8000 Distance Relay RFL Electronics Inc.
Table of Figures
Figure 4-1. Three Phase Operating Times............................................................................................................................. 4-1
Figure 4-2. Two Phase Operating Times ............................................................................................................................... 4-1
Figure 4-3. Single Phase Operating Times ............................................................................................................................ 4-2
Figure 6-1. Front and Rear views of 3U chassis with Distance Relay (Typical) ..................................................................... 6-2
Figure 6-2. External connections for the 3U chassis.............................................................................................................. 6-2
Figure 6-3. Input Mapping web page ..................................................................................................................................... 6-3
Figure 6-4. Output Mapping web page .................................................................................................................................. 6-4
Figure 6-5. Distance relay rear connections .......................................................................................................................... 6-4
Figure 6-6. AC Schematic for GARD 8000 Distance Protection ............................................................................................ 6-5
Figure 6-7. Distance Relay Inputs, schematic diagram.......................................................................................................... 6-6
Figure 6-8. Distance Relay Outputs, schematic diagram ....................................................................................................... 6-7
Figure 8-1. Trip Mask Enable and Element Enable (Stepped Distance) ................................................................................ 8-3
Figure 8-2. Trip Mask Enable and Element Enable (Directional Comparison Blocking)....................................................... 8-14
Figure 8-3. Directional Comparison Blocking (DCB) Distance Relay Scheme..................................................................... 8-27
Figure 8-4. Directional Comparison Blocking (DCB) Directional Overcurrent Scheme ........................................................ 8-28
Figure 9-1. MHO Phase-Ground Characteristic (I)................................................................................................................. 9-3
Figure 9-2. Mho Phase-Ground Characteristic (II) ................................................................................................................. 9-4
Figure 9-3. Phase-Phase Mho Characteristic (I).................................................................................................................... 9-5
Figure 9-4. Reactance Characteristic (I) ................................................................................................................................9-7
Figure 9-5. Reactance Characteristic (II) ............................................................................................................................... 9-8
Figure 9-6. Directional Unit .................................................................................................................................................... 9-9
Figure 9-7. Resistive Blinder................................................................................................................................................ 9-10
Figure 9-8. AG Distance Element Operational Logic ........................................................................................................... 9-12
Figure 9-9. AB Distance Element Operational Logic............................................................................................................ 9-13
Figure 9-10. Zone Logic....................................................................................................................................................... 9-15
Figure 9-11. Stepped Distance Logic................................................................................................................................... 9-15
Figure 9-12. Zone 1 Extension............................................................................................................................................. 9-16
Figure 9-13. Permissive Underreach Transfer Trip (PUTT) ................................................................................................. 9-17
Figure 9-14. PUTT ............................................................................................................................................................... 9-18
Figure 9-15. Direct Transfer Trip (DTT) ............................................................................................................................... 9-19
Figure 9-16. Permissive Overreach Transfer Trip (POTT) ................................................................................................... 9-19
Figure 9-17. Permissive Overreach ..................................................................................................................................... 9-20
Figure 9-18. Directional Comparison Blocking With Directional Carrier TX ......................................................................... 9-21
Figure 9-19. Directional Comparison Blocking..................................................................................................................... 9-22
Figure 9-20. Directional Comparison Unblocking................................................................................................................. 9-23
Figure 9-21. Directional Comparison Unblocking Diagram .................................................................................................. 9-24
Figure 9-22. Transient Block Logic ...................................................................................................................................... 9-25
Figure 9-23. Transient Block Logic ...................................................................................................................................... 9-25
Figure 9-24. Transient Block Logic Diagram........................................................................................................................ 9-25
Figure 9-25. Weak Infeed Logic........................................................................................................................................... 9-27
Figure 9-26. Phase selector................................................................................................................................................. 9-28
Figure 9-27. Loss-of-Potential Block .................................................................................................................................... 9-29
Figure 9-28. Open Pole Logic with Individual 52b Inputs ..................................................................................................... 9-30
Figure 9-29. Open Pole Logic with One Common 52b Input................................................................................................ 9-31
Figure 9-30. Close-Into-Fault Block Diagram....................................................................................................................... 9-32
Figure 9-31. Load Encroachment Characteristic.................................................................................................................. 9-33
Figure 9-32. Power swing Unit............................................................................................................................................. 9-34
Figure 9-33. Open breaker detector..................................................................................................................................... 9-36
Figure 9-34. Minimum Operating Time for time overcurrent curve....................................................................................... 9-39
Figure 9-35. Minimum Operating Time when set Fixed Time exceeds curve time delay at 1.5 x pick-up............................ 9-39
Figure 9-36. ANSI Moderately Inverse................................................................................................................................. 9-40
Figure 9-37. ANSI Inverse ................................................................................................................................................... 9-41
Figure 9-38. ANSI Very Inverse ........................................................................................................................................... 9-42
Figure 9-39. ANSI Extremely Inverse................................................................................................................................... 9-43
Figure 9-40. ANSI Short time............................................................................................................................................... 9-44
Figure 9-41. Inverse (IEC) ................................................................................................................................................... 9-45
Figure 9-42. IEC Very Inverse ............................................................................................................................................. 9-46
Figure 9-43. IEC Extremely Inverse ..................................................................................................................................... 9-47
April 1, 2010 v 973.334.3100