Rohm BD7F105EFJ-EVK-001 User manual

1/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
Figure 1. BD7F105EFJ-EVK-001
Isolated DC/DC Converters ICs
Built-in Automotive Switching MOSFET
Isolated Flyback Converter ICs
BD7F105EFJ-C Evaluation Board
BD7F105EFJ-EVK-001
Overview
This evaluation board outputs an isolated 16.5 V voltage from an input of 8 V to 32 V, and can output a maximum output current
of 0.25 A.
BD7F105EFJ-C is an isolated flyback converter that does not require a photocoupler.
Feedback circuit by the transformer’s tertiary winding or photocouplers becomes unnecessary, contributing to reduction of set
parts.
It also has a number of built-in protection functions that enable the design of isolated power supply applications for high reliability.
Performance Specifications
This is a typical value and does not guarantee the characteristics.
Unless otherwise specified, VIN = 12 V, IOUT = 0.2 A, Ta = 25 °C
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Input voltage range
VIN
8
12
32
V
Output voltage
VOUT
14.8
16.5
18.2
V
Output current
IOUT
0
0.25
A
Maximum output power
POUT
-
-
4
W
Standby power
PINSTBY
-
40
100
mW
IOUT = 0 A VIN = 12 V
Power Supply Efficiency
η
65
80
-
%
POUT = 2 W
Downloaded From Oneyac.com

2/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 2. Connection Diagram
Operating Procedure
1. Necessary equipment
(1) DC power supply with an output voltage of 32 V or more and an output power of 10 W / 5 A or more
(2) Load device of 5 W or more
(3) DC voltmeter
2. Connecting the Equipment
(1) Preset the DC power supply to 8 V to 32 V and turn off the power output.
For power supplies with slow response, connect a large capacitor to the output of the power supply.
(2) Set the load to less than or equal to the rated current of each output and disable the load.
(3) Connect the positive terminal of the power supply to the VIN terminal and the negative terminal to the GND
terminal with a pair of wires.
(4) Connect the positive terminal of the load to VOUT1 terminal and the negative terminal to GND1 terminal with a
pair of wires.
(5) When connecting a wattmeter, connect as shown below. (Refer to your power meter User's Manual for more
information)
(6) Connect the positive terminal of the DC voltmeter to VOUT1 terminal and the negative terminal to GND1
terminal for measuring the output voltage.
(7) Turn on the output of the DC power supply.
(8) Check that the DC voltmeter display is at the set voltage (16.5 V).
(9) Activates the load.
Downloaded From Oneyac.com

3/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 3. Circuit diagram
Application circuit
The evaluation board operates with an average frequency 363 kHz.
Monitoring the flyback voltage due to the voltage at the output (16.5 V) provides primary-side feedback control that eliminates
the need for photocouplers and auxiliary windings.
Operation starts when the VIN pin voltage exceeds UVLO detect voltage of 3.4 V (Typ) and SDXEN pin Enable pin voltage of
2.0 V (Typ).
The circuit diagram of the demonstration board is shown in the figure below, and the parts list is shown on page 9.
Downloaded From Oneyac.com

4/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
1
2
3
4
8
7
6
5
GND
SDX/EN
L_COMP
REF
VIN
SW
N.C.
FB
EXP-PAD
(TOP VIEW)
Figure 4. Pin layout drawing
Outline of BD7F105EFJ-C
Features
◼AEC-Q100 (Grade-1)
◼No Need for Optocoupler and Third Winding of
Transformer
◼Output voltage is set by two external resistors and
transformer winding ratio.
◼Uses proprietary adaptive ON-time control
technology
◼Highly efficient light load mode (PFM operation)
◼Shutdown and Enable control
◼Burst voltage design possible
◼60 Built-in V-switching MOSFET
◼Spread frequency spectrum
◼Soft start function
◼Load current compensation function
◼Various protection functions
Undervoltage protection (UVLO)
Overcurrent protection (OCP)
Overheat protection (TSD)
REF pin open protection (REFOPEN)
Short-circuit protection (SCP)
Battery short-circuit protection (BSP)
Critical Characteristics
◼Input voltage range :
VIN terminal 3.4 V to 42.0 V
SW pin to 60 V
◼Switching frequency : 363 kHz (Typ)
◼Reference voltage accuracy: ±2.8 % (Typ)
◼Shutdown current 0 μA (Typ)
◼Operating temperature range -40 °C to +125 °C
Package W (Typ) x D (Typ) x H (Max)
HTSOP-J8 4.9 mm x 6.0 mm x 1.0 mm
Applications
Insulated power supply for automotive use (E-Comp, Inverter
etc)
Insulated power supply for industrial equipment
Pin Layout
PIN ASSIGNMENT
No.
Pin name
Function
1
GND
GND terminal
2
SDX/EN
Shutdown/Enable control pin
3
L_COMP
Load current compensation value setting pin
4
REF
Output voltage setting pin
5
FB
Output voltage setting pin
6
N.C.
No Connect
7
SW
Switching output pin
8
VIN
Power input terminal
-
EXP-PAD
Rear heat dissipation pin
Downloaded From Oneyac.com

5/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 5. Output Voltage vs Output Current
Figure 6 Efficiency vs Output Current
Figure 8. Efficiency vs Input Voltage
Figure 8. Frequency vs Input Voltage
Figure 7. Output Voltage vs Input Voltage
Measurement data
1. Load regulation
2. Line regulation
Downloaded From Oneyac.com

6/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 9. MOSFET Waveform
Vin = 12 V, IO = 0.1 A
Figure 10. MOSFET Waveform
Vin = 12 V, IO = 0.2 A
Figure 11. Load response
Vin = 12 V, IO = 50 mA to 200 mA
Figure 12. Output Voltage ripple
VIN = 12 V / IO = 250 mA
Figure 13. Output Voltage ripple
VIN = 12 V / IO = 250 mA
Measured data-continued
3. Switching waveform
4. Load response waveform
5. Output voltage ripple waveform
VSW (20V/div)
VOUT (10V/div)
VSW (20V/div)
VOUT (10V/div)
VSW (20V/div)
VOUT (1Vac/div)
IOUT (200mA/div)
VOUT (50mVac/div)
VOUT (50mVac/div)
IOUT (200mA/div)
IOUT (200mA/div)
*This ripple is due to spread spectrum.
Downloaded From Oneyac.com

7/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 14. Start Up Waveform
Figure 15. Shut Down Waveform
Figure 16. VOUT Short Waveform
Vin = 8 V
Figure 17. VOUT Short Waveform (ZOOM)
Vin = 8 V
Figure 18. VOUT Short Waveform
Vin = 15 V
Figure 19. VOUT Short Waveform (ZOOM)
Vin = 15 V
Measured data-continued
6. Startup/stop waveform
7. Output short waveform
VSW (20V/div)
VSW (20V/div)
VOUT (10V/div)
VSW (20V/div)
VOUT (10V/div)
VIN (5V/div)
VIN (5V/div)
VIN (10V/div)
VSW (20V/div)
ISW (2A/div)
VOUT (20V/div)
VSW (20V/div)
VOUT (20V/div)
VIN (10V/div)
ISW (2A/div)
10ms/div
500us/div
VIN (10V/div)
VSW (20V/div)
ISW (2A/div)
VOUT (20V/div)
VOUT (20V/div)
ISW (2A/div)
VSW (20V/div)
VIN (10V/div)
10ms/div
500us/div
VOUT (20V/div)
ISW (2A/div)
VSW (20V/div)
VIN (10V/div)
Downloaded From Oneyac.com

8/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 20. Surface Temperature
Vin = 8 V, IO = 250 mA (Ta = 23.3℃)
Figure 21. Surface Temperature Reference
Figure 22. Peak Current Waveform
Vin = 8 V, IO = 250 mA
Table 1. Tj Calculation
Measured data-continued
8. Component surface temperature
Tj calculation of IC is calculated using the above table.
Loss of IC is divided into 1: Turn on loss, 2: conduction loss, 3: Turn off loss, and 4: ICC.
Calculate the loss according to Table1 from the actual current waveform and power supply spec.
In this case, Tj is estimated to be 37.73 °C because Tc = 30.3 °C and ΔTj = 7.07 °C.
Tj should be designed to be 150 °C or less.
In this case, when Ta = 125 °C, Tj = 137.4 °C, and Tj = 150 °C is not reached, so it can be judged that there is no problem in the
whole temperature range.
VIN (10V/div)
VSW (20V/div)
ISW (2A/div)
VOUT (20V/div)
30.3℃
VSW (10V/div)
IOUT (500mA/div)
①
②
③
Downloaded From Oneyac.com

9/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 23. BD7F105EFJ-EVK-001 Schematic
Circuit diagrams
(Condition) VIN = 8 V to 32 V, VOUT = 16.5 V, 0.2 A
Bill of Materials
*Parts are subject to change without notice.
Downloaded From Oneyac.com

10/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Transformer specifications
Manufacturer : Sumida Electric Co., Ltd.
https://job.mynavi.jp/conts/n/sp/23/54430_23sumida/
Product name: CEFD2010_00399_T379
◼External Dimensions
◼Recommended Land
■Terminal connection diagram
Downloaded From Oneyac.com

11/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Transformer Specifications-continued
■Winding wire and linear/linear type
■ELECTRICAL CHARACTERISTICS
Downloaded From Oneyac.com

12/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Application Design Example
1. Transformer design
1.1 Determining the volume ratio NP/NS
The winding ratio is a parameter that sets the output voltage, maximum output power, duty, and SW terminal
voltage.
The duty of the flyback converter is calculated by the following equation:
 

󰇛  󰇜
 
󰇛  󰇜
: Primary transformer turns
: Secondary transformer turns
 : Output voltage
: Forward voltage of the output diode on the secondary side
 : VIN pin voltage
From the above formula, the winding ratio is calculated as follows.

       
 : Duty at VIN Voltage (Typ)
It is recommended to set DTYP from 30% to 50% at the VIN voltage in the middle of the operating range.
Initially, set DTYP = 40 %.
In this case, the following formula is used. (Design VINtyp at battery voltage 12 V)

         
Therefore, we will proceed with designing with a Np/Ns of 0.5.
The turn ratio is also limited by the maximum duty DMAX determined from the minimum incoming voltage.
Make sure that DMAX given by the equation below does not exceed 70%. If this is the case, set DTYP so that it
becomes smaller. If it exceeds 70 %, the OFF time will be shortened. Therefore, the output voltage may deviate
due to deviations in the flyback voltage detection.

    󰇛󰇜 󰇛󰇜  󰇛󰇜
 : Maximum duty of VIN voltage (Min) condition
󰇛󰇜 : Maximum output voltage
󰇛󰇜 : Forward voltage of secondary diode (Max.)
 

        
For this reason, there is no problem in this design.
DMAX of this designer is 0.52 and 0.70 or less, so it is judged without any problem.
[%]
Downloaded From Oneyac.com

13/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 24. SW waveform
Figure 25. SW waveform
Determining the Volume Ratio NP/NS-continued
The flyback voltage VOR is calculated by the following equation.
 󰇛  󰇜

 󰇛  󰇜   
Set so that the SW terminal voltage calculated below does not exceed the withstand voltage.
  󰇛󰇜    
For example, if the derating against the SW pin withstand voltage is 90 %, the SW terminal voltage,
  󰇛  󰇜 It should be designed to be within 54 V.
This is designed with VIN(Max) = 32 V, VOR = 8.6 V.
VSURGE at this time is as follows.  󰇛  󰇜
Therefore, the surge voltage must be less than 13.4 V.
VSURGE is caused by the leaking magnetic fluxes of the transformers.
If VSURGE is large, the transformer structure needs to be reviewed and the snubber circuitry needs to be adjusted.
1.2 Calculating LP, LS
Set LP, LS to enable continuous current mode operation.
Determine by using the current continuous-mode depth k to obtain LP, LS.
k is expressed from ISPK, ISB of Figure 22 by the following equation.
  󰇛  󰇜
: Secondary transformer peak current
 : Secondary transformer bottom current
: Constant representing the depth of the current continuous mode (When designing, use k = 0.25 as a guide.)
: Primary transformer peak current
 : Primary transformer bottom current
[V]
Ipeak
time
Ippk
Ispk
Isb
Ipb
Primary current
Secondary current
Voltage
Time
VIN
VSW
VOR
VSURGE
Downloaded From Oneyac.com

14/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Transformer design-continued
The maximum peak current on the primary side of the IC is determined by ILIMIT of electrical characteristics.
ILIMIT minimum-value determines the secondary min-peak current ISPK1(Min).
󰇛󰇜  󰇛󰇜 

The secondary peak current ISPK2(Max) is calculated from the maximum output current IOUT(Max) by the following
equation.
󰇛󰇜󰇛󰇜
󰇛  󰇜󰇛  󰇜

 : Use a power supply efficiency of 70 % as a guideline.
ISPK2(Max) < ISPK1(Min) must be met in order for IOUT(Max) to be printed.
If the conditions cannot be satisfied, change k to redesign. With higher k values in discontinuous mode
The operating load area becomes wider. When k = 1, discontinuous mode operation is performed in all areas.
This IC is continuous
A low k-value is recommended to achieve high-speed response and low EMI characteristics by mode operation.
Even if the k value is high, there is no problem with power supply operation.
The secondary-side index LS(Max) is calculated by the following equation.
󰇛󰇜 󰇛  󰇜󰇛  󰇜 󰇛  󰇜
  󰇛󰇜  󰇛󰇜  
󰇛󰇜 󰇛  󰇜󰇛  󰇜 󰇛  󰇜
      
󰇛󰇜: Switching frequency This switching frequency should be calculated at 430 kHz.
󰇛󰇜: Max. secondary output current
Ls is 160uH for this design
At this time, the primary inductance Lp is obtained by the following equation.
  󰇛
󰇜
  󰇛󰇜
From the above, we will proceed with the design as Lp:40μH, Ls:160μH in this design.
[A]
[A]
[µH]
[µH]
Downloaded From Oneyac.com

15/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 26. Application Block Diagram
Application Design Examples-continued
2. Output voltage
When the built-in switching MOSFET is turned OFF, the SW pin voltage VSW becomes higher than the VIN pin voltage.
Since the difference between the SW pin voltage and the VIN pin voltage is equal to the primary flyback voltage, the
secondary output voltage is calculated from this voltage. The SW pin voltage VSW at turn-off is calculated by the
following equation.
   
󰇛  󰇜
 : SW pin voltage
 : VIN pin voltage
: No. of primary transformer turns
: Secondary transformer turns
 : Output voltage
: Forward voltage of the output diode on the secondary side
The primary flyback voltage is converted to the FB-pin inrush current IFB by the external resistor RFB between FB-SW
terminals. Since the FB pin voltage becomes almost equal to the VIN pin voltage by the IC's internal circuit, the FB
pin inrush current IRFB is calculated by the following equation.
   
  
󰇛  󰇜 
 

󰇛  󰇜

 : FB pin inrush current
 : FB terminal voltage
 : External resistor between FB and SW pins
FB
SW
VIN
VOUT+
VOUT-
SDX/EN
L_COMP
REF GND
VIN
VF
RFB
RREF
NPNS
[V]
[A]
Downloaded From Oneyac.com

16/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
1. Output Voltage- continued
In addition, since the FB pin inrush current IRFB flows to the external resistor RREF between the REF terminal and GND
terminal, the REF terminal voltage is calculated by the following equation.
 
  󰇛  󰇜
 : REF pin voltage
 : External resistor between REF pin and GND pin
Because the current that flows to the REF pin becomes IREF when the REF pin voltage is VINTREF for RREF,
 
  The resistor must be set.
The REF pin voltage is input to the comparator with the reference voltage inside the IC. The REF pin voltage is equal
to the reference voltage by the internal circuit of the IC. Therefore, the output voltage and the REF pin voltage are
calculated by the following equations.
 
     
As can be seen from this equation, the output voltage VOUT can be set by the transformer turn ratio (NP/NS) on the
primary and secondary sides and the resistance ratio between RFB and RREF.
From the above equation, the external resistor RFB between the FB pin and SW terminal can be calculated by the
following equation.
 
  󰇛  󰇜
In this designer, RFB is determined as follows.
 
   󰇛  󰇜
RFB is set to 43kohm.
However, the ESR on the secondary side of the transformer is a factor that lowers the output voltage as in VF of the
above equation.
Also, when the transformer is not coupled, the number of turns of NP/NS is shifted, which causes the output voltage
to decrease.
Therefore, finally adjust the output voltage by checking the actual device.
[V]
[Ω]
[V]
Downloaded From Oneyac.com

17/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Application Design Examples-continued
3. Output Capacitor
Place the output capacitor as close to the secondary diode as possible.
The output capacitance value COUT is set from the output ripple voltage ΔVO and the start-up time.
The output ripple voltage generated by one switching is calculated as follows.
󰇛󰇜  

󰇛󰇜  
On the other hand, when output capacitor is large, start-up time is long.
When SCP detection mask time (tMASKSCP) in start-up is passed, if REF voltage is lower than VSCP, power supply cannot
output. Therefore, COUT must be satisfied below condition.
 
󰇛󰇜  󰇝󰇡󰇛󰇜
󰇢  󰇛  󰇜 󰇛󰇜󰇞

  󰇛 󰇛󰇜
󰇛󰇜󰇜
Where = 0.762. 󰇛󰇜
󰇛󰇜
A large capacitor capacitance value is required to hold the output voltage during load response or power supply
voltage response.
A capacitance value of 20 μF or more is recommended as a guideline for the output voltage capacitance.
Ceramic capacitors are affected by temperature characteristics, capacitance variation, DC bias characteristics, etc.
The capacitance value may decrease. Pay attention to these points when selecting parts.
4. Input Capacitor
Use a ceramic capacitor for the input capacitor and place it as close to the IC as possible.
Capacitance of the capacitor should be 10 μF or more.
[V]
[µF]
Downloaded From Oneyac.com

18/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Application Design Examples-continued
5. Secondary output diode
A Schottky barrier diode or a fast recovery diode with low VF is recommended because the forward voltage VF of the
secondary output diode causes an error in the output voltage. When selecting a secondary output diode, the peak of
the secondary reverse voltage must not exceed the rating of the diode. The secondary RMS current ISRMS must also
be set so that it does not exceed the rating.
Generally, 30 % or more of the reverse-direction breakdown voltage VR is recommended.
 󰇛󰇛󰇜 
 󰇜    
 : Reverse voltage of the secondary output diode
󰇛󰇜: VIN pin maximum voltage
: No. of primary transformer turns
: Secondary transformer turns
 : Output voltage
: Transformer surge voltage generated in the diode
It is recommended that the rated current of the secondary output diode be at least twice that of ISRMS.
6. Output Resistance and Zener Diode (Minimum Load Current)
The output voltage rises when no load is applied or when light load is applied. The reason for this is that the MAXIMUM
is in the OFF-time tOFF_MAX when the IC is under light load.
This is because switching is always performed at the minimum frequency determined by the minimum ON-time tON_MIN.
For the power PO_MIN determined by the switching frequency of this lowest frequency, when the secondary load is lighter
than this, the output voltage is
It moves up. PO_MIN is calculated by the following equation:
 󰇛󰇜
 󰇛󰇜 󰇛󰇜󰇛󰇜
 
 Because it is an expression, it can also be obtained from IOUT_MIN .
If the rise in the secondary output voltage becomes a problem, connect a secondary output zener diode to suppress
the rise in the voltage. It is also necessary to suppress the rise in the output voltage by adding a resistor to the
secondary output to provide a constant loss. The output resistor ROUT to be connected to the secondary side should
be as follows. The resistor-loss PLOSS is calculated as follows.
 

 
 
󰇛󰇜
󰇛󰇜
１
󰇛󰇜󰇛󰇜
In practice, even if ROUT loads calculated by the above equation are used, the output voltage rises transiently during
secondary discharging. Therefore, it should be set lower enough than this ROUT. Adjust this resistance value in the
actual evaluation. When selecting a resistor, pay attention to the rated power of the resistor.
[W]
[V]
[W]
Downloaded From Oneyac.com

19/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
VOUT
Np Ns
VF
Figure 27. Snubber Circuit
Application Design Examples-continued
7. Snubber circuit
Excessive on the SW pin at turn-off when the degree of coupling of the transformer is low or the large current line of
the board is long, etc.
Voltage may be applied.
To suppress this, use the snubber circuitry indicated by Figure 27.
This snubber circuit clamps the voltage when the flyback voltage + surge voltage exceeds this snubber voltage.
The clamping voltage is determined by the following equation.
    

 : Clamp setting voltage of snubber
 : Forward voltage of the Schottky diode

: Zener voltage of the zener diode
At turn-off if the clamp setting voltage is lower than the flyback voltage
󰇛  󰇜
A current flows through the zener. Therefore, be sure to set a voltage higher than the flyback voltage.
In addition, the snubber circuit may not be clamped at the set clamping voltage because of its operational
responsiveness.
Therefore, be sure to check the clamp voltage in actual operation.
8. SDX/EN terminal resistor
8.1 Setting Enable Voltage
After releasing VIN UVLO, Enable voltage VIN_ENABLE can be set by the following equation.
   󰇛󰇜

 : Target operations start VIN voltage
: Enable volt1
: Partial pressure resistance between R2 and RSDX/EN inside the ICs
[V]
[V]
Downloaded From Oneyac.com

20/22
© 2022 ROHM Co., Ltd.
No. 65UG016E Rev.001
2022.7
User's Guide
BD7F105EFJ-EVK-001
Figure 28. L_COMP voltage compensation example
Application Design Examples-continued
8.2 Setting Disable Voltage
Disable voltage VIN_DISABLE when the VIN pin voltage falls can be set by the following equation.
   󰇛󰇜

 : Intended operation stop VIN voltage
: Enable volt2
9 Output voltage compensation function using L_COMP pin resistor
The IC can compensate for the voltage drop in the output voltage VOUT in response to the increase in IP of the primary
transformer peak current.
VOUT changes can be caused by VF variations in the secondary diodes or by leaking magnetic fluxes in the transformer.
An example of the output voltage compensation function is shown in Figure 26.
This function compensates the output voltage by adding a IREFCOMP current to the REF current that determines the
output voltage.
   
 󰇡   󰇢  

 󰇛󰇜Fixed value. IREFCOMP is incremented relative to the primary current.
As a result, the output voltage is compensated according to the load current on the secondary side.
IREFCOMP is determined by the following equation.
      󰇛󰇜
 :Resistor connected to the L_COMP pin
󰇛󰇜 : Average current flowing through the SW pin
:Fixed value inside the IC
[V]
[V]
[µA]
VOUT
IOUT
With Load compensation
No load compensation
Downloaded From Oneyac.com