Sharp PC-1211 User manual

SHARP CORPORATION
CONTENTS
1 . Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 . LSI signal description 12
4 . About servicing 17
5 . Cassette operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6. Check program · · · · 25
7 . Circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8 . PC - 1211 parts list & guide · · 32
9. CE - 121 parts list & guide . . . . . . . . . . . . . . . . . . . . . . · · · · . · · · · · · · · · · · 34
MODEL PC-1211, CE-121
----SHARP----
SERVICE MANUAL

2
Add (+) , Subtract( - ) , Multiply (+),Divide(/) , Power raising ( A )
Trigonometric funct i ons : SIN(sine) , COS(cosine) , TAN(tangent)
Inversetrigonometric functions: ASN(sine " ), ACS (cosine - 1 ), ATN ( tangent - 1 )
Logarithmic functions: LOG(common logarithm), LN(natural log a rit hm [ ln ] )
· Exponential functions: EXP(exponential)
Angulartransformations: DMS(decimalnotation to sexagesimal n o ta ti o n ) ,
DEG(sexagesimalnotation to decimaln ota t i o n )
Square root extraction: r
Signum function . SGN
Absolute val u e : ABS (IX I)
Interization: INT
Execution of arithmetic operation is commanded by the ENTER key .
1-3 . Arithmeticfunctions
• Buffers :
• Capacities :
12 digits of mantissa and 2 digitsof exponent.
According to mathematical formula (with priority consideration
andjudge function)
Programmemory; 1424 steps , max (PC1211)
Data memory; Fixed memory
26 memories
Flexible memory (commonly usable with the
programmemory)
178 memories , max (PC1211)
Reserveprogram; 18 kinds, 48 steps , max
Input buffer; 80 steps
Data buffer; 8 stages
Functional buffer; 16 stages(but 15 stagesfor parenthesis )
Subroutine buffer; 4 stages
"FOR NEXT" stagement buffer : 4 stages
• Computational capacity:
• Computational method:
1-2. Basic functions
• Displaytube: LF8017JE
• Displaymethod: 5 x 7 dot matrix liquid crystal
• Displaycapacity: 24 coulumns (alphanumerics and symbols)
1-1 . Display
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R E SE R VABLE KEY S
1. SPECIFICATIONS

3
Data protection : Program memory, data memory , reserve program memory
P eri p heral unit: Audio cassette unit (recording / reading of the program memory,
d ata memo r y and reserve program memory)
Physical d imensions: 175(W) x 7 0 (D) x 44(H) mm
1 - 7. Others
Four MR44 (mercury batteries)
3 0 0 hours
0.01 iw
About 6 minutes
B att e ry:
B attery life:
Po we r co n sumption:
Automatic p ower shut off:
1 -6. Power source
1 - 5 . Programming language
BAS IC ( Beginne r's Al l pu rpose S ymbolic Instruction Code)
.... (right), ~ (left)
I N S
D EL
+( d own), t ( up )
Cursor shift:
Insert i on .
Deletion :
Line control:
1-4. Editorial functions

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• The CPU I functions to read key-in data or read the instruction to be executed from the RAM ,
and decides what is to be done for the control of arithmetical operation (i.e. control of
arithmetic sequence, memorizing of arithmetical data , and its readout), or interprete the syntax
of the BASICinstruction for deciding what is to be executed, or determines and prepares the
information to be displayed, but the CPU I does not perform any execution by itself . It only
arrangesthe data and information in proper sequence and acts to provideinstruction code to the
CPU II via the buffer. On the other hand , the CPU II constantly receivesexecution instructions
from the CPU I via the transfer buffer and executes operation against each of instructions or
sometimes performs to exchange data depending on the situation . Although it sharesmajor part
of execution in term of execution, it performs some kinds of auxiliary CPUwhen looked in the
viewthat it does not perform any decision by itself .
Clockstop
Clockstop control
I Power shut off control
I Power off
Displayprocessingroutine
Input buffer
Computational result
Error
Arithmetic routine
Character generator
Cassetteroutine
Print routine
Buzzer
Recognition of printer
Key input routine
Acknowledgementof the remaining
program
One instruction to one program step
incorporation
Interpreter:
Programexecute statement
Cassettecontrol statement
Command statement
Printer control
Execution of manual operation
CPU II CPUI
TheseCPUsare provided with internal ROM,and each of CPUsshares the followingassignments:
2-1 . CP U I, CP U II
System configuration (see the system block diagram)
System of this unit consists of the followingcomponents:
1) CPU I (SC43157) x 1
2) CPUII (SC43178) x 1
3) 4K-bit RAM (TC5514P x 3)
4) Displaychip (SC43125 x 3, with built-in RAM)
5) 2ANDgate (TC401 l UBP x 1)
6) 2AND 20R (TC4019BP x 1)
7) Inverter (TC4069BP x 1)
8) Quard AnalogSwitchMultiplexer(TC4066BP)
9) LCD (24-digit FEMdot LCD)
10) Key
11) Crystal (CSB2560)
8
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6
In the case of manual operation of the pocket computer, the instruction code (key code) is written
into the RAMin the display chip (input buffer) after information is put through the keyboard and
converted into the instruction code by the CPU I, then this instruction code (display, at this case)
is transfered to the CPUII via the transfer buffer. As the CPUII receivesthis instruction, the CPU II
then decodes this instruction (display , at this case) and executes display processing. Upon the
completion of this processing, it is then notified to the CPUI, then the CPU I confirms the comple-
tion of the task by the CPUII before terminating their jobs.
CPU Il
Ex: Actions of CPU I and CPU II at the time of key data entry.

7
Although RAM area is mainly shared by the program , data
and reserve program memories , it is also used for the sub-
routine stack, FOR NEXT statement stack and fixed
memories (W , X , Y , Z) .
1536
1472
1504
001
048
(PC1211)
Reserve pr o gram
------- - - - - - --
Program
or
flexible memory
~--- - -- -------
Fixed memories (W - Z)
Subroutine I FOR NEXT
stack statement
stack
A certain number of C-MOS RAM (1 - 3 chips, 4K bits each) and another RAM incorporated inside
the display chip are used in this pocket computer, having varieties of configurations as described
below:
• Map of 4K-bit RAM
153 6 Bytes
2-2. RAM
en
nd
;e)
II
he
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8
• Input buffer
Remaining 80 bytes (10 memories equivalent) of the display chip 1 is used for the input buffer ,
whi c h is used in the following fun c tions:
1. Any information entered through the keyboard is stored once in this buffer , thus allowingup
to 80 steps.
2. The display contents is stored by the CPU I and the CPUII makes selection out of this da t a.
3 . When an arithmet i cal instruction i s entered , its p rocedure is stored in this buffer by the CPU I
and the CPU II performs operation accord i ng to this procedure.
4 . Whenprogram or reserveprogram is t o be recorded or read out during the execution of the
cassette control instruction , action takes place through this input buffer.
• Transfer buffer
8 bytes (1 memory equi v alent) of the displa y c hi p 1 i s used as a transfer buffer w h ic h is used in
the transa c t i on of instruction between the C PU I and the CPUII.
16 b i ts
----1}4bit
1 memory
• Fixed memory
The total memory of 176 bytes from the display chip 2 and 3 is used as a fixed memories , A - V
(22 memories).
• 8-digitdisplaybuffer
40 bytes of 8-digit display buffer is used as a display data buffer during displayingand also used
as a buffer memory for arithmetical result duringthe arithmetical operation.
128
80 step input buffer Fixed memories
(L-V , 11 memories)
Fixed memories
(A-K , 11 memories)
Transfer buffer
040
04 8
8-digitdisplaybuffer 8-digitdisplaybuffer
8-digitdisplaybuffer
000
DISPLAY CHIP 3
DISPLAY CHIP 2
DISPLAY CHIP 1
• Map of the RAM incorporated in the display chip
There are three lK-bit RAMs (128 bytes each) incorporated in each of display chips (SC43125),
having the following configurations :

9
F i g 2 - 3 -1
The numeri ca figure " 4 ", to be displayed by the CPU II , is c onverted into the r ele v ant character
code and carried through on the address data bus . First of all , the segment Sl is selected with the
address A8-Al " 00000000" to s tore the data DI04-DI01 "1000 " in t he display buffer (see Fi g .
2-3-1 ). To store second half 4 bits of the data , only AS in the address in t urned " 1 " to make the
address "00010000" to store data " 0001". In the same manner , the address "00000001" is selected
for storing the first half 4 - bit data "O 100" for he segmentS2 and the se c ond half 4 - bit data " 000 I "
is stored with the address "00010001 ".
S40
S32
S3 3
S34
Sl6
Sl7
Sl 8
1
S2
A5=0
A5=1
DI04 DI02 DI04 DI02
'--------..,..-~
Addr es s
0
1
0 0 0
)
F
0
1
0 0 1
)
F
0
1
0 1 0
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F
Al
I
A8 A7 A6 A4
Hl
DDD•D
H2
oo•• o
H3
o•o• o
H4
•oo•o
H 5
•••••
H6
ooo•o
H7
ooo•o
Sl S2 S 3 S4 S5
Ex : Displaying numerical figure "4"
There are 8 x 40=320 bits ( 40 bytes)
of area in the display buffer in the
display chip.
D is p lay b u ffer
XOOl 0100
H8 H7 H6 H5 H4 H3 H2 Hl
X OOl 1000
Co unter/
decoder
HA
T he con t ents of di sp lay ind i cated by t he CPU I is receiv e d by the C P U II via the input buffer and
m akes converte d into respecti ve character cod e s, then they are carried over to the displaybuffer in
t he di sp lay chi p through t he addressdata bus .
• D es i gnatio n of the display d ata
Th e followin g struct u re is observedin the displaybuffer in the display chip .
2-3. Display
the
ata.
'U I
up
f er ,
.in
v
d

10
HA: Clock frequency for the counter. This signal is counted and decoded to perform s y nchroni -
zation with the comman signal , Hl-H7 , generated from the CPU II .
DSIP: With high level of this signal , processing of display operation is indicated (RAM data
designatedby Hl-H8 is sent out on SI -S40).
The data stored in the display buffer is carried th rough SI-S40 (Fig . 2-3 - 2) to be fed t o the LCD.
(To indicat e "4 " on the dis p lay , H4 and HS ar e engag ed for SI , H3 and H S for S 2, etc . , all the same
throughout S6-S40 . )
F ig 2 - 3 - 2
S 2
Sl
H7
H6
LJl....____flJ
L I
H 5
LJ
H 4
H3
H 2
Hl
----------- -------- - -- GND
-- --- VA
--------. -----------Vs
-- - - - - - - Vn1 S P
HA
DI SP 0. 5 ms
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