SimCom SIM8905A User manual

SIM8905A_User Manual_
V1.00

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Compliance Information:
FCC Compliance Statement: This device complies with Part 15 of the FCC Rules . Operation is
subject to the following two conditions: 1. This device may not cause harmful interference, and 2.
This device must accept any interference received, including interference that may cause undesired
operation. This device must accept any interference received, including interference that may cause
undesired operation. Product that is a radio transmitter is labeled with FCC ID.
FCC Caution:
(1)Exposure to Radio Frequency Radiation. This equipment must be installed and operated in
accordance with provided instructions and the antenna(s) used for this transmitter must be installed
to provide a separation distance of at least 20 cm from all persons and must not be collocated or
operating in conjunction with any other antenna or transmitter. End-users and installers must be
provided with antenna installation instructions and transmitter operating conditions for satisfying RF
exposure compliance.
(2)Any changes or modifications not expressly approved by the grantee of this device could void the
user's authority to operate the equipment.
(3)This Transmitter must not be co-located or operating in conjunction with any other antenna or
transmitter.
(4)Changes or modifications to this unit not expressly approved by the party responsible for
compliance could void the user authority to operate the equipment.
(5) the modules FCC ID is not visible when installed in the host, if the host is marketed so that
end users do not have straight forward commonly used methods for access to remove the module so
that the FCC ID of the module is visible; then an additional permanent label referring to the enclosed
module: Contains Transmitter Module FCC ID: 2AJYU-8PSA301 or Contains FCC ID: 2AJYU-8PSA301.
The following statement must be included with all versions of this document supplied to an
OEM or integrator, but should not be distributed to the end user.
This device is intended for OEM integrators only.
Please See the full Grant of Equipment document for other restrictions.

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1. SIM8905A Description
1.1. Summarize
SIM8905A is a smart module, which is based on Qualcomm MSM8909 platform. It includes baseband, memory,
RF front end and required circuitry to support LTE-FDD.
1.2. Feature
Feature Implementation
Application Processor
QuadARM Cortex-A7 cores up to 1.1 GHz
32 kB L1, 512 kB L2 cache
ARMv7 32-bit architecture
Memory
8Gb LPDDR3 up to 533Mhz; (SIM8905AH：16Gb LPDDR3 RAM)
8GB eMMC NAND flash
External memory via SD
SD3.0; Support SD flash devices up to 32GB
Operating System
Android OS 5.1/7.1/8
Power supply
3.4V ~4.4V
Charge management
Integrated 1.44 A linear charger for single-cell lithium-ion batteries
Display
4-lane MIPI_DSI, 1.5Gbps each
HD(720P), 60fps
Camera
Primary camera: 2-lane MIPI_CSI, 8MP
Secondary camera: 1-lane MIPI_CSI, 5MP
Video performance
Encode:
H.264 BP/MP –720p, 30fps
MPEG-4 SP / H.263 P0 –WVGA, 30fps
VP8 –WVGA, 30fps
Decode:
H.264 BP/MP/HP–1080p, 30 fps
MPEG-4 SP/ASP–1080p, 30 fps
DivX 4x/5x/6x–1080p, 30 fps
H.263 P0–WVGA, 30 fps
VP8 –1080p, 30 fps
(HEVC) H.265 MP 8 bit –1080p, 30 fps
Audio
Two inputs that support single-ended configurations
Three outputs: earpiece, stereo headphones, and mono class-D speaker driver

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Voice codec support:
G711; Raw PCM; QCELP; EVRC, -B, -WB; AMR-NB, -WB; GSM-EFR, -FR,
-HR;
Audio codec support:
MP3; AAC+, eAAC; AMR-NB, -WB, G.711, WMA9/10 Pro
USIM card
Dual cards dual standby
Transmission rate
LTE Category 4 - 150 Mbps (DL)
LTE Category 4 - 50 Mbps (UL)
Temperature range
Operating temperature: -25
℃
~ +75
℃
Storage temperature: -40℃~ +90℃
Physical dimension
Dimension: 40.5*40.5*2.8mm
Weight: 10.6g

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1.3. Pin
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
110
109
108
107
106
105
104
103
102
101
100
111
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
115
114
113
112
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
VBAT_BB
VBAT_BB
GND
MIC1P
GND_MIC
MIC2P
GND
EAR_P
SPK_M
SPK_P
USIM1_RST
USIM1_CLK
SD_LDO12
GPIO_23
TP_RST_N
USB_DP
GND
USB_DM
GND
USIM1_VDD
GND
USIM1_DET
PWM
TP_INT_N
USIM1_DATA
USB_ID
USIM2_DET
USIM2_RST
USIM2_CLK
VIB_DRV_N
USIM2_DATA
USIM2_VDD
ALSP_INT_N/GPIO_94
GPIO_98
GPIO_0
GPIO_110
GPIO_97
GPIO_68
GPIO_69
GPIO_89
GPIO_88
GPIO_92
GPIO_31
KEY_VOL_DOWN_N
CAM0_RST_N
UART2_TXD
SENSOR_I2C_SDA
SENSOR_I2C_SCL
GND
ANT_MAIN
GPIO_32
UART2_RXD
KEY_VOL_UP_N
CAM0_PWDN
GND
GND
ANT-BT
GND
CAM1_MCLK
HPH_GND
HPH_R
HS_DET
HPH_L
USB_VBUS
GND
GND
VBAT_THERM
VBAT_SNS
GND
ANT_DRX
GND LDO17_2V85
ADC
CHARGE_SEL
VRTC ANT_GNSS
GND GPIO_8
GND
LDO6_1V8
GPIO_17
GPIO_16
GPIO_95
SD_DATA1
SD_DATA2
SD_DATA3
SD_CLK
SD_CMD
SD_DATA0
SD_DET/GPIO_38
TP_I2C_SCL
TP_I2C_SDA
SD_LDO11
LCD_RST_N
LCD_TE
GND
MIPI_DSI_CLK_M
MIPI_DSI_CLK_P
MIPI_DSI_LANE0M
MIPI_DSI_LANE0P
GND
MIPI_CSI0_CLK_M
USB_BOOT
SIM8905
UART1_CTS
UART1_RTS
UART1_RXD
UART1_TXD
MIPI_DSI_LANE3P
MIPI_DSI_LANE3M
MIPI_DSI_LANE2P
MIPI_DSI_LANE2M
MIPI_DSI_LANE1P
MIPI_DSI_LANE1M
MIPI_CSI0_LN1_P
MIPI_CSI0_LN1_M
MIPI_CSI0_LN0_P
MIPI_CSI0_LN0_M
MIPI_CSI0_CLK_P
MIPI_CSI1_CLK_M
MIPI_CSI1_CLK_P
MIPI_CSI1_LN0_M
MIPI_CSI1_LN0_P
GND
CAM0_MCLK
GND
CAM_I2C_SDA
CAM_I2C_SCL
CAM1_PWDN
CAM1_RST_N
ACCL_INT2_N/GPIO_65
MAG_INT_N/GPIO_36
LDO5_1V8
ACCL_INT1_N/GPIO_96
PWRKEY GPIO_99
GPIO_58
GPIO_9
GPIO_10
GPIO_11
VBAT_RF
VBAT_RF
GND
GND
USB_VBUS
147
EAR_M
GND
148
149
150
151
152
153
154
179
180
181
182
195
196
197
198
163
164
165
166
167
168
169
170
187
188
189
190
203
204
205
206
171
172
173
174
175
176
177
178
191
192
193
194
207
208
209
210
155 156 157 158 159 160 161 162
183 184 185 186
199 200 201 202
RESERVED
POWER
SDC2 USB Others UART USIM AUDIO
GND
GPIO Antenna TP LCM Camera
RESET
MIC_BIAS1
MIC_BIAS2

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1.4. Picture
Figure 1: Top and Bottom view of SIM8905A

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1.5. Dimension
Figure 2: Dimention

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2. Detail Block Diagram
MSM8909
eMMC flash +
LPDDR3
EBI1
SDC1
GPIO
Keypad Buttons
I2C
SPI
UART * 2
4 Lanes DSI
2 Lanes CSI
1 Lanes CSI
USB
UIM1
UIM2
SDC2
Earpiece
Microphone
Headset
TP/Sensor/Cam/others
Vibrator
Keypad Buttons
CODEC
Linear
Charger
Output Power
Management
PM8909
19.2M XO
PDM BUS
Primary Camera (8MP)
720P LCD
Secondary Camera (5MP)
USB HS (Support OTG)
UIM Card2
SD Card
UIM Card1
VBUS_5V
VBAT
ADC
Speaker
4G/3G/2G MODEM
Core
MODEM/Voice
Processor
GNSS
Baseband
Modem
Jolokia
WWAN RX I/Q
GSM Phase
WWAN TX I/Q
RFFE
GNSS I/Q
WTR4905
Front End
MMMB
Power
Amplifier
Modele
RFFE
RFFE
3
rd
party
PA+SW
DIVERSITY
SWITCH
MODULE
MAIN
DRX
BT/WIFI
Baseband
Codec Digital
AP
Quad A7 w/ 512K L2
Camera ISP/VFE/Jpeg HW
Display Processor
Video
Graphics
Peripherals
SPMI BUS
Memory Support
Note2
Figure 3: Block diagram of SIM8905A
3. InterfaceApplication
Power Supply
The power supply pins of SIM8905A include VBAT_RF and VBAT_BB. VBAT_RF directly supplies the power
to RF PA; VBAT_BB supplies the power to the baseband system. The power supply of SIM8905A ranges from
3.4V to 4.4V, and 3.9V is recommended. It must be able to provide sufficient current up to 3A for the high-power
transmitting.
If the DC input voltage is +5V and customers do not care about the power efficiency, a high-current low-dropout
regulator is recommended. Figure 4 is the reference design.
Vin Vout
GND
FB
3
+
PWR_CTRL
R102
R101
VBAT
100K
47K
+C103
330uF
C104
100nF
U101 MIC29302
5
4
1
2
C101 C102
100uF 1uF
DC INPUT
R103
470R
On/Off
Figure 4: LDO power supply reference circuit
Note: To ensure a proper behavior of the regulator under light load, an extra minimum load (R103 in Figure 4)
is required, because the current SIM8905A consumed is very small in sleep mode and power off mode. For
more details about minimum load, please refer to specification of MIC29302.

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To increase power efficiency, the switching mode DC-DC converter is preferable, especially when DC input
voltage is quite high. The following figure is the reference design, and it is recommended to reserve a proper
ferrite bead (FB101 in Figure 5) in series for EMI suppression.
Vin Vout
FB
U101
12
3
4
5
LM2596- ADJ
+
100uH
MBR360
L101
C101
+
C102
D102 C103
R102
R101
FB101
330uF
VBAT
2.2K
1K
100uF 1uF
C104
100nF
270R@100MHz
DC INPUT
PWR_CTRL
GND
On/Off
Figure 5: DC-DC power supply reference circuit
For battery-powered application, the 3.7V lithium battery can be connected to SIM8905A VBAT pins directly, but
other types of battery must be used carefully, since their maximum voltage may rise over the absolute maximum
voltage of the module. When battery is used, the total impedance between battery and VBAT pins should be less
than 150mΩ.
In any case mentioned above, at the VBAT input pins side, please take Figure 6 as a reference:
5.1V
500mW
33pF
VBAT
VBAT_BB
GND
C101
C103
100uF
Module
D101
C105
220uF
VBAT_RF
Figure 6: VBAT input reference circuit
Where C101 is a 100uF tantalum capacitor with low ESR; C105 is a 220uF tantalum capacitor with low ESR;
33pF and 10pF capacitors are used for eliminating the high frequency interference; 5.1V/500mW zener diode can
protect the module against voltage surge.
All of these components should be placed as close to VBAT pins as possible.
Table 1: Recommended zener diode
Vendor
Part number
Power(watts)
Packages
1
On semi
MMSZ5231BT1G
500mW
SOD123
2
Prisemi
PZ3D4V2H
500mW
SOD323
3
Vishay
MMSZ4689-V
500mW
SOD123

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4
Crownpo
CDZ55C5V1SM
500mW
0805
Power on/off
Power on
Users can power on SIM8905A by pulling down the PWRKEY pin for more than 2 second then release. This pin
is already pulled up to 1.8V internally, so external pull up is not necessary. Reference circuits are shown as below:
4.7K
47K
PWRKEY
R
1.8V
1K
PMU
Module
Figure 7: Powered on/down module using transistor
PWRKEY
1K
Module
R
1.8V
PMU
Figure 8: Powered on/down module using button
The power on sequence is illustrated in Figure9
Software Controlled
VBAT
PWRKEY
Others
t>2s
LDO5_1V8
LDO6_1V8
250us
175ms

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Figure9: Timing of power on module
Power off
Users can power off SIM8905A by pulling down the PWRKEY pin for more than 8 seconds.
VRTC
VRTC is the power supply for RTC circuit and charger output for coin cell or backup battery. If RTC support is
needed when the battery is removed, a qualified coin cell or keep-alive capacitor is required on the VRTC pin.
When VBAT is present and valid, coin cell charging is enabled through software control and powered from VBAT.
Reference circuits are shown as below:
Keep-alive capacitor:
RTC
Module
VRTC
Capacitor
Figure 10: Keep-alive capacitor
Non-rechargeable battery:
RTC
Module
VRTC
Non-rechargeable
battery
Figure 11: Non-rechargeable battery
Rechargeable battery:
RTC
Module
VRTC
Rechargeable
battery
Figure 12: Rechargeable battery
VRTC typical voltage is 3.0V, and the current consumption is about 5uA when VBAT is absence. For electrical
characteristics, please refer to Table 23: VRTC characteristic.

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Output Power Management
Table 2: Output power management summary
Pin Name Pin# Specified range (V) Rated current (mA) Expected use
LDO5_1V8
111
1.8 50 Force USB boot
LDO6_1V8
125
1.8
200
Display, camera, sensors
SD_LDO11
38
2.95
600
SD/MMC card
SD_LDO12
32
1.8/2.95
50
For SD signals pull-up
USIM1_VDD
26
1.8/2.95
50
USIM 1
USIM2_VDD
21
1.8/2.95
50
USIM 2
LDO17_2V85
129
2.85
420
Display, camera, sensors
USB Interface
SIM8905A provides one High-speed USB 2.0 interface, used for software upgrading, debugging, charging, etc.
Module Connector
USB_DM
GND
GND
USB_VBUS VBUS
1uF
<1pF
USB_DP
USB_DM
USB_DP
USB_ID
Figure 13: USB reference circuit
In addition, SIM8905A supports OTG function, but external 5V power supply is required.

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Module Connector
USB_DM
GND
GND
USB_VBUS VBUS
<1pF
USB_DP
USB_DM
USB_ID
USB_ID
USB_DP
External 5V
Figure14: USB_OTG reference circuit
Linear Battery Charger
SIM8905A module integrates a 1.44A linear battery charger for single-cell lithium-ion batteries.
Charging Control
Battery charging is controlled by a PMIC state-machine. The first step in the automated charging process
determines if trickle charging is needed. Charging of a severely depleted battery must begin with trickle charging
to limit the current, avoid pulling VDD down, and protect the battery from more charging current than it can
handle. Once a minimum battery voltage is established using trickle charging, constant-current charging is enabled
to charge the battery quickly – this mode is sometimes called fast charging. Once the battery approaches its target
voltage, the charge is completed using constant-voltage charging.
VWEAK
VTRKL
3.2V
2.8V
VBAT
VBAT-MAX 4.2V
450mA/1440mA IBAT
IBAT-MAX
Time
TRKL-A TRKL-B CC CV
ITRKL-A 90mA
ITRKL-B 450mA
Figure15: Charging control diagram
Table 3: Linear battery charger performance specifications
Parameter
Comments
Min
Typ
Max
Units

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ITRKL-A
Trickle-A Charging current
81
90
99
mA
ITRKL-B
Trickle-B Charging current
405
450
495
mA
V
TRKL
Trickle-B threshold voltage range
Programmable, 15.62 mV steps
2.5 2.796 2.984 V
V
WEAK
Weak battery threshold range
Programmable, 18.75 mV steps
3.0 3.206 3.581 V
V
BAT_MAX
Maximum battery voltage
Programmable, 25 mV steps
4 4.2 4.775 V
I
BAT_MAX
Fast charging current range
Programmable, 90mA steps
90 1440 mA
VBAT_SNS
VBAT_SNS is used for battery voltage sensing, the typical input range is 2.5V~4.5V.
UART/SPI/I2C
SIM8905A provides several sets of GPIOs which are available as BLSP (BAM-enabled low-speed peripheral)
interfaces that can be configured to support various interface combinations, as shown in the following table. The
operation voltage is 1.8V
Table 4: UART/SPI/I2C functional assignments
Pin Name Pin# Expected or Default
Function Alternative Function 1 Alternative Function 2
UART2_TXD
94
BLSP1_UART_TX
BLSP1_SPI_MOSI
UART2_RXD
93
BLSP1_UART_RX
BLSP1_SPI_MISO
SENSOR_I2C_SDA
92
BLSP1_I2C_SDA
BLSP1_SPI_CS_N
BLSP1_UART_CTS
SENSOR_I2C_SCL
91
BLSP1_I2C_SCL
BLSP1_SPI_CLK
BLSP1_UART_RTS
GPIO_8
119
GPIO
BLSP6_SPI_MOSI
GPIO_9
118
GPIO
BLSP6_SPI_MISO
GPIO_10
117
GPIO
BLSP6_SPI_CS_N
BLSP6_I2C_SDA
GPIO_11
116
GPIO
BLSP6_SPI_CLK
BLSP6_I2C_SCL
GPIO_16
123
GPIO
BLSP5_SPI_MOSI
GPIO_17
124
GPIO
BLSP5_SPI_MISO
TP_I2C_SDA
48
BLSP5_I2C_SDA
BLSP5_SPI_CS_N
TP_I2C_SCL
47
BLSP5_I2C_SCL
BLSP5_SPI_CLK
UART1_TXD
34
BLSP2_UART_TX
BLSP2_SPI_MOSI
UART1_RXD
35
BLSP2_UART_RX
BLSP2_SPI_MISO
UART1_CTS
36
BLSP2_UART_CTS
BLSP2_SPI_CS_N
BLSP2_I2C_SDA
UART1_RTS
37
BLSP2_UART_RTS
BLSP2_SPI_CLK
BLSP2_I2C_SCL
CAM_I2C_SDA
84
BLSP3_I2C_SDA
CAM_I2C_SCL
83
BLSP3_I2C_SCL
Note:
1. UART: can be used as a diagnostic port, up to 4 Mbps;
2. I2C: supports master-only mode; up to 3.4 MHz, 2.2Kohm pull-up resistors are needed externally;

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3. SPI: supports master-only mode; up to 52 MHz.
Secure Digital Interface
SIM8905A provides one 4-bit secure digital interface, which supports the following standards:
SD Specifications Part 1 Physical Layer Specification Version 3.00
Part A2 SD Host Controller Standard Specification Version 3.00
Part E1 SDIO Specification Version 3.00
1 DAT2
2 DAT3
3 CMD
4 VDD
5 CLK
6 VSS
7 DAT0
8 DAT1
11 GND
12 GND
13 GND
14 GND
9 DET_SW
10 COMMON
SD Card
SD_DATA2
SD_DATA3
SD_CMD
SD_LDO11
SD_CLK
SD_DATA0
SD_DATA1
1M
SD_DET
LDO5_1V8
Module
1uF 33pF
TVS
C<15pF
Placed close to SD card
33R
33R is required for high-speed operation;
placed close to the module
NM NM NM NM NM
1uF
SD_LDO12
NM：Not Mounting
Reserved
Figure17: SD card reference circuit
Display Interface
SIM8905A provides a 4-lane MIPI_DSI, with 1.5 Gbps per lane high-speed mode bandwidth, to support 720p HD
display.
PWM is used as PWM control for external WLED driver.
Table 5: Display interface pin definitions
Pin Name
Pin#
Type
Description
PWM
29
O
PWM control for external WLED driver
LCD_RST_N
49
O
LCD reset
LCD_TE
50
I
LCD tear effect
MIPI_DSI_CLK_M
52
O
MIPI display serial interface
MIPI_DSI_CLK_P
53
O
MIPI_DSI_LANE0M
54
O
MIPI_DSI_LANE0P
55
O
MIPI_DSI_LANE1M
56
O
MIPI_DSI_LANE1P
57
O

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If only 2-lane MIPI_DSI is needed, just leave LANE2 and LANE3 floating.
1 GND
2 LED+
3 LED+
4 LED-
5 LED-
6 LCD_ID
7 VCC(2.8V)
8 GND
9 GND
10 VCC_IO
11 RESET
12 TE
13 NC
14 NC
15 GND
16 DSI_D1-
17 DSI_D1+
18 GND
19 DSI_CLK-
20 DSI_CLK+
21 GND
22 DSI_D0-
23 DSI_D0+
24 GND
25 GND
LCM
LED+
LED-
LCD_RST_N
LCD_TE
MIPI_DSI_LANE1_M
MIPI_DSI_LANE1_P
MIPI_DSI_CLK_M
MIPI_DSI_CLK_P
MIPI_DSI_LANE0_M
MIPI_DSI_LANE0_P
LDO17_2V85
1uF 1uF
LDO6_1V8
PWM
WLED
driver
VBAT
Module
1M
Figure 18: Display reference circuit
Touch Screen Interface
Table 6: Touch screen interface pin definitions
Note:
1. TP_I2C: supports master-only mode; 2.2Kohm pull-up resistors are needed externally;
MIPI_DSI_LANE2M
58
O
MIPI_DSI_LANE2P
59
O
MIPI_DSI_LANE3M
60
O
MIPI_DSI_LANE3P
61
O
Pin Name
Pin#
Type
Description
TP_I2C_SDA
48
I/O
Touch screen I2C data
TP_I2C_SCL
47
O
Touch screen I2C clock
TP_INT_N
30
I
Touch screen interrupt
TP_RST_N
31
O
Touch screen reset

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Camera Interface
SIM8905A supports two cameras: 2-lane MIPI_CSI primary camera up to 8MP resolution and 1-lane MIPI_CSI
secondary camera up to 5MP resolution.
Table 7: Camera interface pin definitions
Pin Name Pin# Type Description
MIPI_CSI0_CLK_M
63
I
Primary camera serial interface
MIPI_CSI0_CLK_P
64
I
MIPI_CSI0_LN0_M
65
I
MIPI_CSI0_LN0_P
66
I
MIPI_CSI0_LN1_M
67
I
MIPI_CSI0_LN1_P
68
I
MIPI_CSI1_CLK_M
70
I
Secondary camera serial interface
MIPI_CSI1_CLK_P
71
I
MIPI_CSI1_LN0_M
72
I
MIPI_CSI1_LN0_P
73
I
CAM0_MCLK
74
O
Primary Camera master clock
CAM1_MCLK
75
O
Secondary Camera master clock
CAM0_RST_N
79
O
Primary Camera reset
CAM0_PWDN
80
O
Primary Camera power down
CAM1_RST_N
81
O
Secondary Camera reset
CAM1_PWDN
82
O
Secondary Camera power down
CAM_I2C_SCL
83
O
Camera I2C clock
CAM_I2C_SDA
84
I/O
Camera I2C data

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LDO17_2V85
LDO6_1V8
AGND
VCM
AVDD
DVDD
VDD_IO
GND
MCP
MCN
GND
MDP0
MDN0
GND
MDP1
MDN1
GND
MCLK
RESET
PWDN
MIPI_CSI0_CLK_P
MIPI_CSI0_CLK_M
MIPI_CSI0_LN0_P
MIPI_CSI0_LN0_M
MIPI_CSI0_LN1_P
MIPI_CSI0_LN1_M
CAM0_MCLK
CAM0_RST_N
CAM0_PWDN
100nF 100nF2.2uF
Primary
Camera
Module
2.2uF
2.2K 2.2K
CAM_I2C_SCL
CAM_I2C_SDA
SCL
SDA
Figure 19: Primary camera reference circuit
Audio
SIM8905A provides two microphone inputs and three outputs including earpiece, stereo headphones, and mono
class-D speaker driver.
Table 8: Audio interface pin definitions
Pin Name Pin# Type Description
EAR_P
8
O
Earpiece output, positive
EAR_M
9
O
Earpiece output, negative
HPH_R
136
O
Headphone output, right channel
HPH_GND
137
I
Headphone ground reference
HPH_L
138
O
Headphone output, left channel
HS_DET
139
I
Headset detection
GND_MIC
5
P
Microphone input 2 ground reference
MIC2P
6
I
Microphone input 2, positive
MIC1P
4
I
Microphone input 1, positive
SPK_M
11
O
Speaker driver output, negative
SPK_P
10
O
Speaker driver output, positive
MIC_BIAS1
194
O
Microphone bias 1
MIC_BIAS2
210
O
Microphone bias 2

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Microphone
Electret
Microphone
route as differential pair
& shielded by GND
Close to microphone
MIC1P
Module
GND_MIC
ESD
ESD
10pF
33pF
33pF
33pF
10pF
10pF
Figure 20: Microphone reference circuit
Note:
1. Internal MIC_BIAS pull-up is used to reduce BOM cost and PCB routing.
2. Single-ended capless input is the only supported configuration, but differential routing is recommended.
Table 9:Analog microphone input performance
Parameter
Test conditions
Min
Typ
Max
Units
Microphone amplifier gain = 0 dB (minimum gain)
Input referred noise
Single-ended, A-weighted, capless
-
19.3
25.1
µVrms
Signal-to-noise ratio
Single-ended, A-weighted, capless
92.0
94.0
-
dB
THD+N ratio
Analog input = -1 dBV f = 1.02 kHz; single-ended input; 200 Hz to
20 kHz bandwidth; capless
-
-86.0
-70.0
dB
Microphone amplifier gain = 6 dB
Input referred noise
Single-ended, A-weighted, capless
-
5.9
7.1
µVrms
Signal-to-noise ratio
Single-ended, A-weighted, capless
91.0
92.5
-
dB
THD+N ratio
Analog input = -1 dBV
f = 1.02 kHz; single-ended input;
200 Hz to 20 kHz bandwidth; capless
-
-85.0
-70
dB
Microphone amplifier gain = 24 dB (maximum gain)
Input referred noise
Single-ended, A-weighted, capless
-
3.4
4.2
µVrms
Signal-to-noise ratio
Single-ended, A-weighted, capless
84.2
85.4
-
dB
THD+N ratio
Analog input = -1 dBV
f = 1.02 kHz; single-ended input;
200 Hz to 20 kHz bandwidth; capless
-
-82.4
-76.0
dB
General requirements

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Full-scale input voltage
Single-ended 1 kHz input. Input signal
level required to get 0 dBFS digital output
-0.5
0
0.5
dBV
Input impedance
Capless input
Input disabled
1.0
3.0
-
-
-
-
MΩ
MΩ
Input capacitance
Capless input
-
-
15
pF
Headset
Stereo class-AB headphone supports 16 Ω, 32 Ω, and up to 50 KΩ loads. Its typical output power at 1.02 KHz and
THD + N ≤1% is:
21.5 mW with 16 Ω loads, 0 dBFS and -4.5 dB gain
30.8 mW with 32 Ω loads, 0 dBFS and 0 dB gain
A 100KΩpull-down resistor is integrated at HPH_L pin, which could be used for mechanical insertion or removal
detection through HS_DET pin. Figure 22 shows the reference circuit for normally-closed (NC) type headset jack.
HPH_R
Module
HPH_L
0R
0R
HS_DET
MIC2P
GND_MIC
HPH_GND
100K
33pF 33pF 33pF
Headset Jack
TVS
Close to headset jack
1000 OHM@100MHZ
1000 OHM@100MHZ
1000 OHM@100MHZ
1000 OHM@100MHZ
1000 OHM@100MHZ
1000 OHM@100MHZ
Figure 21: Headset reference circuit
Note:
1. SIM8905A also supports NO/NC type headset jack with detect pin on HPH_L or GND.
2. HPH has a negative swing and requires a bi-directional TVS diode.
Table 10: Headphone output performance specifications
Parameter
Test conditions
Min
Typ
Max
Units
Output power
16 Ωload f = 1.02 kHz, 0 dB FS; VDD_CP* = 1.95 V
15.6
21.5
25.5
mW
32 Ω load f = 1.02 kHz, 0 dB FS; VDD_CP* = 1.95 V
27.0
30.8
32.0
mW
Full-scale
output Voltage
16 Ωload f = 1.02 kHz, 0 dB FS; VDD_CP* = 1.95 V
0.50
0.59
0.64
Vrms
32 Ωload f = 1.02 kHz, 0 dB FS; VDD_CP* = 1.95 V
0.96
0.99
1.00
Vrms
Output load
13.0
16/32
-
Ω