ST STM32L1 Series Installation and operating instructions

March 2016 DocID027094 Rev 3 1/58
1
AN4612
Application note
Migrating from STM32L1 Series to STM32L4 Series
microcontrollers
Introduction
For designers of STM32 microcontroller applications, it is important to be able to easily
replace one microcontroller type by another one in the same product family. Migrating an
application to a different microcontroller is often needed when product requirements grow by
putting extra demands on memory size or increasing the number of I/Os. On the other hand,
cost reduction objectives are also be an argument to switch to smaller components and
shrink the PCB area.
This application note analyze the steps required to migrate an existing design from
STM32L1 Series to STM32L4 Series. It groups the most important information and lists the
vital aspects that need to be addressed.
This document lists the “full set” of features available for the STM32L1 and the equivalent
features on STM32L4 Series when available.
In order to migrate an application from STM32L1 Series to STM32L4 Series, these three
aspects need to be considered: the hardware migration, the peripheral migration and the
firmware migration.
To fully benefit from the information in this application note, the user should be familiar with
the STM32 microcontrollers documentation available on www.st.com, with focus on:
STM32L1 Series:
•STM32L1xx reference manual (RM0038)
•STM32L1xx datasheets
•STM32L1 Flash and EEPROM programming manual (PM0062)
STM32L4 Series:
•STM32L4x6 reference manual (RM0351)
•STM32L4x3 reference manual (RM0394)
•STM32L4x2 reference manual (RM0393)
•STM32L4xx datasheets.
www.st.com

Contents AN4612
2/58 DocID027094 Rev 3
Contents
1 STM32L4 Series overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Hardware migration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Boot mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Peripheral migration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 STM32 product cross-compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.4 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.5 RCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.5.1 Performance versus VCORE ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.5.2 Peripheral access configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.5.3 Peripheral clock configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.6 PWR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.7 RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4.8 SYSCFG and RI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.9 GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4.10 EXTI source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4.11 FLASH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.12 U(S)ART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.13 I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.14 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.15 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.16 AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.17 LCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.18 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4.19 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
4.20 DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
4.21 COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.22 OPAMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

DocID027094 Rev 3 3/58
AN4612 Contents
3
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

List of tables AN4612
4/58 DocID027094 Rev 3
List of tables
Table 1. Product category overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Packages available on STM32L4xx series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. STM32L1 Series and STM32L4 Series pinout differences (QFP) . . . . . . . . . . . . . . . . . . . . 8
Table 4. STM32L1 Series and STM32L4 Series pinout differences (BGA) . . . . . . . . . . . . . . . . . . . . 9
Table 5. Boot modes for STM32L4 Cat. 2 devices and STM32L1 lines . . . . . . . . . . . . . . . . . . . . . . 14
Table 6. Boot modes for STM32L4 Cat. 4 devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7. Bootloader interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series . . . . . . . . . . . 17
Table 9. Peripheral address mapping differences between STM32L1 Series
and STM32L4 Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. DMA request differences migrating STM32L1 Series
to STM32L4 Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 11. Interrupt vector differences between STM32L1 Series
and STM32L4 Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 12. RCC differences between STM32L1 and STM32L4 Series . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 13. Performance versus VCORE ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 14. RCC registers used for peripheral access configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 15. PWR differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . . . 34
Table 16. RTC differences between STM32L1 Series and STM32L4 Series. . . . . . . . . . . . . . . . . . . 37
Table 17. SYSCFG differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . 38
Table 18. EXTI differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . . . 39
Table 19. FLASH differences between STM32L1 Series and STM32L4 Series. . . . . . . . . . . . . . . . . 40
Table 20. U(S)ART differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . 42
Table 21. I2C differences between STM32L1 Series and STM32L4 Series. . . . . . . . . . . . . . . . . . . . 44
Table 22. SPI differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . . . . 45
Table 23. Migrating from I2S to SAI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 24. CRC differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . . . 49
Table 25. AES differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . . . . 50
Table 26. USB differences between STM32L1 Series and STM32L4 Series. . . . . . . . . . . . . . . . . . . 51
Table 27. ADC differences between STM32L1 Series and STM32L4 Series. . . . . . . . . . . . . . . . . . . 52
Table 28. DAC differences between STM32L1 Series and STM32L4 Series. . . . . . . . . . . . . . . . . . . 54
Table 29. COMP differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . . 55
Table 30. OPAMP differences between STM32L1 Series and STM32L4 Series . . . . . . . . . . . . . . . . 56
Table 31. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

DocID027094 Rev 3 5/58
AN4612 List of figures
5
List of figures
Figure 1. LQFP144 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 2. LQFP100 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 3. LQFP64 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4. LQFP48 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. BGA132 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. BGA100 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. BGA64 compatible board design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Generation of clock for SAI master mode (in case MCLK is needed). . . . . . . . . . . . . . . . . 48

STM32L4 Series overview AN4612
6/58 DocID027094 Rev 3
1 STM32L4 Series overview
The STM32L4 Series forms a perfect fit in terms of ultra-low-power, performances, memory
size, and peripherals at a cost effective price.
In particular, the STM32L4 Series allows higher frequency/performance operation than
STM32L1 Series, including a Cortex®-M4 @80 MHz versus Cortex®-M3 @32 MHz and
optimized Flash memory access through the adaptive real-time memory accelerator (ART
Accelerator™).
The STM32L4 Series products are divided in categories as per Table 1. This is done in
order to easily refer to each group of products in the rest of the document.
The STM32L4 Series includes a larger set of peripherals with advanced features and
optimized power consumption compared to the STM32L1:
•Touch sensing controller (TSC)
•Controller area network (bxCAN)
•Single wire protocol interface (SWPMI)
•Serial audio interface (SAI)
•Low-power UART (LPUART)
•Infrared interface (IRTIM)
•Low-power timer (LPTIM)
•Digital filter for sigma delta modulators (DFSDM)
•Voltage reference buffer (VREFBUF)
•Quad-SPI interface (QUADSPI)
•Firewall (FW)
•Additional SRAM2 (32 KB for Cat. 2 devices, 16 KB for Cat. 4 devices) with data
preservation in Standby mode
•Clock recovery system (CRS) for USB (for Cat. 4 devices)
The Cat. 4 devices implement a reduced set of features compared to the Cat. 2 devices:
•No FMC (external memory controller for static memory)
•SRAM1 limited to 48KB instead of 96KB on Cat. 2 devices
•No Digital filter for sigma delta modulators (DFSDM)
•USB FS instead of OTG FS
It also provides optimized power consumption and enriched set of low-power mode.
Table 1. Product category overview
Type Part number
Category 2(1)
1. Category 2 devices are referred as “Cat. 2” devices within this document.
STM32L476xx, STM32L486xx
Category 4(2)
2. Category 4 devices are referred as “Cat. 4” devices within this document.
STM32L433xx, STM32L443xx, STM32L432xx, STM32L442xx

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AN4612 STM32L4 Series overview
57
This migration guide is only covering migration from STM32L1 to STM32L4 and as a
consequence new features present on STM32L4 Series but not already present on
STM32L1 are not covered in this document (please refer to the STM32L4 reference
manuals and datasheets for an exhaustive picture).
STM32L4 increases low-power efficiency in dynamic mode (μA/MHz) still reaching very low
level of static power consumption on various available low-power modes.
The detailed list of available features and packages for each product can be found in the
respective datasheet.

Hardware migration AN4612
8/58 DocID027094 Rev 3
2 Hardware migration
Only LQFP48, LQFP64, LQFP100, LQFP144, BGA64, BGA100, BGA132 are available on
both families. The other packages available on STM32L1 family are not available on
STM32L4 family.
The list of available packages in the STM32L4 Series is listed in below Table 2
The ultra-low-power STM32L4 and STM32L1 Series present a high level of pin
compatibility. Most peripherals share the same pins in the two series.
The transition from the STM32L1 Series to the STM32L4 Series for QFP and BGA
packages is easy since only a few pins are different (refer to Table 3 and Table 4).
For the WLCSP packages the transition is less easy because the pinout is different. This is
due to the fact that devices of STM32L1 Series and STM32L4 Series have different die
sizes.
asdf
Table 2. Packages available on STM32L4xx series
STM32L4xx
Size (mm x mm) Applicable lines
Cat. 2 Cat. 4
UFQFPN32 - x (5x5) STM32L432xx, STM32L442xx
LQFP48 - x (7x7) STM32L433xx, STM32L443xx
UFQFPN48 - x (7x7) STM32L433xx, STM32L443xx
WLCSP49 - x (3.141 x 3.127) STM32L433xx, STM32L443xx
WLCSP64 - x (3.141 x 3.127) STM32L433xx, STM32L443xx
LQFP64 x x (10x10) STM32L433xx, STM32L443xx
STM32L476xx, STM32L486xx
UFBGA64 - x (5x5) STM32L433xx, STM32L443xx
WLCSP72 x - (4.4084 x 3.7594) STM32L476xx, STM32L486xx
WLCSP81 x - (4.4084 x 3.7594) STM32L476xx
LQFP100 x x (14x14) STM32L433xx, STM32L443xx
STM32L476xx, STM32L486xx
UFBGA100 x x (7x7) STM32L433xx, STM32L443xx
UFBGA132 x - (7x7) STM32L476xx, STM32L486xx
LQFP144 x - (20x20) STM32L476xx, STM32L486xx
Table 3. STM32L1 Series and STM32L4 Series pinout differences (QFP)
STM32L1 Series STM32L4 Series
QFP
48
QFP
64
QFP
100
QFP
144 Pinout QFP 48(1)
QFP
64
QFP
100
QFP
144 Pinout
1 1 6 6 VLCD 1 1 6 6 VBAT
- - - 95 VDD - - - 95 VDDIO2(2)

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AN4612 Hardware migration
57
- - - 131 VDD - - - 131 VDDIO2(2)
- - 73 106 PH2 - - 73 106 VDDUSB(2)
36 48 - - VDD 36 48 - - VDDUSB(2)
44 60 94 - BOOT0 44 60 94 - PH3-BOOT0(1)
1. Only for cat. 4 devices
2. VDDIO2 and VDDUSB pins can be connected externally to VDD.
Table 4. STM32L1 Series and STM32L4 Series pinout differences (BGA)
STM32L1 Series STM32L4 Series
BGA64 BGA100 BGA132 Pinout BGA64(1)
1. Only for cat. 4 devices
BGA100(1) BGA132 Pinout
B2 E2 E2 VLCD B2 E2 E2 VBAT
- - G7 VDD - - G7 VDDIO2(2)
2. VDDIO2 and VDDUSB pins can be connected externally to VDD.
- C11 C11 PH2 - C11 C11 VDDUSB(2)
--G3PF6- - G3 PG11
--G4PF7- - G4 PG6
--H4PF8- - H4 PG7
--J6PF9- - J6 PG8
- - K1 NC - - K1 PG15
G1 - - VREF+ G1 - - PC3
E5 - - VDD E5 - - VDDUSB(2)
H1 - - VDDA H1 - - VDDA / VREF+
B4 A4 - BOOT0 B4 A4 - PH3-BOOT0(1)
Table 3. STM32L1 Series and STM32L4 Series pinout differences (QFP) (continued)
STM32L1 Series STM32L4 Series
QFP
48
QFP
64
QFP
100
QFP
144 Pinout QFP 48(1)
QFP
64
QFP
100
QFP
144 Pinout

Hardware migration AN4612
10/58 DocID027094 Rev 3
Recommendations to migrate from STM32L1 Series board to a STM32L4
Series board
VLCD pin in STM32L4 Series is now multiplexed on PC3 GPIO (pin 29 on QFP144, pin 18
on QFP100, pin 11 on QFP64, pin K2 on BGA132/BGA100) through alternate function
programming in STM32L4 Series.
This implies that other functions in STM32L4 Series PC3 pins cannot be used on PC3 when
LCD is used by the application.
This also implies that the STM32L1 Series PC3 related alternate functions, if used by the
application, should be mapped onto other STM32L4 Series pins.
VBAT or VDD supply (if no specific VBAT power is used), should now be connected to:
•pin 6 (QFP144 and QFP100)
•pin 1 (QFP64/QFP48)
•pin E2 (BGA132/BGA100).
•pin B2 (BGA64)
GPIO PH2 is now used for dedicated VDDUSB power supply
•pin 106 (QFP144)
•pin 73 (QFP100)
•pin C11 (BGA132)
GPIO PH2 cannot be used as regular GPIO anymore (no PH2 GPIO in STM32L4 Series).
On BGA132, several GPIOs from STM32L1 Series are mapped on different GPIOs in
STM32L4 Series:
•PF6 (pin G3) mapped to PG11 on same pin
•PF7 (pin G4) mapped to PG6 on same pin
•PF8 (pin H4) mapped to PG7 on same pin
•PF9 (pin J6) mapped to PG8 on same pin
On BGA64, ball G1 used for VREF+ signal on STM32L1 Series is now used as GPIO PC3
(multiplexed with VLCD) on STM32L4 Series and the VREF+ signal is multiplexed with
VDDA on ball H1.
Also not connected (NC) pin K1 in STM32L1 Series can now be used as GPIO PG15 in
STM32L4 Series.
The boot pins are different in both families. The BOOT0 is multiplexed with PH3 GPIO on
STM32L4 family (Cat. 4 devices). Please refer to Section 3: Boot mode selection on
page 14 for details. Those changes do not impact the board design.
The figures below show examples of board designs migrating from STM32L1 Series to
STM32L4 Series.

DocID027094 Rev 3 11/58
AN4612 Hardware migration
57
Figure 1. LQFP144 compatible board design
Figure 2. LQFP100 compatible board design
Figure 3. LQFP64 compatible board design
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Hardware migration AN4612
12/58 DocID027094 Rev 3
Figure 4. LQFP48 compatible board design
Figure 5. BGA132 compatible board design
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DocID027094 Rev 3 13/58
AN4612 Hardware migration
57
Figure 6. BGA100 compatible board design
Figure 7. BGA64 compatible board design
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Boot mode selection AN4612
14/58 DocID027094 Rev 3
3 Boot mode selection
Both STM32L1 and STM32L4 Series can select boot modes between three options: boot
from main Flash memory, boot from SRAM or boot from system memory.
However, the way to select the boot mode differs between the products.
In the STM32L1 lines, the boot mode is selected with two pins BOOT0 and BOOT1.
In the STM32L4 Cat. 2 devices, the boot mode is selected with 1 pin BOOT0 and the
nBOOT1 option bit located in the user option bytes at memory address 0x1FFF7800.
In the STM32L4 Cat. 4 devices, the boot mode is selected with nBOOT1 option bit and pin
BOOT0 or nBOOT0 option bit depending on the value of the nSWBOOT0 option bit in the
FLASH_OPTR register as shown in table below.
Table 5 and Ta ble 6 summarizes the different configurations available for selecting the boot
mode.
Table 5. Boot modes for STM32L4 Cat. 2 devices and STM32L1 lines
L4/L1 boot mode selection
Boot mode Aliasing
BOOT1(1)
1. The BOOT1 value is the opposite of the nBOOT1 option bit.
BOOT0
x 0 Main Flash memory Main Flash memory is
selected as boot space
0 1 System memory System memory is
selected as boot space
1 1 Embedded SRAM Embedded SRAM is
selected as boot space
Table 6. Boot modes for STM32L4 Cat. 4 devices
nBOOT1
FLASH_OPTR
[23]
nBOOT0
FLASH_OPTR
[27]
BOOT0 pin
PH3
nSWBOOT0
FLASH_OPTR
[26]
Main Flash
empty(1)
Boot Memory
Space Alias
xx010
Main Flash
memory is
selected as
boot area
xx011
System
memory is
selected as
boot area
x1x0x
Main Flash
memory is
selected as
boot area

DocID027094 Rev 3 15/58
AN4612 Boot mode selection
57
Embedded bootloader
The embedded bootloader is located in the system memory, programmed by ST during
production. It is used to reprogram the Flash memory using one of the following serial
interfaces:
0x11x
Embedded
SRAM1 is
selected as
boot area
00x0x
Embedded
SRAM1 is
selected as
boot area
1x11x
System
memory is
selected as
boot area
10x0x
System
memory is
selected as
boot area
1. A Flash empty check mechanism is implemented to force the boot from system Flash if the first Flash
memory location is not programmed (0xFFFF FFFF) and if the boot selection was configured to boot from
the main Flash.
Table 7. Bootloader interfaces
Peripheral Pin STM32L1 STM32L4
DFU USB_DM (PA11)
USB_DP (PA12) XX
USART1 USART1_TX (PA9)
USART1_RX (PA10) XX
USART2 USART2_TX (PD5)
USART2_RX (PD6) X-
USART2 USART2_TX (PA2)
USART2_RX (PA3) -X
USART3 USART3_TX (PC10)
USART3_RX (PC11) -X
I2C1 I2C1_SCL (PB6)
I2C1_SDA (PB7) -X
I2C2 I2C2_SCL (PB10)
I2C2_SDA (PB11) -X
Table 6. Boot modes for STM32L4 Cat. 4 devices (continued)
nBOOT1
FLASH_OPTR
[23]
nBOOT0
FLASH_OPTR
[27]
BOOT0 pin
PH3
nSWBOOT0
FLASH_OPTR
[26]
Main Flash
empty(1)
Boot Memory
Space Alias

Boot mode selection AN4612
16/58 DocID027094 Rev 3
Please refer to AN2606 for more details on the bootloader.
For smaller packages please verify pin and peripheral availability.
I2C3 I2C3_SCL (PC0)
I2C3_SDA (PC1) -X
SPI1
SPI1_NSS (PA4)
SPI1_SCK (PA5)
SPI1_MISO (PA6)
SPI1_MOSI (PA7)
-X
SPI2
SPI2_NSS (PB12)
SPI2_SCK (PB13)
SPI2_MISO (PB14)
SPI2_MOSI (PB15)
-X
SPI3
SPI3_NSS (PA15)
SPI3_SCK (PC10)
SPI3_MISO (PC11)
SPI3_MOSI (PC12)
-X
CAN1 CAN1_RX (PB8)
CAN1_TX (PB9) -X
Table 7. Bootloader interfaces (continued)
Peripheral Pin STM32L1 STM32L4

DocID027094 Rev 3 17/58
AN4612 Peripheral migration
57
4 Peripheral migration
4.1 STM32 product cross-compatibility
The STM32 series embeds a set of peripherals which can be classified in three categories:
•The first category is for the peripherals that are common to all products. Those
peripherals are identical on all products, so they have the same structure, registers and
control bits. There is no need to perform any firmware change to keep the same
functionality at the application level after migration. All the features and behavior
remain the same.
•The second category is for the peripherals that present minor differences from one
product to another (usually differences due to the support of new features). Migrating
from one product to another is very easy and does not require any significant new
development effort.
•The third category is for peripherals which have been considerably modified from one
product to another (new architecture, new features...). For this category of peripherals,
migration will require new development at application level.
Table 8 gives a general overview of this classification.
The “software compatibility” mentioned in the table below only refers to the register
description for “low level” drivers.
The STMCube™ hardware abstraction layer (HAL) between STM32L1 and STM32L4
Series is compatible.
Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series
Peripheral
Nb
inst.
in L1
Nb
inst.
Cat.
2/4
Compatibility
(migrating from STM32L1 Series to STM32L4 Series)
Software Pinout Comments
SPI
I2S
3
2
3
0Partial compatibility Partial compatibility
I2S is no more supported by SPI but
replaced by dedicated Serial Audio
Interface (SAI) in STM32L4 Series.
Some alternate function not mapped on
same GPIO for SPI1.
WWDG 11
Full Compatibility NA -
IWDG 11
Full Compatibility NA -
DBGMCU 11
Full Compatibility NA -
CRC 11
Partial compatibility NA Additional features in STM32L4 Series.
EXTI 11Partial compatibility Full compatibility Only PH2 GPIO not available as EXTI
input in STM32L4 Series.
USB FS 10/1
Partial compatibility Full compatibility Additional features on STM32L4 Cat. 4
devices.
USB OTG
FS 01/0
No compatibility Full compatibility New peripheral (OTG FS) on STM32L4
Cat. 2 devices.

Peripheral migration AN4612
18/58 DocID027094 Rev 3
DMA 12Full Compatibility NA
Same features.
DMA mapping request may differ (see
Section 4.3: DMA).
TIM
Basic
General P.
Advanced
Low-power
9
2
7
-
-
13
2
7/3
2/1
2
Full Compatibility Partial compatibility
Some pins not mapped on same GPIO.
Timer instance name may differ.
Internal connections may differ.
SDIO 1 1 Full Compatibility Partial compatibility Some pins not mapped on same GPIO.
FSMC/
FMC 11/0
Full Compatibility Full Compatibility
Only SRAM/NOR supported in STM32L1
Series.
NAND supported in STM32L4 Series.
PWR 11
Partial compatibility NA -
RCC 11
Partial compatibility NA -
USART 33
Partial compatibility Full Compatibility Additional features in STM32L4 Series.
UART 22/0
1 (LP) Partial compatibility Full Compatibility Additional features in STM32L4 Series.
Additional LPUART in STM32L4 Series.
I2C 23
No compatibility Full Compatibility Additional features in STM32L4 Series.
DAC 22Partial compatibility Full Compatibility
Additional features in STM32L4 Series.
SW compatible except for output buffer
management.
ADC 13/1
No compatibility Partial compatibility Additional features in STM32L4 Series.
Some pins mapped on different GPIOs.
RTC 11
Partial compatibility Full Compatibility
Additional features in STM32L4 Series.
Can be powered by VBAT in STM32L4
Series.
FLASH 11
No compatibility NA New peripheral.
GPIO
Up to
115
IOs
Up to
114/8
3 IOs
Full compatibility Partial compatibility
at Reset, STM32L1 Series configured in
input floating mode, STM32L4 Series in
analog mode.
A few changes mentioned in Section 2:
Hardware migration.
LCD glass 11
Full compatibility Partial compatibility
VLCD muxed on PC3 GPIO.
SEG21 not mapped on same GPIO.
Additional features in STM32L4 Series.
COMP 22
No compatibility Partial compatibility Some pins mapped on different GPIOs.
SYSCFG 11
Partial compatibility NA -
AES 1 1 Full compatibility NA Additional features in STM32L4 Series.
Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series (continued)
Peripheral
Nb
inst.
in L1
Nb
inst.
Cat.
2/4
Compatibility
(migrating from STM32L1 Series to STM32L4 Series)
Software Pinout Comments

DocID027094 Rev 3 19/58
AN4612 Peripheral migration
57
OPAMP 32/1No compatibility Partial compatibility Some pins not mapped on same GPIO.
One less OPAMP in STM32L4 Series.
Color key:
= No compatibility (new feature or new architecture)
= Partial compatibility (minor changes)
= Full Compatibility (from STM32L1 Series to STM32L4 Series)
= not applicable
Table 8. Peripheral compatibility analysis STM32L1 Series versus STM32L4 Series (continued)
Peripheral
Nb
inst.
in L1
Nb
inst.
Cat.
2/4
Compatibility
(migrating from STM32L1 Series to STM32L4 Series)
Software Pinout Comments

Peripheral migration AN4612
20/58 DocID027094 Rev 3
4.2 Memory mapping
The peripheral address mapping has been changed in the STM32L4 Series versus the
STM32L1 Series.
The table below provides the peripheral address mapping correspondence between
STM32L1 and STM32L4 Series.
Table 9. Peripheral address mapping differences between STM32L1 Series
and STM32L4 Series
Peripheral
STM32L1 Series STM32L4 Series
Bus Base address Bus Base address
FSMC (FMC in STM32L4
Series)
AHB
0xA0000000 AHB3 0xA0000000(1)
AES 0x50060000 AHB2 0x50060000
DMA2 0x40026400
AHB1
0x40020400
DMA1 0x40026000 0x40020000
Flash memory Interface 0x40023C00 0x40022000
RCC 0x40023800 0x40021000
CRC 0x40023000 0x40023000
GPIOG 0x40021C00
AHB2
0x48001800(1)
GPIOF 0x40021800 0x48001400(1)
GPIOH 0x40021400 0x48001C00
GPIOE 0x40021000 0x48001000
GPIOD 0x40020C00 0x48000C00
GPIOC 0x40020800 0x48000800
GPIOB 0x40020400 0x48000400
GPIOA 0x40020000 0x48000000
USART1
APB2
0x40013800
APB2
0x40013800
SP1 0x40013000 0x40013000
SDIO (SDMMC in
STM32L4 Series) 0x40012C00 0x40012800
ADC1 (ADC123 in
STM32L4 Series) 0x40012400 AHB2 0x50040000
TIM11 0x40011000
NATIM10 0x40010C00
TIM9 0x40010800
EXTI 0x40010400
APB2
0x40010400
SYSCFG 0x40010000 0x40010000