Synopsys DesignWare 826-0 User manual

5.60a
March 2020
DesignWare®PCIe IP Prototyping Kit
Installation Guide
dw_ipk_dwipk_pcie – Product Codes: E826-0
E825-0
C368-0
C369-0
C046-0
E025-0
E026-0
E027-0
E827-0
E828-0

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Copyright Notice and Proprietary Information
© 2020 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use,
reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
Destination Control Statement
All technical data contained in this publication is subject to the export control laws of the United States of America. Disclosure to nationals
of other countries contrary to United States law is prohibited. It is the reader's responsibility to determine the applicable regulations and
to comply with them.
Disclaimer
SYNOPSYS, INC., AND ITS LICENSORS MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE.
Trademarks
Synopsys and certain Synopsys product names are trademarks of Synopsys, as set forth at
https://www.synopsys.com/company/legal/trademarks-brands.html
All other product or company names may be trademarks of their respective owners.
Free and Open-Source Software Licensing Notices
If applicable, Free and Open-Source Software (FOSS) licensing notices are available in the product installation.
Third-Party Links
Any links to third-party websites included in this document are for your convenience only. Synopsys does not endorse and is not
responsible for such websites and their practices, including privacy practices, availability, and content.
Synopsys, Inc.
www.synopsys.com

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PCIe IP Prototyping Kit Installation Guide Contents
Contents
Chapter 1
Setting Up Hardware Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Product Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
1.1 Contents of PCIe IP Prototyping Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
1.2 Hardware Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
1.2.1 Setting Up HAPS-80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
1.2.2 Setting Up PCIe Root Complex IP Prototyping Kits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
1.2.3 Setting Up PCIe Endpoint IP Prototyping Kits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Chapter 2
Setting Up Software Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
2.1 Licensing and Tool Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.2 Setting License File Environment Variable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
2.3 Installing dw_ipk_dwipk_pcie . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
2.3.1 Setting Up Your Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
2.3.2 Extracting the Release Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
2.4 Creating a Workspace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
2.5 PCIe IP Prototyping Kit Directory Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Chapter 3
Installing Software Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
3.1 Connecting to ARC SDP/ARC HSDK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
3.1.1 Installing the Adept Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
3.2 Starting ARC SDP/ARC HSDK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
3.3 Where to Go Next . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Appendix A
Status LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
A.1 HAPS-80 Supervision LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
A.2 HAPS-80 Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
A.3 ARC SDP Board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
A.4 ARC HSDK Development Kit Board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

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1
Setting Up Hardware Components
The PCIe IP Prototyping Kit provide hardware and software elements required to assemble a PCIe Root
Complex, and PCIe Endpoint prototyping platforms. Designers can rapidly develop, test, and debug IP
software before SoC availability. The kit is a complete and stand-alone solution that requires minimal
configuration.
This document provides the necessary information to set up the PCIe IP Prototyping Kit.
This document is divided in the following sections:
■“Contents of PCIe IP Prototyping Kit” on page 7
■“Hardware Setup” on page 16
Note
NoteNoteNote
Before setting up the hardware components, make sure you read the DesignWare PCIe IP
Prototyping Kit Release Notes.

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Setting Up Hardware Components PCIe IP Prototyping Kit Installation Guide
Product Codes
Table 1-1 lists the products and product codes for the DesignWare PCIe IP Prototyping Kit.
Table 1-1 Product Codes for DesignWare PCIe IP Prototyping Kit
Base Product Product Code
DesignWare PCIe Gen2 Root Complex Controller on HAPS-80, Xilinx Gen2 PHY, AXI tunnel to
ARC SDP
C368-0
DesignWare PCIe Gen2 Endpoint Controller on HAPS-80, Xilinx Gen2 PHY, with PCIe connection
for PC
C369-0
DesignWare PCIe Gen3 Root Complex Controller on HAPS-80, C10 PHY, AXI tunnel to ARC SDP E026-0
DesignWare PCIe Gen3 Root Complex Controller on HAPS-80, Xilinx Gen3 PHY, AXI tunnel to
ARC SDP
E027-0
DesignWare PCIe Gen3 Endpoint Controller on HAPS-80, C10 PHY, with PCIe connection for PC E025-0
DesignWare PCIe Gen3 Endpoint Controller on HAPS-80, Xilinx Gen3 PHY, with PCIe connection
for PC
C046-0
DesignWare PCIe Gen4 Root Complex Controller on HAPS-80, E16 PHY, AXI tunnel to
ARC SDP
E826-0
DesignWare PCIe Gen4 Endpoint Controller on HAPS-80, E16 PHY, PCIe connection for PC E825-0
DesignWare PCIe Gen5 Root Complex Controller on HAPS-80, E32 PHY, AXI tunnel to ARC HS E828-0
DesignWare PCIe Gen5 Endpoint Controller on HAPS-80, E32 PHY, with PCIe connection to PC E827-0

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1.1 Contents of PCIe IP Prototyping Kit
This section provides details about the contents of the prototyping kits.
Figure 1-1 shows PCIe Root Complex IP Prototyping Kit recommended components for the kits using
Synopsys PHY on HAPS-80
Figure 1-1 PCIe Root Complex IP Prototyping Kit Components with Synopsys PHY on HAPS-80
Attention
All PCIe IP Prototyping Kits were developed for use with HAPS FPGA board.
The HAPS, ARC SDP Mainboard and the PHY Daughter Card contain static sensitive
devices. Handle with care.
Electrostatic discharge (ESD) can damage the IP Prototyping Kit components. Perform
the procedures described in this section at an ESD workstation using an anti-static wrist
strap and a conductive foam pad.

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Figure 1-2 shows the PCIe Endpoint IP Prototyping Kit recommended components for the kits using
Synopsys PHY on HAPS-80.
Figure 1-3 shows the PCIe Root Complex IP Prototyping Kit recommended components for the kits using
the Xilinx PHY on HAPS-80.
Figure 1-2 PCIe Endpoint IP Prototyping Kit Components with Synopsys PHY on HAPS-80
Note
NoteNoteNote
The Synopsys PCIe PHY can be a Synopsys C10 PHY, a Synopsys E16 PHY or a E32 PHY
board.
See Table 1-2 for more details.

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Figure 1-3 PCIe Root Complex IP Prototyping Kit Components with Xilinx PHY on HAPS-80
Figure 1-4 shows the PCIe Endpoint IP Prototyping Kit recommended components for the kits using the
Xilinx PHY on HAPS-80.

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Figure 1-4 PCIe Endpoint IP Prototyping Kit Components with Xilinx PHY on HAPS-80
HAPS-80
SD
Card
PCIE-8_PDL_MGB
PCIe x8 Extender Cable
RISER1_MGB