Tandy TRS-80 Model II User manual

CUSTOM MANUFACTURED IN U.S.A. BV RADIO SHACK, ADIVISION OF TANDV CORPORATION

----------- TRS-aO ® -----------
TRS-80~ Multiterminal Interface Service Manual
Copyright 1983 Tandy Corporation
AlI Rights Reserved
Reproduction or use, without express written permission from
Tandy Corporation, or any portion of this manual is
prohibited. While reasonable efforts have been taken in the
preparation of this manual to assure its accuracy, Tandy
Corporation assumes no liability resulting from any errors
or omissions in this manual, or from the use of the
information contained herein.
-----------lIadlO lIIaeIi ----------

Multiterminal Interface ~~~.~~ ® ~~~~~_S_e_r_v_i_c_e~M_a_n_u_a~l~
TABLE OF CONTENTS
Sec Description Page
1/ Gener al . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2/ Installation. ................................... 3
2.1 Software Requirements...................... 3
2.2 Installation............................... 3
2.3 Setting Up Multiple TerminaIs.............. 6
2.4 Connecting A Terminal To The Computer...... 7
2.5 Checking Installation...................... 7
2.6 Enabling A Terminal........................ 9
2.7 Disabling A Terminal 10
2.8 Model II to 16 Conversions 10
3/ Theory of Operation............................. Il
3.1 USART Circuitry Il
3.2 Baud Rate Generator 16
3.3 RS-232c Interface ..•....................... 16
3.4 Loopback Circuit ..................•........ 18
3.5 Processor Interface........................ 18
Schematic 8000198 21
Component Layout .......•...•..............• 23
Circuit Trace, Component Side 24
Circuit Trace, Solder Side 25
Parts List................................. 26
4/ Troubleshooting 29
----------lIadI8 lhaelÏ ----------
- i -

_M_u_l_t_i_t_e_r_m_i_n_a_l_I_n_t_e_r_f_a_c_e_ TRS-SO ® S_e_r_v_i_c_e_M_a_n_u_a_l __
LIST OF FIGURES
No.
Description
2-1 Multiterminal Interface Board
Page No.
Installation. ••••••••••••.••••••••••••••••• 4
2-2 DIP Switch Settings............................ 5
2-3 Typical System Installation.................... 8
LIST
OF TABLES
3-1
Programming
Parameters
(Page
l of
4 ) . . . . . . • . . . .
12
Programming
Parameters
(Page
2
of
4 ) . . • . . . . . . . .
13
Progralnming
Parameters
(Page
3
of
4 ) . . . . . • . . . . .
14
Programming
Parameters
(Page
4
of
4 ) . . • • . . • • . . .
15
3-2
Baud Rate
Gener a tor ••••••••••••••••••••••••••••
17
----------lIadI8 lhaelÏ----------
- ii -

__ M_u_l_t_1_
e
t_e_rl!Wlllm_i_n_a_l_I_n_t_e_r_f_a_c_e_ TRS-SO ®
1/ General
Service Manual
The Multiterminal Interface Board (26-6013) al10ws the Model
16/16B to interface with up to three additional terminaIs.
This capability, combined with the XENIX OS multitasking
capability, allows up to six independent operators to have
access to the features contained in a single Model 16/16B.
This results in a cost savings per terminal and the added
advantage of a shared data base.
The Multiterminal Interface Board is basically a three-port
RS-232C seriaI interface to the a-bit Z80A Model 16/16B
Peripheral Processor.
The normal mode of operation as defined by software is full
duplex, asynchronous transmission with a baud rate range
from 50 to 9600. The computer interface is interrupt
driven. On the reception or transmission of any character,
an interrupt is created and the character is stored to or
retrieved from a memory buffer.
The Multiterminai Interface Board is mounted in the Card
Cage assembly which is internaI to the Computer. Since the
Multiterminal Interface Board must be in the interrupt
chain, its priority position in the card cage must be as
noted in the chart below to preserve this daisy-chaining
action. If one of the boards listed in the first three
positions is not present, then the other boards move up a
slot. If a board position is not critical, i.e. it is not a
part of the interrupt cycle, its priority position is noted
as "None". Physical positioning of the board in the card
cage in the Model 16B is from the bottom (JI) to the top
(J7) •
Priority Pos.
1
2
3
4
5
6
7
8
9
Description
ARCNET
Hard Disk Interface
Multiterminal Interface
Graphics
Video/Keyboard Interface
256K Memory Board
256K Memory Board
256K Memory Board
16 Bit CPU Board
priority
1
2
3
None
None
None
None
None
None
----------lIadlo/haelÏ ---------
- l -

Multiterminal Interface TRS-SO ® S_e_r_v_i_c_e_M_a_n_u_a_l_
----------lIadlelllaell----------
- 2 -

__ M_u_I_t_i_t_e_r_m_1_' n_a_I_I_n_t_e_r_f_a_c_e_ TRS-SO ~-'
2/ Installation
Service Manual
Included in the following pages are instructions for
installing and interconnecting the Multiterminal Interface
PCB in the Model 16 Radio Shack Computer. This option
allows you to interconnect as many as five additiona1
terminaIs to the computer so that acommon data base may be
used by aIl terminaIs. Refer to the TRS-XENIX Operator's
Manual for operating instructions for the system.
2.1. Software Requirements
The only current operating system offered by Radio Shack
which supports this board is TRS-XENIX, Version 01.03.00 or
higher. You must upgrade your system to at least a version
01.03.00.
If you already have the XENIX Operating System, it is
necessary to modify it using a software update diskette
(Catalog No. 700-2066) which modifies a 1.1 or 1.2 system to
a version 01.03.00 System.
If you do not have the XENIX Operating System, it will be
necessary to purchase the XENIX Version 01.03.00 Core System
(Gatalog No. 700-2052).
2.2. Installation
The following instructions are given to allow proper
installation of the Mu1titerminal Interface Board, check out
its function to ensure proper operation, and perform
modifications required to the Main Terminal to al10w
communication between it and the remote termina1(s).
The Multiterminal Interface Board is installed in a Model 16
or 16B in the card cage assemb1y. It is accessible when the
rear cover is removed from the Model 16B Case Assemb1y, or
the top cover from the Model 16.
----------IIMIOIhaeIl----------
- 3 -

__ M_u_l_t_1_
e
t_e_r_m_1_
e
n_a_l __ I_n_t_e_r_f_a_c_e_ TRS-SO ®
Service Manual
Rear View
::>
>
-e
>
Q)
~
~
::>
~
00
(J
en
J!
~
ca ca
ëe
uE0E
't
u
0
Q)
ca
Q)
Q)
-e
~
~
0~0~
~
c
ai
0
Q)
.E
ca
0
co
~
'"C
~
ni ::I: U
cO
Multiterminal
co
co
:>
ai
c
~
co
cO
°ê
en
Interface ë
Board
Q)
>
~
Q.
:E
Q.
:1
0
~ Li:
Model16
Rear View
68000
CPU
16-Bit Memory
16-Bit Memory
Option
Video Board
Multiterminal Interface
Hard Disk
or
Upgraded Model 12
Figure 2-1.
Multiterminal Interface Board Installation
----------lIadlo IlIaelÏ----------
- 4 -

Multiterrninal Interface ~~~.~~ ® ~~~~~_s_e_r_v_i_c_e~M_a_n_u_a_l~_
1. Rear Cover Removal
Model 16
Turn the computer so that the rear is facing you to
allow access to the top cover. Remove the top cover by
unscrewing the two mounting screws. Lift up and ta the
rear on the top cover to gain access.
Insert Multiterminal Interface PCB as noted in Figure
2-1.
Model 16B
Turn the computer so that the rear is facing you ta
allow access to the rear cover. Remove the two
mounting screws at the 10wer part of the rear cover.
Lift out on the bot tom of the cover plate and pull
down.
2. Remove the card holding brackets from either side of
the card cage to allow the Multiterminal Interface
board to be installed. Attach the cable end(s) to the
connector(s) on the Multiterminal Interface Board. The
DIP switch SI must be set for the proper operation as
noted in Figure 2-2. Slide the board into the
connector slot as shown in Figure 2-1. The
Multiterminal Interface board must be in the interrupt
chain. Therefore, there must be no empty slots between
the board and JI. The Multiterminal Interface board
must be in JI if no other boards are present.
J1 J2 J3
Jumpers must
be in place
OFF
ON
E7-E8
El0-E11
DIP Switch
InllJ Inl
E13-E14
S1-0N
S2-Sa - OFF
Figure 2-2. DIP Switch Settings
----------lIadI8 Ihaell-----------
- 5 -

Multiterminal Interface TRS-SC ®
Service Manual
3. Loosen the screws which mount the Strain Relief Bracket
to the Rear Door. Feed the cable(s) from the remote
unit(s) between the Strain Relief Bracket and the Rear
Door and tighten the screws mounting the Bracket.
Allow enough cable to the inside of the bracket to
provide an internaI loop.
2.3. Setting Up Multiple TerminaIs
The Xenix system is programmed to accommodate a wide range
of terminal types -- but the system has to know what kind of
terminaIs are connected to it so that it can calibrate
itself to the terminal's particular characteristics and
capabilities.
The console is automatically set to accommodate two DT-I
terminaIs. TRS-XENIX calls them the "Adds25" terminal type,
and expects the terminaIs you connect to be set to the
DT-I's Adds25 emulation mode. That information is stored in
aTRS-XENIX file called /etc/ttytype. If you're connecting
a DT-l to the console, just follow connection instructions
and proceed directly to enabling your terminal (see
paragraph 2.6). If, however, you're connecting a terminal
other than a DT-l, you have to let TRS-XENIX know.
A file called /etc/terrncap stores the characteristics of aIl
commonly used terminaIs. The following list gives the names
and codes for the terminaIs pre-configured in /etc/termcap:
NAME
VT 100
VT 52
ADM 3a
ADM 5
Televideo 910
ADDS 25
CODE
vt100
vt52
adm3a
adm5
tvi910
adds25
To let TRS-XENIX know what kind of terminal you'll be using,
edit the /etc/ttytype file to include one of the above
names. At that point, TRS-XENIX can work with your terminal
-- just as soon as you've enabled it.
---------lIadlelhaell---------
- 6 -

__ M_u_1_t_1._' t_e_r_m_i_n_a_1_I_n_t_e_r-f-a-c-e_ TRs-aD ® S_e_r_v_i_c_e_M_a_n_u_a_I __
2.4. Connecting A Terminal To The Computer (see Figure 2-3)
First, check which connector you're using for the terminal.
If it is either SeriaI Channel A or B, you will need an
RS-232 cable (Cat. No. 26-4403) and a null modem adapter
(Cat. No. 26-1496) for each terminal.
1. Connect one end of the RS-232 cable to the terminal's
RS-232 jack.
2. Connect the other end of the cable to the female plug
of the null modem adapter.
3. Connect the adapter's male plug to either SeriaI
Channel A or B of your computer.
4. If the computer requires it (check the owner's manual),
insert a Terminator Plug into any unused SeriaI
Channel.
If the terminal connects to one of the three connectors on
the Multiterminal Interface pca, you will need only the
RS-232 cable assembly.
2.5. Checking Installation
Correct installation of the Multiterminal Interface is ensured
when the following commands typed into the computer running
XENIX produce the noted responses.
Type in the following command*:
disable ttyOX (enter)
Response
There will be no response or the following error message
will appear:
disable: ttyOX is already disabled
disable: /etc/ttys not updated (which is OK)
* OX = one of the tty terminaIs, either 4, 5 or 6.
For example, tty04.
----------lIadI8 lhaell----------
- 7 -

Multiterminal Interface ~~~_~~ ® ~~~~~S_e_r_v_1_·c_e~M_a_n_u_a_l~_
Terminal No. 6
B
RS-232 Cable
26-4403
Terminal No. 5
Terminal No. 2
T-T~
Alternate Connection
Multiterminal Interface
PCB
Terminal No. 4
Figure 2-3. Typical Installation, Multiterminal
Interface Board
-----------Iadlelllaell----------
- 8 -

__ M_u_l_t_i_t_e_r_m_i_n_a_l_I_n_t_e_r_f_a_c_e_ TRS-SO ®
Type in the following command:
cat /etc/ttys >/dev/ttyOX (enter)
Response (on terminal OX)
Ihconsole
09ttyOl
09tty02
09tty04
09ttyOS
09tty06
Service Manual
(or something similar -- it should look the same as if
"cat /etc/ttys" were typed without any output
redirection)
2.6. Enabling A Terminal
Before you can use a terminal, it must be enabled. To
enable a terminal connected at SeriaI Channel A, type:
enable ttyOI <ENTER>
To enable a terminal connected at SeriaI Channel B, type:
enable tty02 <ENTER>
For any terminaIs connected to the Multiterminal Interface
PCB, type:
enable
tty04
<ENTER>
(for terminal connected
to JI)
or
enable
ttyOS
<ENTER>
(for terminal
connected
to J2)
or
enable tty06
<ENTER>
(for terminal connected
to J3)
Then you're ready to use the terminal with TRS-XENIX.
----------lIadI8 lhaelÏ ----------
- 9 -

Multiterrninal Interface ~~~_~~® ~~~~~~S~e_r_v~1_'c~e~_M_a_n~u~a_l~_
2.7. Disabling A Terminal
If you have to disconnect a terminal from the main computer
for any reason, be sure you first disable it. Again, check
the connector the terminal is using, and at the main
terminal type:
disable ttyOl
thru
disable tty06
(Remember: There is no tty03)
(for SeriaI Channel A)
(for terminal connected
to J3)
and proceed to disconnect the remote terminal connector from
the main computer connector.
2.8. Model II to 16 Conversions
The Model II can be used to test the Multiterminal Interface
board provided sorne precautions are taken.
There is a dual addressing problem in early Model II VDG
boards that makes ports 7CH-7FH be interpreted as ports
FCH-FFH. This is only on Rev A and Rev B VDG boards. To
correct this, a jumper has to be installed from pin l to pin
10 of IC27 on the VDG board. This will not affect the
normal operation of the Model II.
The test software MULTERM for the Multiterminal Interface
board was written for ports 70H-7EH. TRS-XENIX also uses
70H-7EH for the first board. If this is in an older Model
II with a Rev A or Rev B VDG board OR if a Model
II/12/16/16B has an older video board installed, it will
cause a problem testing the board or attempting to run
TRS-XENIX without the jumper mentioned above on these older
VDG boards.
----------lIadlO IhaelÏ ----------
- 10 -

__ M_u_l_t_i_t_e_r_m_i_n_a_l_I_n_t_e_r_f_a_c_e_ TRS-SD ®
3/ Theory Of Operation
Service Manual
The Multiterminal Interface Board can be functionally
divided into five parts: (1) USART circuitrYi (2) Baud Rate
Generatori (3) RS-232C Interface circuitrYi (4) Loopbacki
and (5) zao Interface. See Intel Specification a25lA and
Model II Technical Reference Manual, SIO Section.
3.1 USART Circuitry
The USART (Universal Synchronous Asynchronous Receiver
Transmitter) is a Medium Scale Integrated Circuit (MSI)
which accomplishes aIl of the required transformation of
seriaI and parallel data under CPU directions. The USART
circuit can be divided into four parts: (1) the CPU
interface logici (2) the Transmitter logici (3) the Receiver
logici and (4) the Modem Control logic. The schematic
designators for the USARTs are U16, U17, and U19.
3.1.1 CPU Interface Logic
The CPU Interface logic links the two major parts -- the
transmitter and the receiver -- with the Zao CPU. The zao
CPU, by read/write operations, issues configuration/
parameter commands and transmitter data, and reads status
and receiver data. Configuration commands, for example,
specify the transmission mode (asynchronous) and
transmission characteristics (number of characters, stop
bits, etc.). See Table 3-1 for the programming parameters.
3.1.2 Transmitter Logic
The transmitter serial1y shifts out the character data
stored in the transmitter buffer at the applied baud clock
rate. When the transmitter buffer is empty, it sets the TX
RDY signal. The TX RDY signal is connected to an interrupt
which is used to request another character from the CPU.
Transmission is controlled either internally by the TX
Enable flag controlled by the CPU or possibly by external
RS-232 signaIs DSR/DCD and CTS received by the modem control
logic.
----------lIa«l18 lhaell----------
- Il -

__ M_u_l_t_i_t_e_r_rn_l._
e
n_a_l_I_n_t_e_r_f_a_c_e_ TRS-SO ®
Service Manual
BAUD RATE GENERATOR
ADDRESS
DATA
70
CHANNEL 0, LSB BYTE, MSB BYTE
71
CHANNEL 1, LSB BYTE, MSB BYTE
72
CHANNEL 2, LSB BYTE, MSB BYTE
73 COMMAND WORD
COMMAND WORD
716514312110
0110
1111
t-
ZW
-J
:::> :::>
~
0
-J
Z
0
~
NU
~
e" w
-J
-J
..J
t-
0>w
0.
WWW
en
w
Z Z ZZ
~
a:
t-
en
-J
>0
zzzwww
:::>
-J
u
t-
U
~~~
a:
a:
t-
0.
:::>
>
~
m
~
::I: :I:
a:
0z
t-
0.
U
t-
Il
:::> :::> :::>
en
>
~
~
""u"
t-
00
:::>
t-
0
t- t-
t-
:I: w"0
:::>
a: >
u
(.) (.)
"
:::>
0
a:
:::>
0
a:
wwW
..J
WW
..J
-J
..J
t-
~
«
t-
z
'*'
t-
~
www«>0z
t-
0ZZ
en en
CI)
-J
..J
:::>
zLn
:::>
m
..
..
000Il
0
....
00 ~
00
~
0 ....
uuu0
Note 1: Bit 4, 5=0, Bit 0-3 = DON'T CARE
Note 2: Counter Value ReadlWrite in
two
consecutive bytes, LSB first.
Table 3-1. programming Parameters (page l of 4)
----------lIadI8 lhaelÏ ----------
- 12 -

__ M_u_l_t_l._" t_e_r_rn_i_n_a_l_I_n_t_e_r_f_a_c_e_ TRS-SD ®
Service Manual
INTERRUPT CONTROLLER
ADDRESS
DATA
74
CHANNEL 0CTC CONTROL/INTERRUPT VECTOR
75
CHANNEL 1CTC CONTROL/INTERRUPT VECTOR
76 CHANNEL 2 CTC CONTROL/INTERRUPT VECTOR
77
NOT USED
CONTROL WORD:
76543210
1
z
a:
C' -0
w
a:
Ww
l-
I-
1-0
Zw1-
>0
<t
a:
:>
CJ
"
en~
a:
0
w
~
w
w00CI)
I-a:
0-
1-
-J
UWWU00u
en
=>
U)
a:
0
Zw
a:
w
<t
Il
~
Ln
a:
Il
a:
..J
<t~
CI) 0>
N
z
....
<t
w
....
wU
1--
:>
~
l-
Il
e,:,
CI) 1- 0
w>
....
C'
e,:, Il
z-
=>
-J
0-
1- w
a:
e,:,
....
oCI) z0:>
0-
..J
W
a:
us:
a:
:>
en
a:
..J
t::
-J
a:
0
~
1-
a: a:
<t
w
l-
wO
w
1-
a:
«
-J
1-
ZCI) w
a:
~ w
~
U
~
<t
a:
:>
~-J
0WZ
1-
U)
U_..J 0
W00
l-
CI)
LL
W«
1-0
u
a:
~
w
....
0U
l-
Il
0
Il
a:
Il
-J
Il ~Il Il
LL
Il Il Il
Z
~
~
Il
00 0-
0U00
....
0
....
....
0
TIME CONSTANT: ~
1
L-
E]
111 1 1B
INTERRUPT VECTOR:
y-
I0
1111
VECTOR DATA
u
O .... NM
1-
-J-J..J..J U
owwww
>
-zzzz
en
..Jzzzz
0
w<t<t<t<t
w
Z::I:::I:::I:::I:
1-
Z U U U u·
a:
<t Il
Il
Il
Il
W
::I:
o
....
o
....
CI)
U 00 ........ z
-
Table 3-1. Programming Parameters (page 2 of 4)
----------lIadI8/haell----------
- 13 -

__ M_u_l_t_i_t_e_r_rn_l._
e
n_a_l_I_n_t_e_r_f a_c_e_ TRS-SO ®
Service Manual
USART
ADDRESS
DATA
78
CHANNEL 0, RECEIVE, TRANSMIT CHARACTER
7A
CHANNEL 1, RECEIVE, TRANSMIT CHARACTER
7C CHANNEL 2, RECEIVE, TRANSMIT CHARACTER
79
CHANNEL 0, USART MODE/COMMAND/STATUS
78
CHANNEL 1, USART MODE /COMMAND/STATUS
7D CHANNEL 2, USART MODE/COMMAND/STATUS
MODE
716 5 4312110
1001110
X
.-
M
J:
C
CD
~
Il
Il
.-
t-
CD
CI)
::l
Il
Il
a:
.-
Il C' Il Il
<t
.-
.-
.-
ma:
.-
w0
.-
>wz
.-
.-
0
m>
~
..J
W0
.-
~O
~
m
..J
ot-
:E a:
::l
c
a:
~
~
a:
ZO
z
..J
~ ~
zw
>~
~
~
w
t-
CI) LI. 0
~
z>
(J
~w
ZX
>cw
~
"""t-
>
CD
mzc>
t-
a:
Ln
.........
(J~
CI)
.-
~ -N0W
~
0
Il Il
a:
Il Il
za:
Il Il
Il
Il
~
J:
00>0 0
t-
00CI)
CI) 0
.-
0
.-
~
(J
0
.-
0
.-
COMMAND
0
t:
w
:E
~
CI)
a:
wz
0
(J
~
a:
w
a:
w
a:
a:
w
t-
(J
..J
::l
::l
w
~~
ww
a:
t-
..J
a:
..J
t-
t-
:E~
m
...
m
ww
CI) CI) CI)
a:w
~
a:
~
w
t-
w
Oa:
z
t-
z
a: a:
a:
Zm
wcW
Il Il Il Il Il Il Il Il
.- .-
.-
0.-
.-
.- .-
Table 3-1. programming Parameters (page 3 of 4)
----------lIadI8/I1aell----------
- 14 -

__ M_u_l_t_i_t_e_r_m_i_n_a_l_I_n_t_e_r_f_a_c_e_ TRS-aO ®
USART (con't)
Service Manual
ADDRESS
79, 78, 70 (con't)
1
STATUS
DATA
7E
76543210
~
«
w
a:
a:
a:
00ww
m
a: a:
:J
~
WIl
a:
z
a:
>
a:
a:
:J
ct w
:J
w
....
....
....
a:
....
w
a:
>
~
>>
....
ct ~
a:
t:
~
cc
a:
c«w
a:
w
a: a:
(1)
X a:
>«xx>
c
a:
u- 0
~
....
a:
....
Il Il Il
Il
Il
Il
Il
Il
~~
~
~
~
~
~
~
LOOPBACK COMMAND
LOOP8ACK COMMAND
xXXXX X X
1111 1 1
~
(.)
«
m
0-
0
0
-J
Il
~
7F NOT USED
Table 3-1. Programming Pararneters (page 4 of 4)
----------lIa«l18 Ihaell-----------
- 15 -

Multiterminal Interface ~~~.~~® ~~~~~~S~e~r~v~1~'c~e~~M~a~n~u~a~1~_
3.1.3 Receiver Logic
The receiver serially shifts seriaI data in, using the
applied baud clock (in this particular operation, it is
multiplied sixteen times). When the "start" bit sequence is
detected, the next data character bits are stored in the
receive buffer. When a complete character is stored, the RX
ROY signal is set. The RX RDY signal is applied to an
interrupt (the same interrupt as the TX ROY) requesting the
CPU to read the character. Reception is controlled by the
RX Enable flag and reception of data character.
3.1.4 Modem Control Logic
The Modem Control logic handles the RS-232C handshaking
signaIs 05R/DCD, DTR, CT5, and RTS. The state of the source
signaIs DTR and RTS is controlled by the Z80 CPU. These
four signaIs are used to control the flow of data around the
dedicated link.
3.2 Baud Rate Generator
The Baud Rate Generator U18 is an MS! IC that consists of
three independent programmable counters. Each counter is
hard-wired to a specifie U5ART. The counter output is
applied to the USART TX and RX clocks. The frequency output
of each counter is a fractional portion of the applied clock
frequency. The fraction is programmed individually into
each counter by the CPU (therefore, each can have a
different baud rate frequency). The input clock is 2.000
MHz divided from the 4 MHz on the Z80 bus. The BCD values
for the different baud rate frequencies are noted in Table
3-2. See Intel Specification 8253.
3.3 R5-232C Interface
The R8-232c Interface logic consists of buffers and
receivers which convert from/to the digital logic levels to
the +/-12 Vdc levels of the R8-232C. The buffers are the
1488 ICs U2, U4, and U7. The buffers which transmit the
data and clocks have a capacitor on their output. The
purpose of this capacitor is to increase the rise time of
the signaIs to reduce cross-coupling. The receivers are the
1489 ICs Ul, U3, and U6. The receivers for the control
signaIs have resistor terminations to one of the power
----------Iadlelllaell----------
- 16 -