Tektronix PG 508 User manual

Te k
tronix, Inc
.
Ρ .
Ο .
Box500
B eaverton,
O
r
egon 97077

Serial Nu mber
070-2044-00

Fi
r st Pr i n ting NO V 197 5

fektronix, Inc ., fjonverton,
,
~d
i t , i, < O tji,ited
States of America . All
Q Q rese"ed .
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may not
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SECTIO N 1
REV . Β , APR . 1977
SE CTIO N 2
F ig . 1 E x p lode d V iew
F ig . 2 Accessories
FORMATION
R EP L ACEABLE EL E
CTRICA L

Page
P AR
TS
L IST
S
ERV
IC E INFORMATION
Sym b ols an d
R
efe r ence Designators

4-1
Ge
n
eral M
ainte n
ance a nd Adju stme n ts

4-2
Services Availa b
le

4-2
M ai n te n an ce

4-2
Ci r c u it B oard R emoval

4-2
Test E qui p me n t

4-2
Ge n e ral

4-2
I n ter n al Ad j ustment Pr oce dur e

4-2
I npu t B oa rd P a r ts L ocatio n Gri d
Co n t r ols and Co nn ectors
Transition B oa rd P a rts L ocatio n Gri d
B loc k Diag r a m
Timi n g B oard P arts L ocatio n Gri d
Rea
r I n te r face Co nn ector Assign me n ts
Outp u t
B oard P
a r ts L ocatio n G r i d
I npu t Sc h ematic
P eriod Ge n erator Sc h e m atic
Delay Ge ne r ato r Sc h ematic
D uratio n Generato r Sc h ematic
V a ria b
le
T r
an sitio n Ti m e Ge n erator Sc h ematic
L evel Co n t r ol Mu lti p lier Sc h e m atic
O u t pu t A mp lifier Sc h e m atic
Track i n g V oltage S upp lies Sc h ematic
P owe r Supp ly Sc h
ematic
REPL AC E A BL E M E
C
H AN ICA L
PA
R TS L IST
P G 508
O P ERATI NG I N STRU CTIO N S P age S E CTIO N 3
I n st ru me n t Description 1-1
I n stallatio n and Re m oval 1-1
SECTIO N 4
BASIC OPERATION
Pe r io d and Dur atio n Selectio n 1-2
D u ty Facto rs 1-2
Delaye d
an
dP
ai r ed Pu lse Selectio n 1-2
Tra n sitio n Time Selectio n 1-3
O u t pu t L evels 1-3
Exter n al Triggeri ng a nd Gati n g 1-3
T r igger O u t pu t 1-4
Manual Tr igger 1-4
Co n trol E r r or L ig h t 1-4
O PER ATI N GCO N SID ERATIONS
O u t pu t Termi n ations and Con n ections 1-4
R ise Time M easu r e m e n ts i n L i n ea r
Syste m s 1-5
E xte rn al V oltage Co n t rol 1-5
Cou n te dBu rst
U si
ng t h
e
DD
501
Digital Delay Un it 1-5
Defi n itio n s of Pu lse C h a r acte r istics 1-8
SPE CI F ICATIO N S 1-9
THE
OR
Y
O
F
OPERATION
I n tro du ctio n
2-1
I npu t Ci r c u itry
2-1
TRIG'D/GATED L ig h t
Ci
r cu it r y 2-1
Trigge r ed M ode 2-1
P
erio d Ge n erator 2-2
Delay Ge n erato r
2-2
D ur atio n Ge n erator 2-2 S
E CTIO N 5
D ur atio n and Delay Co n trol E rro r Lig h t
Ci
r
cu
it r
y 2-3
V a r ia b le Transitio n Time Circuitry
2-3
Tra n sitio n Time Co n trol E r r o r L ig h t
Circ u itry 2-3
L evel Co n t rol Mu lti p lier 2-5
O u t pu t Am p lifier 2-6
P ower S upp ly 2-6 C H A NGE I

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Instru m en t Description
Th eP G 508 is α 50 MH z
ge
n
eral
pu
r pose full fu n ction
pulse generator usable in all TM
500-series p ower
modules exce p t t h e TM 501 . It is co m p atible wit h M
OS
a nd
ot
h
er ge n eral pu r p ose circ u itry . Im p orta n t featuresof
t he i n strume n t include
indepen d ent perio d and d uratio n
con trols wit hα co n trol error lig h t, inde p endent pu
lse to p
and bottom level co n trols, varia b le leading an d trailing
t r
ansitio n time ad j ustme n ts, an d f u lly a d j usta b le pulse
d
elay ca p abilities . F ront pa n el controls a nd con n ectors
p rovi d e α trigger
or sync h ronous gate in p ut wit h level an d
slope controls, square wave
outp ut and com p leme n tary
p ulse o u t pu t for h ig hduty
factors
.
Delaye d and p aire d
pu lse an d man u al trigger
or gate ca p abilities are also
provi d ed . All i n p uts an d outp uts are i n ter n ally termi nated
in 50
Ω
exce p t t h e TRIG/GAT E i np ut w h ic h is internally
selecta b le
foreither 50
Ω
o r 1
ΜΩ ,
20 pF i np ut impe d ance .
Special positio ns
on
PER
IOD, D UR ATIO N
,
DE L AY, an d
TRA N SITIO N controls p ermit customize
d co n trol ranges .
T he fro n t p a n el is color code d for easy refere nce to
con trols a n d t h eir associated f u nctio ns . Gree n in d icates
triggeri ng
fu n ctio
ns
an d blue in d icates mode fu n ctio ns .
Installation an d R emoval
T he P G 508 is calibrated
an d ready for use w hen
received . It operates in
any two com
p
artme n ts of t he
ΤΜ 500-series power mod u les
.
See t h ep ower
module
instruction manual for li ne voltage r e q uireme n ts a nd
p ower module o p eratio n . F ig . 1-1 s h ows t he installation
a nd r
e
m
oval proce d ure . M ake certai n t he power mo d ule is
off
w
h e
n
inserti
ng or
removing t he P G 508 . C heck t h att h e
P
G 508 is fully inserte d in t h e power module . Pull the
p ower switch
on
t he
p
ower
mo du le .
T he P
O
WER lig
h
t
on
t he P G 508 sh o u ld
now
be
on .
R efe r
to
t he
Co
n trols
and
Connectors fol d o u t page i n Sectio n 4 of t h is manual for α
com p lete description of t he front panel controls a nd
co nnectors .
F ig . 1-1 . PG 508 i n stallatio na nd R e m oval .
Section 1---PG 508

Operating
In st r uctio n s-PG 508
P eriod an d Du r ation
Selection
To d eter m i n e t h e custo m ca p acitor
val ue m u lti p ly the desi r ed d u r ation o
r
d elay time b y 1 Χ
10-2 .
See text .
T he p erio d ge n erato r ope r ates, in
all mo des exce p t ΕΧΤ
TRIG o r MAN, at α rate set by
t he PER IOD ra nge switc h
an d va r iable co n t r ol
. T he d uratio n of t he output pulse is
set b y t he DURATION
r ange switc h an d va r iable control
.
Wh en t
he
DURATION
control is set fo r αtime
greater t han
t h ePER IOD, t h e CO N TRO L ERRO R lam p
will lig h t . Wh en
t he D UR ATIO N co n trol is set to t he SQ W
A VE positio n , t h e
du
r ation time is d ete rm i ned i
n
ternally
at a p pr oximately
50 ο/ο of t he p erio d ti m e .
T h
e custom range positio
ns on t he PER IOD a n d
D U RATIO N controls permit u ser-selecte d pe r iod a nd
d uratio n times . To d etermine t he a pp roximate ca p acitor
value for
t he d esired
p
eriod, multi p ly t h e p e r io d time in
seco
n
ds
b y 5 Χ 10 - ' . T he result is t h evalue of t hecapacitor
i nF arads .
F
or
example, α 50 ms p e r io d times 5Χ 10 -'
eq uals 250 Χ 10 -6 or 250 μ F . T h is capacitor mustbe non-
polarized and h ave at least α 6
V r ating . Solde r t h is
ca p acitor i n t he p ositio
nsh own i n F ig . 1-2 .
To d etermine t he capacitor
value for t he d uration time
d esire d , multi p ly t h e
duration time by 1 Χ 10 -2 . F or
example α 50 ms duration
time re q uires 50 ms times 1
Χ
P
erio
d
;"AT
Ι Ν
10 -2 or α 500 μ F ca p acitor
. If α p olarize d ca p acitor is use
d ,
observe t
he
correct
p ola r ity . Use at least α 6V
rated
cap acitor
. Co nnect t h is cap acitor as sh ow
n i n F ig . 1-2 .
Duty F actors
Duty factors
greater t han t h ose sp ecifie
d are ob-
taina b le on several ranges . Wh en
t h e du ty facto r is
inc r eased to t h e point
t h at i n ter n al circuitry pr eve n ts
completio n of t h e pulse
waveform, the CO N TRO L ERRO R
lig h t will flas h . To furt h er
i ncrease t he duty factor, switc h
to t h e com p
leme n t m od e . Set t h e D UR ATIO
N control for α
p u lse wi d t h e q ual to t h e d esire d p ulse
off time an d p ush
t h e fro n t p a n el CO MPLE
M E N T (--) pus hb utton :
Delaye d and
P
ai r ed
P ulse Selection
In t h e pu lse d
elay mode, t h e outp ut pulse is d
elayed
from t h e
+TRIG O UT sig n al by t he D EL
AY time selecte d
plus α
specifie d fixed d elay . In t he P AI
RE D mode of
o p eratio n , t he delay controls t h e time betwee
n t he lea d i ng
edges of t h e p ai r ed p u lses . To use
this feature pus h t h e
D ELAY b utto n and
trigger t h e external device from t
h e
+TRIG OUT
j
ac
k . Set t he DE L AY control for t
he d esi r e d
delay time from trigger to p ulse leading
edge . Use t he
varia b le co n trol labeled CA L fo r
ti m e a dj ustme n ts
betwee n ste p s o r to increase t
he delay times beyo n d t he
steps .
TRIG/GAT E IN input
impedan
ce switc h .
F i g .
1-2 . L ocat i on s of pe r io d , d elay and
dur atio n custom timi ng ca p acito
rs and TRIG/GATE IN input im p e dan
ce s w itc h .
R emove t he I npu t b oa r d to gai n access to
t he d elay p ads .
REV . Α ,
A PR . 197 8

P aired pu lses are obtai ned by pus h i ng both t h e D EL AY
and UN D L Y b u ttons . An initial pulse now occurs at
external trigger time wit h t he secon d or paire d p ulse
delayed by t he selected delay time . The CO N
TRO L
ERRO R lig
h
t illuminates
if t h
ed
elay
is toosh
ort or lo ng for
α valid p ulse
train . Α custom d elay position is provi de d
on
t h e DE L AY switc
h .
To determine
t h
e
val ue
of
t heca p acitor
require d ,
multi p ly
t
h e
desired
d elay time i n seconds by 1 Χ
10 - Ζ . F or example, α 50 ms d elay time re q uires α 500 μ F
ca p acitor (50 ms ti m es 1 Χ 10 - Ζ ) . U se either a p ola r ized or
non-polarized capacitor wit h α rati n g of at least 6 V . If α
p olarize d cap acitor is u sed, observe t hep olarity mar k i ngs .
R emove t he i np ut boar d and co nnect t he capacitor as
sh ow n i n F ig . 1-2 .
Transition
T ime Selectio n
T h e leadi n g a nd traili ng times of t he p
ulses may be
varie d by usi n g t he
TRA N SITIO N
TIME co
n t r ol an d t he
LE ADI NG a nd TRAI L
I N
G va
r iable cont r ols . Select t he
desire d
tra n sition time range wit h t he TRA N SITIO N TIME
control a nd vary t h e lea d i ng and traili n g times in-
d epen d e n tly wit h t h e LE ADI N G an d TRAI L I N G co n trols .
Α custo m range position is also
provi d ed on t h e
TRA N SITIO N
TIME
co n trol . To select t he correct
capacitor (i n F arad s) for this ra n ge, multi p ly t he d esire d
transitio n ti m e (in seco nd s) measured from 10°/
ο
to 90°/
ο
poi n ts, by 4 .4
Χ
10 -3 . For exa
mp le, α d esired transitio n ti m e
of 50 ms
requires αca p aciator of 220 μ F . Con n ect t he
capacitoras sh ow n i n Fig . 1-3 . U se αcapacitor wit h at least
α 10 V rating and observe p olarity r equirements .
Wh en t he tra n sitio
n times become la r ge com pared wit h
the
duratio
n
or
perio d times an d t h e pu lse d oes n ot reac h
full
amplit
u d
e,
t
he CO N T R O L ERR O R lig h t will flas h
i n dicati ng imp ro p er control settings .
Output L evels
T h eo u t pu t amplitude and offset are selected b y
i n depen d en t p ulse L O W L EV E L and H IG H LEV E L con-
trols . U se t h e front pa n el voltage calibratio n mar k s fo r an
open circuit loa d an d divide t he values b y two
w h en t h e
P G 508 is o p erating
i n
to
α50 Ω loa d . The O U TP U T
(VOLTS) co n trols are interloc ke d to pr eve n t setti ng t h e
H
IG
H L E VEL m ore negative t han t h e L O W LE V E L . . . It is
also im p ossible to set t h e co n trols for more t han about
20 Vp ea k to pea k out p u t am p lit ud e i n to an o p en
circuit
o
r
10 V i n to 50
Ω .
P ulse amplitud e always e qu als t he pulse h ig h level
minus t he pu lse low level . Offset may be t he
h ig h level
or
t he low level,
w h
ic
h
ever is
used as t h e base li n e refere n ce
level . The flexi b ility of t h is met h o d is useful i n ce r tai n
a pp licatio ns suc h as logic
testing . E it h er t he h ig h or low
level
can be
varied wit h out disturbing t h e ot h er .
REV . Β , A PR . 197 8
Operati
ng
Instructio
n
s-PG 508
To determi n e t h e custom
ca p acito r
value m u lti p ly t he d esired d ur
atio n o r
delay time by 1 Χ 10 -2 . See text .
F ig . 1-3 . L ocatio n fo
r
tra n sitio
ncustom timi ng capacito r .
T he p ulse h ig h an d low levels can be p reset . Pu sh the
PRESET button a nd ad ju st t h e HIGH LE V EL and the L O W
LE
VEL
poten tiometers wit
hα
screw
d river for t he d esired
outp
ut
levels
.
E xte rn al T riggering a nd Gati ng
Το change t h e' ΓΗΙ G/G ΑΤΕ IN i nput i mp edance
r
e
m
ove
t h e plug-i
n from t he mainframe . R emove t h e left si d e
cover . Set t he sli de switc h , locate d on t he I np ut boa r d and
labele d I npu t Impe dan ce, to eit h er t h e 50
Ω
o r the 1 ΜΩ
positio n . In t he 1 ΜΩ positio n t h e shun t capacita nce is
approximately 20 pF . Α stan d ar d oscilloscope p ro be can
be use d to ac qu i r e t he triggeri ng sig
n
al
from
t
he external
circuit r y . If α compe nsated probe is use d , calibrate t he
p r obe on t h e i npu t of α 1 MO 20 pF oscillosco pe first . Α
10 Χ p ro be allows t r iggeri n g directly from h ig h impeda nce
sources s uch as M OS d igital circuit r y wit h an effective
TRIG/GATE
L EVEL range
of + : .30
V .
For external gating select t he d esire d p erio d and
d u r atio n .
P
ress t he SY
N
C
GATE
pus
hbutton . Select t he
d esired trigger slo p e w it h t he+ or ~- S L O PE bu tto n . T he
OUTPUT now
co n sists
of
pu lses, d escri be d by t he f r o n t
p a n el controls, w h enever t h e TRIG/GATE IN inp u t ex-
cee ds t he TRIG/GATE L EVEL cont r ol setting .
To exter n ally t r igger t he P G 508, connect t he t r iggeri ng
sig n al to t h e TRIG/GATE IN co nnecto r . Select t
he
slo p
e
on w h ic h triggeri n g is d esi r e d wit h t
h
e + or
---
S
L O PE
b utton . P lace t h e P ERIOD switc h i n t h e ΕΧΤ T RIG O R
MAN
position . Now adjust the TRIG/GATE LEVELcontrol
for t h e d esired triggering level . 'T he output waveform
commences ab o u t 48 ns after t he triggering signal .

Operating Instructions-PG508
For external
DURATION place the DURATION control
i
n
t he ΕΧΤ D UR p osition, and t h e PER IOD co n trol in t h e
ΕΧΤ T R IG O R MAN position . T h e pe r io d and d uratio
n
of
t he out p ut waveform are now co n trolled by t he triggeri
n g
waveform . T h is is an extremely useful mo de of
o p eration
for tra n slati ng
logic levels, etc . If t he PER IOD is set for
inter n al o p eratio
n and t he D UR ATIO N for exter n al, t he
CO
N TRO L ERR OR lig h t illumi n ates in d icati ng an illegal
mo d e of operatio n .
Th e
TRIG'D/GAT E D in d icator lig h t functio ns as α
TRIG/GATE level indicator . Wh en t h e-1-S L O PE is
selecte d
and t h e exter n al inp u t level excee d s t
h e t h res h ol d set by
t he T R IG/GATE LEV E L co n trol, t
he lig h t is on continuous-
ly . F or i npu t voltages
below t h e t h res hold t h e lig h t is
co n ti nuously
off . Wh en t he i n p ut tra n sits t h roug
h t h e
t hr eshold t he lig h t flas h es . Wh en t h e-S
L O PE is selecte d
t he lig h t beh aves as
for λ
-SL
O PE selectio n . H owever, t he
p olarities are reversed .
TheT R IG'D/GATTED i nd icator
lig h t may be used as α
logic
level i
nd icator for
troubleshooting logic circuitry . Set
t he TRIG/GATE LEV E L , co n trol to α voltage e q ual to t h e
midra n ge val u e of t he logic voltage swing . If an atte nuator
probe is use d for signal p ic k u p , re m em b er to
consid er t he
atte nu ation factor w hen setti ng
t he TRIG/GATE LE VEL
voltage .
Trigger Out p ut
T he signal a pp earing at t he co nnector
is
an ap-
proximate square wave . T he leadi
n g
edge
(positive-going)
Output
Termi n ations and Co nn ections
Th
eP G 508 o p erates as α voltage source
in series wit h
an
i n ternal 50 Ω im ped ance . M
aximum p ulse fi d elity is
obtai ned w hen t he out p ut op
erates into an exter n al 50 Ω
impe dance . The out p ut
circuitry of t h e P G 508 is fully
p rotecte d agai n st any
voltage transients w hen o p
erating
i n to p assive
loa d s .
Table 1-1 lists static control settings t h at
illuminate t he
CO N TRO L ERR OR lig h t a nd t
h
eir
corresponding
operati n g modes . Some of
t h
ese mo
d es may be u seful .
If t he loa d h as α d ovoltageacross
it,
co
nn ect α b loc k i ng
capacitor in series wit h t h e O U
TP U T co n nector an d t h e
loa d . M ake
certain t h e time con sta n t of t h e capacitor and
load is
large enoug h to mai n tain pulse top flatness .
p recedes
the output pulse by α s pecified fixed delay p lus
t h e delay as set by t he D EL
AY control . In paired p u lse
o p eratio n , t he lea d ing e d ge p rece d es t
he first p u lse b y t he
fixed delay . T he seco nd p
ulse t he n appears after t he set
d elay .
Α com p leme n t sq uare wave ( n egative-goi n g
leadi n g edge) is also available at t he front
panel by movi n g
α con n ector on t h e timing circuit board .
See t he illustra-
tio n on t h eR ear I n terface Co n necto r Assignme
n
ts at
t h e
rear of t h is man u al for t h e locatio
n
of
t h
is
co n nector .
Manual Trigger
To use t h is featu
r ep lace t h e PER IOD switc h in t he
ΕΧΤ
TR
IG
OR MAN p osition . Set t h e TRIG/GATE
LEVEL
control fully cloc k wise . If t he +S
L
O
PE is selecte d , t he
ma n ual trigger will occur
w hen t he MAN button is
d epresse d . If t h e --SL O PE
is selecte d , t h e trigger occ u rs
w hen t h e butto
n
is
released . T he ma n ual trigger causes
o
n
e
out p ut p ulse, or α set of paired pulses if t
he D EL AY
a nd UN D L Y buttons are depresse d .
Control E rror L ig h t
T
h e CO N
TR
O L ERR O R lig h t h el
p
s to solve set up
pro b lems by i n dicati ng most control errors
.
Α
steadyglow
in d icates static co n trol setti ng errors w h ile α flas h i ng lig h t
i n d icates d y n amic errors . In eit h er case, t h e control
settings d o n ot co r rectly i nd icate t he output . C h ec k t he
co n t r ol setti ngs for com p ati b ility . See Table 1-1 . Dynamic
fu
n ctio ns
monitore d are p erio d , d elay, duratio n an d
tra n sitio n time .
T AB LE 1-1
Control Setti ngs

Operation
ΕΧΤ TR 1G Υ O R ΜΑΝ and~ ψ
---
SY NC GATE
ΕΧΤ D UR and Internal
P eriod
ΕΧΤ TRIG O R MAN and
SO W A VE ( ΙΝΤ `
P ERIOD)
SO
W A VE ( ΙΝΤ
PE
R IOD)
and SY NC GATE
SO W A VE ( ΙΝΤ PERIOD)
and D E LAY
ΕΧΤ D UR an d D EL AY
E xter n al Trigger M o d e
Square W ave M od e
Truncated
s q
uare wave w h en
gate en d s
REV . Α , ΜΑΥ , 197 6

R iseti ι m e M easurements
in L inear Systems
Co n sider t he r ise a nd falltime of
associate d e q ui p me n t
w h en meas u ri ng t he rise or fallti m e of α
li neardevice . If t h e
risetime of t he d evice u nd
er test is at least ten times slower
t han t
he combi n e d risetimes of t h eP G 508, t he monitoring
oscillosco p
e, an d associate d cables, t he error introd uced
will n ot exceed 1 ο/ο , a nd u sually may be ig nore d .
If t h e rise
or falltime of t h e test d evice is less t han te n ti
m
es
slower
t han t h e com b i n e d risetimes of
t h e testing systems,
dete r mi ne t h
e
actu
al risetime of t he device un d er test by
usi n g t he followi n g formula :
R,
_=

U R Z

, J-

R z z -d
..
R2
. . . . . . .
R, eq uals t h e overall rise or falltime of t h e entire measu r e-
m e n t system a nd R i , R
2,
R,, etc ., are t h e risetimes or
falltimes of t he i nd ivi d ual com p o nen ts com p risi ng t he
system
.
Extern al V oltage Co n trol
Th e
h ig han d
low
level
output voltages
can
be con-
trolle d externally t h
roug
h p i ns 22 Β an d Α at t he rear
interface conn ector
.
F ig . 1-4 sh ows t h eeq uivale n t circ u it .
Con n ectio ns must be made fro m p ad Κ to padL and
p ad Μ to pad Ν located as s h ow
n
on t
he a
dj
ustment
locatio n illust r ation in t h e fol d out pages at t he rear of t h is
ma n ual . Use or d inary h oo ku p wire of t he p ro p er le n gt h .
Solder t h e wire to t h e pa d s . Also n ote t he locatio n of t he
E xt H i and E xt L o potentiomete r s on t h e outp ut boar d .
To
u se t h is feat u re, set t he f r o n t p an el co
n trols as
follows : d epress t he PRESET button
(PRE S ET), p lace t h e
PER IOD switc h in t he
ΕΧΤ ΤR Ι
GO
R MAN p osition, t h e
D UR
ATIO N
in
ΕΧΤ D UR an d t h e N O RMCO MPL E M EN T
switch
i
n t
h
e
N O RM position (out) . U se α screw d river to
ce
n ter t h eE xt H i and t h e p reset H IG H LEVEL co n trols .
Supp ly α voltage to t h e external h ig h inp u t (p i n 22 Β on
t h e
rear interface co nn ecto r ) equ al to t he lowest
external
i nput voltage d esired
(maximum 20 V) .
~ 12 Κ j
Ι
E xt H i 1 22Β Ι R 1234 Ι
Ι E xt Lo
Ι
22 Α

Ι
R 1230

Ι
REV . Β , A PR . 197 7
Ι R 1236
Ι
Ι R 1232 ~
Use r
i n stalle d
ju m pe r s
- Ι
-5 .2 V
F ig . 1-4 . Eq uivale n t ci r cu it of exte rn al
i npu t
fo
r
ou
t p ut voltage control .
O pe r
ati
ng
I n structio n s- P G 508
Now a dj ust t h e fro n t p a n el preset HIG H
LE V EL control
for an OU T PU T voltage eq ual to
t he minim u m d esire d
ou t pu t voltage . It may be necessary to a
dju st t he preset
L O W LE V EL co n trol as t he OU
TP U T voltage is limite d to
20
V
pea
k
to
pea k o pe n circuit . T he h ig h level O UT PU T
voltage is clam p e d by t h e low level O UT PU T voltage
if t h is
r an ge is excee de d . Now apply α voltage eq ual to
t he
h ig h est exter n al co n trol voltage desired to t he
same rear
i n terface co nnector (pin 22 Β ) . Ad j
ust t he Ext H i p ote n -
tiometer
u ntil t he h ig h est d esired o u tp u t voltage is
obtai n ed . It may be necessary to a d j ust t he preset
L
O
W
L E VEL control to obtain t h ed esire d out p u t . T h e
h
ig
h level
OUTP U T voltage cann ot go below t he low level OUTP UT
voltage d ue to t h e level control voltage clam
ps
.
T he E xt H i
an d t h ep reset HIG H LE V EL controls
interact . It may be
n ecessary to re p eat the above
p rocedu re several times
until t he d esired
results are obtai n e d .
Now push t
heN O RM CO MP LE ME NT switc h
(CO MPL E
ME N T) . Center t he Ext L o an d p reset L O
W
LEVE L potentiometers . S upp ly α voltage to p in 22 Α of t he
rear
interface co nn ector equal to t he lowest exte rn al
control voltage desire d . A dj ust t he p reset
L
O
W LEV E L
control for an O U TP U T voltage
e q ual to t h e lowest
OU TP U T voltage desi
r
e
d . C h ange t h is voltage to t he
h ig h est d esired exter n al co n trol voltage . Ad j ust t he
Ext L
o
potentiometer for t he h ig h est O U T PU T voltage desire
d .
As t h ese a dj ustments i n teract, read j ust
t he preset L O W
LEVEL and t he E xt Lopotentiometers
for t he desire d
results . Do
n
ot
rea dj ust t he p reset HIG H LEV EL or t he E xt
H i potentiometers . - T h e O U TP U T voltages now vary
linearly and in d epe nd ently wit h t he exter
n
al co n trol
voltage .
Cou n te d B u r st Using t he DD 501 Digital Delay U nit
Th is ap p licatio n pe r mits p reselecti ng t h e nu mber of
output p ulses from t he P G 508 . T he even t is i n itiate dby an
externally a pp lie d sig n al o r p ulse, 5
n
s or lo
n ger . T h e time
duration
of
t h
is
sig n al or pulse h as no effect on t he output
fro m t he P G 508 .
U 780B H ig h L evel
U 780A L ow
L evel
Pr eset H IG H LEV EL 8775
or L O W LE VEL R785

Operati ng I n str u ctions- P
G 508
ι
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Υ ., . \ι\ι\ι
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ee Θ ωιε
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y ι
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:,
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.
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:
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Κ =1111`~'~ :ι .,i .
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.
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~ Ίί
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., Υι
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\ι σι .
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υταο
I'~]
~η
Fj Ί'
ηπ
:~ ά2 α ~_ ι

~
\ι .
σ
..
Γ \ι \
,Ι
.\
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\
ι
4~
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. . ι .
ν \ η
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ι . .
, . .
..
\Ι ι
Ω
fl
F F
401
Λ Λ
~ ιοσ ~ ιι ° η ° ιι ° ι ~ ° . ι
®
Ν Ν
Co nn ect pi ns 1 a nd 3 f o r d elay I n terval ou t fo r co un te d bu rst . P ins 1 a nd
2 p r ovi d eno r mal delaye d tr igge r out .
F ig . 1-5 . L ocatio n of tr igge rj um pers In DD 501 f o r selecti n g t r igge r o r d elay I n terval ou t pu t .
F ig . 1-6 . PG 508-DD 501 I n te r conn ectio n s fo r cou n te d bu rst ope r ation .
τοαα - τ 9
E xte r nal
t r igger sig n al
DD 501
D LY'D
TR IG O U T
I NPU T ζ Ι

I
NPU T
TR IG/GAT E
IN
ν
(
+T R IG O UT
P G 508
Te
k t r
onix 012-0208-00 o r e qu iv-
ale n t coaxial
ca b le te n i n c h es o r
s h o r te r in le ngth
2044-30
:
REV . Α , A PR . 1977