Tektronix PG502 User manual

Poktronix. Inc.
P-0. BOX 500
Beaverton, Oregon 97005
@/973
070.1598-00
Serial Number

PG 502
Ii,
“B:I@
TABLE
I OF CONTENTS
SECTION 1 OPERATING INSTRUCTIONS
Introduction
Instrument Description
installation and Removal
Operating Considerations
Output Terminations and Connections
Maintaining Pulse Fidelity
Impedance Matching
RisetimE Measurements In Linear Systems
Variable Pulse Delay
Operating Mode?.
Period and Duration Selection
output Levels
External Trigger
External Duration
Eunctions Available at Rear Connector
Definitions Of Pulse Characteristics
Specifications
Performance Conditions
SECTION 2 THEORY OF OPERATION
Introduction
Low Frequency Period Generator
4ns Period Generator
External Trigger Duration Buffer
Manual Trigger Multivibrator
Period and Trigger Out Buffers
Trigger Shaper
Duration Generator
Output Buffer
Output Driver
Output Amplifier
output Level Programmer
Power Supply
SECTION 3 SERVICE INFORMATION
Symbols and Reference Designators
Rear Interface Connector Assignments
Electrical Parts List
Internal Adjustment Procedure
Timing Board Parts Location Grid
Front Panel Controls and Connectors
Block Diagram
Output Board Parts Location Grid
Generators and Trigqer Schematic
Output Schematic
Switch Details and Power Supply Schematic
Mechanical Parts List
Exploded View
Accessories and Repackaging
Page
l-l
1-l
l-1
1.2
1.2
I-2
I-2
1.4
1.4
1.5
1.5
I-5
1-5
l-5
l-6
1-6
1~8
l-8
2-l
2-l
2-l
2.1
2-I
2-2
2.2
2-2
2-2
2-2
2”2
2-2
2.2
2-3
3.1
2-2
3-3
m

PG 502

Section l-F% 502
OPERATING
INSTRUCTIONS
INTRODUCTION
Instrument Description
The PG 502 is a 250 MHz general purpose pulse genera-
tw for use in the TM 500 series power modules. Major
capabilities of this instrument include high repetition rate,
narrow pulse width, fast risetime, and independent pulse
top and bottom level controls. Front panel controls provide
manual trigger, square wave output, and complementary
pulse output for high duty factors.
A selectable 50 11 back termination in the pulse output
circuitry is also provided. All other inputs and outputs are
internallv terminated in 50 fl.
Triggers preceding the output pulse are available at the
fr’ont panel. The pulse output may also be externally
triggered.
The front panel is color coded for easy reference to
controls and their associated functions. Orange denotes
pulse duration controls and settings; green. ‘triggering
functions; and yellow is used for an operating caution note.
Alpha-numerics done in red are the frequency equivalents
for the pulse period settings.
Installation and Removal
The PG 502 is calibrated and ready for use when
received. It operates in any compartment of a TM 500
series power module. See the power module instruction
manual for line voltage requirements and power module
operation. Fig. 1-l shows the installation and removal
procedure. Check that the PG 502 is fully inserted in
the power module. Pull the power switch on the power
module. The POWER light on the PG 502 front panel
should “ow be on. Refer to the Controls and Adjustments
foldout page in Section 3 of this manual, for a complete
description of the front panel controls.

Operating Instructions-PG 502
I.
OPERAT ‘ING CONSIDERATIONS
Output Terminations arid Connections
reflections. For maximum fidelity. use ths special three
The output of the PG 502 operates as a 100 mA current foot long 50 .Q coaxial cable with special BNC connectors
I
source. It is designad to operate into an external 50 $I load. supplid %s % standard ‘accessory (Tektronix Part No.
An unterminated or improperly terminated output causes 012-0482-00). Us% the internal back termination whenever
aberrations on the output pulse (see Impedance Matching). oossible.
Loads less than 5Ofi reduce the pulse amplitude. Loads
I
greater than 50 $1 increaae the amplitude. An external 50 $2 When signal comparison tne%sur%ments or time differ.
load also urovides a DC return path for the output current. ence determinations are made, the two signals from the test
device should travel through coaxial cables with identical
I
A selectable 50 .S2back termination is provided [pull the 10s~ and time delay characteristics.
button tabled BACK TERM (PULL) on the front panel].
The back termination also helps to absorb reflections. The
I
output v&age is divided by two when using the back Make certain the attenuators and terminations used can
termination. The back termination provides the DC return safely handle the maximum PG 502 power output of
path for the outp,ut when driving high impedance or
0.5 Watts.
capacitively-coupled loads. If the output of the PG 502
I
drives a high impedance load using the back termination,
the output voltage is limited to approximately f5 V. When making connections that %re not in a 5Ofi
environment, keep all lead lengths short, l/4 inch or lass.
Accessory filters to increase risetimes and reduce the need I
A DC current in the 50 51 output load CBUSS the output for high quality attenuators and terminations are’available.
pulse to be offset.. Do not apply voltages greater than plus See your Tektronix Representative for more information.
or minus 5 V to the output of the PG 502. If the load has %
I
DC voltage across it greater than the maximum allowed,
connect a blocking capacitor in series with the OUTPUT
connector and the load. Us% the back termination to
Impedance Matching
provide a PC return path for the output current. Make A mismatch, or different impedance in a transmission
el
certain the time constant of the capacitor and the load is
large enough TO, maintain pulse flatness. The output line, generates a reflection back along the line to the source.
circuitry of the PG 502 is fully protected against any The amplitude and polarity of the reflection ar% determined
voltage transients in the output resulting from passive loads. by the load impedance in relation to the characteristic
I
impedance of the cable. If the load impedance is higher
than the characteristic impedance of the line, the reflection
Under cenain conditions, it is possible to operate the will be of the wna polarity as the applid signal. If it is
PG 502 into a high impedance load without using the lower, the reflection will be of opposite polarity. These
I
internal termination. Pulse amplitudes up to about 18 V reflections add or subtract from the amplitude of the
(-9 V to +9 VI can be obtained in this manner with load incident pulse causing distortion and irregular pulse shapes.
impedances in excess of 180 .Q. The PG 502 is not specified
I
when operating in this mode. To we the instrument in this
manner, view the output with an oscilloscope while A simple resistive minimum attenuation impdsncs-
matching network that can be used to match the PG 502
adjusting the OUTPUT (VOLTS) control,s for the desired
waveform. output into relatively low impedances is shown in Fig. 1-2.
.I
To match impedances with the illustrated network, the
following conditions must exist:
Maintaining Pulse Fideky
Due to the extremely fast pulse r$etimes obtained from
I
the PG 502, special consideration must be given to prewva-
tion of pulse fidelity. Even et low repetition rates, 1 GHz
(R,+q R,
frequency components are pr%s%nt in the output waveform.
Rl+z,*R=
rm5t equal 2,
I
Use high quality coaxial cables, %tt%nuators. and termina-
tions. and
I
RG 58 type coaxial cable and typical BNC connectors
a
exhibit impedance tolerances which may cause visible
,I
I-2
1,
Q I

Operating Instructions--PG 502
Therefore:
A,=
and
I R,=z,
For example; to match a 5Oa system to a 125R
system. Z, equals 50 s-1and 2, equals 125 R.
I Therefore:
and
R, = 125(125 - 50) = 96.8 ohms,
R, = 50 f ,;;T50 = 64.6ohms.
Though the network in Fig. 1.2 provides minimum
,“,,
!j
w attenuation, for B purely resistive impedance-matching
device, the attenuation as seen from one does not equal
that wn from the other end. A signal (E, ), applied from
the lower impedance source, encounters a voltage attenua-
tion (A,1 which is greater than 1 and less than 2, as
follows:
A, -Li=El+,
E2 *2
A signal (E2) applied from the higher impedance source
(Z,) encounters a greater voltage attenuation (A,1 which is
greater than 1 and less than 2(2,/Z, ):
In the example of matching 50 Q to 126 .Q,
and
A, 96.8 = 125 + 1 = 1.77
96.8 96.8
A, =64.6+50 + 1 =4.43
The illustrated network ten be modified to provide
different attenuation ratios by adding another resistor (less
than R,) between 2, and the junction of A, and R,.
When constructing such a device, the environment
surrounding the components should also be designed to
provide smooth transition between the impedances. Accept-
able performance can be obtained with discrete eompo-
rents using short lead lengths; however, a full coaxial
environment is preferred.
The characteristic impedance of a coaxial device is
determined by the ratio between the outside diamter of the
inner conductor to the inside diameter of the outer
conductor expressed as:
138
Z, =F log, ,, D/d,
The relative dielectric constant is e (e,,, = l), D is the
inside diameter of the outer conductor and d is the
diameter of the inner conductor.
Further information on attenuator design may be found
in Reference Data For Radio Engineers, Fifth Edition,
Howard W. Sams& Co. Ir~c., New York, N.Y.. Chapt. 10, or
other suitable reference work.
Consider carefully the effects of impedance mismatches
or discontinuities in transmission lines and terminations.
Short lengths of wire exhibit inductance causing pulse
aberrations. Use 50 fi environments or, if this is impossible,
keep ail lead lengths as short as possible (l/4 inch or
shorter).
1-3

If the QG 502 is driving the 1 Ma capacitively-shunted
vertical input of a” oscilloscope, connect a 50 a termina-
tion to the oscilloscope input. Connect the coaxial cable
from the PG 502 to a 50 a 10X attenuator, and connect
the attenuator to the termination. The attenuator isolates
the input capacity, providing a” improved termination for
the cable. Another method is to back terminate the PG 502
by pulling The BACK TERM (PULL) pushbutton on the
front panel, and connecting the coaxial cable to the
oscilloscope input through a 50 fi termination.
Risatima Measurements in Linear Systems
Consider the rise and fallfime of associated equipment
when measuring the rise or falltime of a linear device. If the
risetime of the device tinder tesl is at least ten times slower
than the combined risetimes of the QG 502. the monitoring
oscilloscope, and acsociated cables, the error introduced
will not exceed I%, and usually may be ignored. If the rise
or falltime of the test device is less than ten times slower
than the combined risetimes of the testing sysw”, deter”
mine the actual risetime of the device under test by using
the following formula:
R, equals the overall rise or falltime of the entire
measurement system and R,, R,. R,, etc. are the risetimes
or falltimes of the individual componentc comprising the
system. - rrl
I
I
Variable Pulse Delay
Variable pulse delays may be obtained using another
PG 502, or other suitable pulse generator. For example,
using two PG 502s. push the COMPLEMENT button and,
using a” oscilloscope, set the OUTPUT (VOLTS) LOW
LEVEL control on rhe delay generator for 0 V. Set the
HIGH LEVEL control for +I V. Some fine luning of the
output levels of this generator may be necessary to achieve
250 MHz operation. Connect the OUTPUT from the delay
generator to the +TRIE/DURATION INPUT connector on
the output. generator. Take the pulse output from the I
OUTPUT connection on the output generator, and the
trigger from the + TRIG OUT connector on the delay
generator.
The PERIOD controls on the delay generator now set
the period of the output waveform, and the DURATION
controls set the delay. The output pulse duration and
voltage levels are set by the appropriate controls on the I
R, = YH , + H 2 + R 3 output generator. See Fig. I-3

In the square wave mode, the duration is automatically
set to approximately 50% of the period setting.
Output Levels
The output amplitude and offset are selected by
independent pulse HIGH LEVEL and pulse LOW LEVEL
controls. Use the front panel voltage calibration marks
when the load resistance is 50 ti. and the back termination
is not. used. The output voltage is one half of the voltage
indicated by thedial calibration when the back termination
is used. The OUTPUT (VOLTS) controls are interlocked 50
that it is impossible to set the HIGH LEVEL control more
negative than the low level. It is also impossible fo set the
controls for more than about 5.5 V P-P outpuf amplitude
into 50 Il. Pulse amplitude always equals the pulse high
level minus the pulse low level. Offset may be the high level
or the low level, whichever is used as rhe baseline reference
level. The flexibility of this method of controlling the
output amplitude and offset is useful in certain applications
such as logic testing, i.e.. cither the hiqh or low level can be
varied wifhout disturbing the other.
Instructions-PG 502
OPERATI NG MODES
Period and Duration Selection
The period generator free runs at the rate 5et by the
PERIOD selector and the PERIOW VARIABLE control in
all modes except SO WAVE and EXT DURATION. The
duration of the output pulse is set by the PULSE
DURATION selector and its associated PULSE DURA.
TION VARIABLE control. The PERIOD and PULSE
DURATION selectors are mechanically coupled, so the
duty factor cannot exceed 50% with the VARIABLE
controls in the Xl positions. Under most circumstances.
duty factors far in except of the specified 50% may be
obtained in the NORM mode using the VARIABLE
controls. Excessive duty factor is indicated by any of the
following pulse abnormalities: (1) pulse output period in
multiples of the trigger output period, and (2) alternate
pulses with durations less than the pulse duration setting.
Wuty factors approaching 100% may be obtained by
switching to the complement mode. Set the PULSE
DURATION control for a pulse width equal to thedesired
pulse off time and push the front panel COMPLEMENT (-1
pushbutton.
Use of the Inormal complement function allows inter-
changing the pulse on-off times without varying the voltage
ICVPIS.
External Trigger
The period generator is disabled when the PERIOD
selector is in the EXT TRIG position. An external
positive-going signal applied to the TRIG/DURATION IN
connector, triggers the duration generator. The pulse
duration of the output pulse varies with the front”panel
Pulse DURATION selector and VARIABLE CQtltlOl. The
period of the output waveform is the period of the
triggering signal. See Fig. l”4. The external trigger signal
must remain above the recognition threshold for at lwst
2 ns. It must also remain below the reset threshold for at
least 2 ns to reset the generator for the next trigger.
Entwnal Trigger Signal
A manual trigger is available for single pulse operation.
Disconnect any external trigger input when not in use.
External Duration
The period generator and duration generator are disabled
when the DURATION selector is in the EXT DURATION
position. A voltage exceeding the recognition level applied
to the TRIG/OURATION INPUT connector will activate
the outpuf of the PG 502. The period and duration of the
output will depend on the period and duration of the
externally-applied voltage. See Fig. 1.5. When operating in
this mode, the output of the PG 502 is activated as long as
the MAN TRIG pushbutton is depressed
1-5

Operating Instrucfions-PG 502
Refer to the rear connector assignment illustration in the
Service Section at the rear of this manual for suggested pin
assignments. These connections are not factory wired.
To obtain a trigger out signal complementary to the
front panel trigger out pulse, connect one end of a coaxial
cable to the pads on the Timing Board marked Internal Trig
Out. Connect the other end to appropriate pins as shown in
the illustration. Connections made to the Infernal Trig Out
pads do not +erfere with the front panel f TRIG OUT
signals. A one-half volt signal into 50 fi is available at the
Internal Trig Out pads.
To, obtain the + TRIG OUT signal at the rear interface
connector, disconnect the coaxial cable from the front
panel + TRIG OUT connector and the coaxial connector
labeled Trig, Out on the Timing Board. Replace this cable
with another 500 cable about ten inches long, with a
similiar coaxial ~nnector on one end. Solder the other end
to the holes located as shown in the illustration.
To obtain Trigger/Duration input capabilities at the rear
interface connector, remove the coaxial cable from the
front panel connetior and the coaxial corm&or on the I
Timing Board. Use a new piece of coax about ten inches
long with suitable connection. Solder the free end of this
cable to the rear interface pads located as shown in the I
illustration.
Remember, when planning to use the rear interFace I
connectors, pulse fidelity may be disturbed due to the
impedance mismatch the signals are subjected to in passing
through the connectors. I
A slot between pins 23 and 24 on the rear connector
identifies the PG 502 as a member of the signal source
family. A barrier may be inserted in the corresponding
position of the power module jack to prevent other than
signal source plug-ins from being used in that compartment.
This protects the plug-in should specialized connections be
made fo that compartment. Consult the Building A System
Section of the power malule manual for further informa-
tion.
DEFINITIONS OF PULSE CHARACTERISTICS
The following is a glossary of common pul~l characteris-
tics used in this manual. They are illustrated in Fig. 1.6. Amplitude. The maximum absolute peak value of a
pulse measured from the baseline regardless of sign, and

Operating Instructions-PG 502
t--
Pulre Period
T = ,/Rate
Duly Facto* = Pulse DurationlPulsa Period
excluding unwanted aberrations or overshoot. Measurement
points are at 50% of the pulse duration time (pulse high
IevelJ and on rhe baseline (pulse low level) at 50% of rhe off
time (the pulse period minus the pulse duration).
Aberrations. Unwanted deviations or excursions in the
pulse shape from an ideal ~uare corner and flat top, i.e..
overshoot. undershoot or rounding, ringing, and tilf or
dope.
Baseline. The quiescenf DC voltage reference level of
the pulse waveform,
Complementary Pulse. Normal pulse with high and low
levels inrerchanged. Pulse on-time becomes pulse off-time.
Duty Factor. Sometimes referred to es duty cycle. The
ratio of pulse duration to period, or the product of pulse
duration and pulse repefifion rate. Duty fector in % =
Duration/Period X 100.
Falltime. The time interval. et rhe pulse trailing edge,
for the pulse amplitude to fall from the 90% amplitude
level to the lOPA amplitude level.
Flatness. The absence of long rerm variations to the
pulse top; excluding overshoot. ringing or pulse rounding.
Sometimes referred to a5 tilt or slope.
8
High Level. The most positive value of a pulse, regard-
less of unwanted aberrations or overshoot, measured at a
point that is located at 50% of the pulse duration.
Low Level. The most negative value of a pulse. regard-
less bf unwanted aberrations or overshoot, measured at a
point fhat is at 50% of the off time.
Offset. A DC potential of either polarity applied to the
waveform to bias the baseline to an amplitude other than
zero.
Overshoot. The short term’pulse excursion (0; tran-
si@nT) above the pulse top or below the baseline, which is
simultaneous to the leading or trailing edge of the pulse.
Period. The time interval for B full pulse cycle. inverse
of frequency or repetition rate, or the interval between
corresponding pulse amplitudes of two consecutive un.
delayed or delayed pulses. Generally measured between the
50% amplitude levels of two consecutive pulses.
Preshoot. A transient excursion rhat precedes the Step
function. II may be of the same or opposite polarity as the
pulse.
Pulse Duration. The time interval between the leading
and trailing edge of a pulse at which rhe instantaneous
amplitude reaches 50% of the peak pu,lse amplitude.
1-7

,Operating:I”9tructions--PG:502
Polarity. The direction from the baseline of the pulse
excursio”, either positiveqoing (+) or negativegoing (6).
Ri”gin,g. Periodic aberrations that dampen in time,
following the overshoot.
Risetime. The time interval, at the step function
lesding edge, for the’pulse to rise from the 10% to the 90%
amplitude levels.
Rounding or Undershoot. The rounding of the pulse
corners at the &es of a step function.
m 3
Tilt or Slope. A distortion of e” otherwise flat~toppql
pulse, characterized by either a decline or a rise of the pulse * r I
top. (see Flatness).
ui
Performance Conditions Accuracv: 5% from 5 ns to .5 ms, 15% of 5 mr range,
The electrical characteristics ere valid only if the PG 502
is calibrated at a” ambient temperature betwew+20*C and
+30°C and operated between O’C and t5O’C. Specifications
apply only with 50 a output load impedances.
with both period and duration variables in calibrated
positions. Duration may vary not more than 3% +
0.5 ns for any duty factor less than 50%.
Duty Factor: At least 50% in normal pulse mode:
100% in complement mode. Minimum off time 2 “s.
SPECIFICATIONS I
I
PERIOD:
Range: 44 ns, 10 “r to 10 ms in decade steps. Vari-
able control ellows overlay on all ranges and extends
period TO> 100 “15.
External Duration: Leading edge threshold level <1 V,
trailing edge reset Ilevel Xl.1 V. Maximum inout. 5 V.
~~,~~.
q
DC + peak AC. &rate to 2 V P-P @ 250 MHz. L
I
Jitter: GO.196 + 50 ps,
*Accuracy: 5% in calibrated positions, from 10 “s to
1 ills, 15% 0” 10 ms range. OUTPUT:
Jitter: a,l% + 50 ps. Amplitude: Pulse high and low levels independently
adjustable over a -5V, to +5V range, with pulse
TRIGGER IN:
Amplitude: Trigger threshold <I V, reset threshold
30.1, V maximum inout 5 V DC + eeak AC. Oerate to
2 v b-P @ 250 MHZ.
amplitude limited between aO.5 V and <5 V. Com-
plement switch inverts pulse between ame ,two
selected voltage levels. Front panel selectable 50 a
r
internal back termination divides output levels by
TRIGGER OUT: Risetime: &l “s.
Amplitud,e: al V into 50 a. Falltime: 6 1 “s.
I
DELAY: Aberrations: < + and -5% ef 5 V P-P amplitude, except
negative transition aberrations may exceed 5% for
Fixed: e 10 “s from trigger out to pulse out. durations less than 5 “s. c
I
I
DURATION : Pulse Top Flatness: 32%. beginning 10”s after
transition. 1
Range: a “s, 5 “s to 5 ms in decade steps. Variable
control allows overlap on all ranges, and extends
duration to>50 ml INTERNAL POWER DISSIP TION: 14watts maximum.
I A

Section 2-PG 602
THEORY
OF OPERATION
Introduction
Use the block diagram in the foldout pages of this
manual, along with the detailed schematic diagrams, and
the following discussion to understand the operation of the
PG 502. Integrated circuits U150, U180, and U260 use
emitter-coupled logic (ECL). This logic is non-saturating for
high speed operation. The high level is approximately 4.4 V
above ground and the low level is 3.6 V.
Low Frequency Period Generator
U15OB operates as an astable multivibrator for settings
of the PERIOD switch of 10 ns and longer. See Fig. 2”l for
a simplified diagram of the Low Frequency Period Eenera-
tar. When any input of the OR/NOR gate is high, the
output (pin 2) is high. The switched timing capacitances are
connected from pin 2 to pin 4 of U15OB. The capacitou
are switched by the period range witch. R150B, the
PERIOD VARIABLE control, varies the resistance in the
negative feedback loop.
To start the period cycle, assume pin 2 of U15OB goes
high. This positive sfep is coupled through the Period
timing capacitor to pin 4. Pin 3 goes low. As the timing
capacitor discharges through the PERIOD VARIABLE
resistance, the voltage at pin 4 decays at a rate determined
by the timing capacitor and the PERIOD VARIABLE
resistance. When the switching level (approximately 4 V) is
reached, pin 2 goes low and pin 3 goes high. The negative
Step at pin 2 is coupled through the timing capacitor, and
appears at pin 4. The capacitor now charges through the
PERIOD VARIABLE resistance until the switching level is
reached, and the period cycle repeats.
A slight offset current is applied through thesymmetry
Adj control to compensate for the input current in Ll15OB.
This current controls the symmetry of the trigger output
pulse. Output to the trigger buffer is taken from pin 3.
4 ns Period Generator
In the <4 ns position of the PERIOD selector, the
feedback for U15OB is disconnected via contact 3 of
S15OA. Contact 13F of S150A opens enablinQ U150A.
U150A operates exactly as U15OB, in the Low Frequency
Period Generator. The associated circuitry is optimized for
high speed operation.
External Trigger Duration Buffer
When the PG 502 is operated in the EXT TRIG or EXT
DURATION mode, U15OB operates as an externally-
triggered Schmitt multivibrator with positive feedback
through A158 and contact 12F of S150A. Q125 and Q130
serve as a high gain comparator-amplifier for external
trigger”duration input signals. The base of Q130 is set by
RI35 and RI36 et about 0.5 V. A triggerduration input
signal greater than about 0.5 V causes’ a negative-wing
output step at the collector of Q125. This step is
transmitted through the strip line to the Low Frequency
Period Generator. CR130 provides temperature compensa-
tion. CR122. CR123, CR125, and RI22 protect the input
against excessive voltages.
2-1

rheory of Operation-PG 502
This circuit, en emitter-coupled Schmin multivibrator,
eliminates false triggers due TO contact bounce in the MAN
TRIG front panel switch:The PULSE PERIOD switch must
be in the EXT TRIG position for this circuit fo operate.
When fhe switch is pushed, the base of QIOO is connected
to the $15 V supply through RIDO. This turns QIOO off
and QIIO on. The collector of QllO goes positive, causing
a positive-going trigger at the base of Q1’25 in the External
Trigger lnput,circuitry. Q106 provides positive feedback to
hold the collector of 0110 positive during the contact
bounce interval.
Period and Trigger Out Buffers
U180A. an OR/NOR gate,‘serves as a’buffer to drive
Q185 and Q190. These rransistors operate as en emitter-
coupled amplifier. The mllector of (1185 drives the from
panel t TRIG OUT ENC connector.The collector of Ql90
is connected fo the Internal Trig Out connection on the
Output circuit board.
Trigger Shaper
The output from the Trigger Buffer is also fed to
OR/NOR gate UISOB. Q21O,Q220, Q230, and Q240 serve
as emirter-coupled trigger amplifiers. These amplifiers sup.
ply a fast rise current step to the trigger differentiator,
Q245. When troubleshooting this circuit, any capacitance
greater than about 2 pF connected between TPI and
ground renders this circuit inoperative.
A current step applied to the emitter of 0245 produces
e voltage step et the collector. The collector-to.base
feedback capacitance of the transistor causes this step to
appear at the base, and subsequently the emitter. The base
and emitfer voltages decay toward their initial values. The
decay time is set by R248, R249. and the transistor
capacitance.
When pin 13 is in the high state, during square wave or
external duration operation, the trigger shaper is disabled,
and the external duration pulse is fed directly to the
Output Buffer through R266.
Duration Generator
The bositivegoing trigger pulse, applied to pin 10 of
U260A. causes pin 14 to go low and pin 15 high. Pin 15 is
held high by positive feedback through R262. The low et
the base of Q270 turns 0270 off. The emitter of Q270 goes
negative at a rate allowed by the timing capacitor and the
variable timing currenr source, Q290. As fhe emitter of
Q270 goes negative, it pulls pin 12 of U260A negative
through 0288. When pin 12 reaches the switching threshold
(approximately +4 V), pin 14 goes p&rive and the mono-
Manual. Triger Multivibrator
stable duration generator resets until the next positive-going
trigger pulse repeats the process. Output is taken from
U260A. pin 15.
Output Buffer
This OR/NOR gate, U2606, shapes the signal fed to the
Output board. The.timing waveform at pin 3 of U2606, is
essentially the waveform seen et fhe output of the PG 602.
In the square wave mode. or external duration mode, the
waveform at pin 7 controls the output bf U26OB. (the
trigger having been disabled at U19.08). The push-pull
timing waveform is applied to the bases of Q320 and Q335,
connected as an emitter-coupled amplifier. Their collectors
are connected to the bases of e second emitter-wupled
amplifier, Q350 and Q354. through zener diodes, VR320
and VR335. These diodes change the voltage fo a more
appropriaa level for the following circuitry.
Output Driver
U360 is the output driver amplifier. It also performs the
normal complement pulse witching function. Q390 is a
variable output current source rhat tracks the outpuf
current to provide a constant ratio of driver current to
output current. Q406 supplies’ons-half the value of current
supplied by Q390, to provide a reference level for U400.
This reference level lies halfway between the high and low
voltage levels at the output of U360.
Output Amplifier
U400 witches up to 100 mA between either the
external load (terminating resistance), or R442 and R443.
Q470 is the variable output current source. The amplitude,
of The output pulse is proportional to the current supplied
by 11470.
Output Level Programmer
0504 and Q508 supply up to +I00 mA of current TO the
output load. L446, L447, L450, L451, R447 and R450
decouple the source from the output pulse. The offset level
of the output pulse is proportional fo the current supplied
by Q504 and Q508.
The output programming circuitry takes input from the
pulse HIGH LEVEL and LOW LEVEL controls to provide
proper control current to the amplitude lQ390,0470) and
offset (0504, Q508) current sources.
When the amplifier output, U400 pin 2, is in the high
state (amplifier off), the output voltage is proportional to
the offset current. Turning the HIGH LEVEL control
clockwise causes pin 3 of U480A fo go. negative. The

emitters of Q516 and Q520 also go negative due to the
an operational amplifier. Conduction is
C1520 and decreased in Q516. Currenf flow is
increased in Q504 and decreased in 0508. This action
causes an absolute magnitude current increase in the load
resistance (collectors of Cl504 and Q508 move in the
positive direction). This current change is sensed through
R502 and R508 and fed back to pin 2 of U480A. causing a
stable condition at its input. The output current (pulse high
level) is proportional to the Setting of the HIGH LEVEL
control.
The output amplifier is on when the pulse output is in
the low state. The output voltage is proportional to the sum
of the offset current and the witched output current.
Manual control of the pulse low level occurs by varying
the voltage at pin 5 of U48OB with the front panel LOW
LEVEL control. Turning the LOW LEVEL control CW
cau?es pin 7 of U4808 to go more positive. This increases
the curmnt through Q470 and consequently the pulse
amplitude. The output high level is unchanged as the low
level goes lower. Pin 6 of U48OB. connected to the emitter
of 0470 through R493, also goes more positive, until the
dtage between pins 5 and 6 of U48OB is zero.
If the pulse high level is raised, more current rnu~ flow
in the output amplifier to keep the pulse low lwel at the
same voltage. When the collectors of Q504 and Q508 go
positive, their emitters 90 negative. This change is coupled
through R495 to pin 6 of lJ480B. Pin 7 of U48OB goes
positive. increasing current flow through the Output Am-
plifier, and effectivel” increasing pulse amplitude. The pulse
low level is unaffected by adjustment of the pulse HIGH
LEVEL control. The Low Level Bal, infernal adjustment, is
provided to optimize the tracking of the output level
programming circuitry.
Diodes CR445, VR445, CR446, CR448, CR449, and
VR449 protect U400 against voltage reflections from
reactive loads.
Power Supply
U640 is a precision voltage regulator for the +5 V
supply. R645 sets the value of the o”tp”f voltage howwer,
it is adjusted for accuracy of the +I5 V supply, as this is the
most critical voltage in the PG 502. Internal reference
voltage from U640 is available at pin 6. Operating voltage at
pin 12 is pre-regulated by VR616. for reduced ripple.
5 V DC is applied to the collectors of Q650. The +5 V is
Theory of Operation-PG 502
taken from the emitter. If the current to the PG 502 is
increased. pin 4 of U640. connected to the emitter of
Q650, goes negative. This causes pin 10 to go positive,
increasing current flow through Q650, and restoring the
voltage To is prew value. Should the current supplied
increase excessively, the voltage drop across R650 causes
Q650 to decrease conduction through infernal action in
U640. limiting the current to a safe value.
Q606 and Q610 serve as a comparator for the +I5 V
supply. If the +15 V supply goes negative, due to increased
load, Q6OE will decrease conduction. Its collector will go
positive increasing conduction in Q600. This will increaw
cuwnf flow in emitfer follower Q612, which is connected
to the Series pass transistor in the main frame. The series
pass transistor will increase current available to the load,
and the voltage is restored to the correct value. R615 sets
the maximum current available from the supply. If the
+15 V is shorted, Q600 Saturates with its collector approx-
imately 3 V (due to VR600) below the unregulated supply.
This drop is reduced, by the bare emitter drops of Q612,
and the series pass transistor in the main frame, to about
1.8 V across R615. This drop limits the maximum current
available from the supply. F600 additionally protects the
components from overcurrent.
The -20 V supply is connected To the base of 0660. If
the -20V goes more negative, conduction increaws in
Q660. This reduces conduction in Q670, and (1674
connected to the base of the series pass transistor in the
main frame. The series pass transistor reduces conduction,
restoring the -20 V to its preset level. Current is limited
through R676. If the supply is shorted, Q660 reduces
conduction, saturating Q670 with its collector approx,
imately 3 V from the unregulated volage. The drop across
the base emifter junction of Q674 , and the series pass
transistor in the main frame, sets rhe voltage across R676.
at which the series pass transistor limits the current
available. Fuse F670 further protects components from
abnormal currents. CR675 prevetits The -20 V supply from
going positive with respect to ground.
Additional protection for the PG 602 is provided by
Q626. and its associated components. If the +I5 V supplv
goes to about 17 V. 0620 conducts. causing the gafe of
Q626 to move in the positive direction. When the gate of
Q626 is about 1 V positive with respect to the cathode, the
diode conducts, shorting the +15 V, +5 V and the -20 V
supplies together. If the -20 V supply goes several volts
more negative, Q632 conducts, causing the sam‘e action in
Q626, and shorting the +15 V, and -20 V and +5 supplies.
If the fault remains, the current limits in The +I5 V, -20 V
and +5 V supplies protect the circuitry. Should tha current
limits fail, fuses F600 and F670 will open.
2-3

INFORMATION 2
SYMBOLS AND REFERENCE DESIGNATORS
Electrical components shown on the diagrams are in the following units unless noted otherwise:
Capacitors = Values one or greater are in picofarads (pF).
Values less than one are in microfarads IpF),
Resistors = Ohms PII
Svmbols used on the diagrams are based on ANSI Y32.2 - 1970.
Logic svmbologv is based on MIL-STD-SOW in terms of positive logic. Logic symbols depict the logic function performed
and may differ from the manufacturer’s data.
The following special symbols are used on the diagrams:
External Screwdriver adjustment
External control or connector
-
0
3
Clockwise control rotation in direction of arrow
Refer to diagram number indicated in diamond
Refer to waveform number indicated in hexagon.
Connection soldered to circuit board.
Connection made to circuit board with interconnecting uin

PG 502
PIN ASSIGNMENT
INPUT-OUTPUT ASSIGNMENTS FOR PLUG-IN
REAR INTERFACE CONNECTOR
TriggerGut G,O”“d
Triggerout
ExternalTriggerIn Ground
ExternalTriggerI”
2s VAC winding
+33.5 v filtered DC
Ball) lead of PNP SerierPass
Emitter lead of PNP SeriesPass
*33.5 v cOmmO” return
-33.5 v filtered DC
Emitter lead of NPN SeriesPass
Base lead of NPN SariarPau
17.5 VA0 winding
+11.5Vcommon return
+11.5Vcammo”ret”rn
+,,.s v filtsred DC
25 VAC winding

EL
PG 502
.ECTRICAL REPLACEABLE PARTS LIST
PARTS ORDERING INFORMATION
Replacement parts are available from or through your local Tektronix. Inc. Field
Office or representative.
Changes to Tektronix instruments are smwtimes made to accommodate improved
components as tkw become available. and to give you the benefit of the latest circuit
improvements developed in our engineering department. If is therefore important, when
ordering parts. to include the following information in your order: Part number,
instrument type or number, serial number. and modification number if applicable.
If a part you have ordered has been replaced with a new or improved part, your
local Tektronix. Inc. Field Office or representative will contact you concerning any
change in part number.
Change information. if any. is located at the rear of this manual.
SPECIAL NOTES AND SYMBOLS
x000
Part first added at this serial number
00x Part removed after this serial number
ITEM NAME
In the Parts List, an Item Name is separated from the description by a colon (:).
Secause of space limitations. an Item Name may sometimes appear as incomplete. For
further Item Name identification, the U.S. Federal Cataloging Handbook H6-1 can be
utilized where possible.
ABBREVIATIONS
ACTR
ASSY
CAP
CER
CKT
COMP
CONN
ELCTLT
ELEC
FXO
INCAND
LED
NONWIR
ACTUATOR
ASSEMBLY
CAPACITOR
CERAMIC
CIRCUIT
COMPOSITION
CONNECTOR
ELECTROLYTIC
ELECTRICAL
FIXED
INCANDESCENT
LIGHT EMITTING DIODE
NON WIREWOUND
PLSTC
QTZ
RECP
RES
RF
SEL
SEMICQND
SENS
SEP
VAR
ww
XFMR
XTAL
PLASTIC
QUARTZ
RECEPTACLE
RESISTOR
RADIO FREQUENCY
SELECTED
SEMICONDUCTOR
SENSITIVE
SEPARATELY
VARIABLE
WIREWOUND
TRANSFORMER
CRYSTAL

MFR.CODE MANUFACTURER ADDRESS ClTY,STATE,ZIP
Stanhyck’winding Di”., San Fernando
Electric Mfg. co., Inc.
Tektronix, 1°C.

CAP.,FXD,CER oI:o.1”F,zo%,sov
CAP.,PXD,CER DT:15PF,5%,6oov
CAP.,FXD,CER DI:0.1uF,*0%,50”
CAP.,FXD,CER DI:0.1LlF,*0%,50”
CAP.,FXD,CER 0~:10~F,+/-0.25PF,500”
283-0660-00
281-0562-00
285-1068-00
283-0111-00
290-0312-00
283-0695-00
283-0622-00
283-0121-00
283-0156-00
283-0156-00
283-0111-00
283-0111-00
283-0111-00
283-0156-00
CAP.,FXO,PLS~C:O.OSUF,1$,200V
CAP.,FXD,PLSTC:O.SVF,la,*oo”
CAP.,FXD,MTCA i7:510PF,Z%,500”
CAP.,FXDICER DL:39PP,500”
fAP.,FXD,PLSTC:SUF,1a,~oo”
CA\P.,F!m,CER D1:0*1UF,20%,50V
CAP.,FXD,ELCTLT:47UF,lo~,35V
cAP.,FXD,MTCA D:4440PF,L%,3000
CAP.,FXD,MICA o:150PF,1%,300"
CAP.,FXD,CER D~:O.I"F,*O%,SPV
CAP.,FXD,ELCTLr:loo”F.25V
CRP.,FXO,ELCTLT:loo”F115V
CAI.,FXO,ELCTLT:100UF.25V
CAP.,FXD,CER or:0.1”F.20%,50”
CAP.,EXO,CER D1'1000PF,*100-0%,200~
CAP.,FXD,CER DI:1000PF,t100-0%,20ov
CAP.,FXD,CeR DT:0.1UF,20%,50V
CAP.,FXD,CER DI:0.1"f,20%,50"
C?+P.,F!JD,CER Dr:10o0QF,+100-O%,ZOov
CAP.,FXO,CER DT:O.m".20%.50~
CAP.,FXD,CER DL:1000PF.+100-0%,20ov
C?+P.,FXrJ,CER D~:1000PF.+100-0a,20ov
CAP.,FXD,CER DI:o.1UF,ZO%,5OV
Electrical Parts List-PG 502

Electrical PartsList7PG.502
” Ckt No. Tektronix Serial/Model No.
Part No. Eff DSCOd
c435
c472
C460
2::
c511
c512
C516
c520
c524
C612
C615
'X24
Cl526
C628
C640
cw5
cm0
tea
C674
Cb75
,CRlOO
CR122
CR123
CR123
CR130
CR249
CR250
CR397
CR445
CR&46
CR448
CR449
CR615
CR635
CR650
CR660
CR675
05630
F600
7645
F670
5120
J122
J190
J192
5260
J262
5320
5340
5435
3436
3-6
283-0156-00
283-0111-00
283-O&11-06
283-0111-00,
283-0111-00
283-0111-00
283-0111-00
283-0000-00
283-OWO-00
283-01,11-00
283'0000-00
ago-‘0215-00
283-0220-00
283-0111-00
283-0220-00
283-0000-00
290-0527-00’
290-0527-00
283-0220-00
zs3-oooo-b0
290-0216-00
152-0141-02
152FO14142
'152-0141-02
152-0153-00
152-0141-02
152-0141-02
152-0141-02
IX!-0141-02
152-0322-00
152-0322-00
152-0333-00
152-0333-00
152-006~6-00
152-0066-00
152-0066-00
152-0141-02
152-0066-00
150-0048-00
159-0022-00
159-0114-00
159-0022-00
131-1315-00
131-1063-00
131-1003-00
131-1315-00
131-1007-00
131-1003-00
131-1003-00
131-1003-00~
131-100~3-00
131-1315-00~
276-0543-00
1ow3317-00
lbs-oaa7-oo
276-0569-00
276-0569-00
&
-
Description
caP.,FXD,CER DT:lOOOPr,+100-0%,20o”
caP..FXDICER DI:O.LUF.ZO%.50"
C?Q.;FXD;CER DI:O.lUF;20%;50"
cm.,FXD,CER D~:0.1”F.20$,50”
cAP.,FXD,CER DI:O.1"F,*0%,50"
cAP.,FXD,CER DIi0.00lUF.+100-0%,5oov
CAP.,FXD,ELCTLT:looUF,25”
CAP..FXD.CER D~:0.01L!F.20$.50”
cAP.,FXD,CER DY:O.lUF,20%,50”
caP.,FXD,CER DI:O.Ol"F.20%,50"
caPL,FXD,CER D1:0.001”F,+100-0%,500”
ULP..FXD.ELCTLT:15”F.20$.*0”
CAP.,FXD,ELCTLT:15”F,*O%,*O”
CAP.,FXD,CER DI:0.01UF.20$,50”
CAP.,FXD,CER PT:O.001UF,+100-0~,500”
ssM1cm?* DWXCE:SILICON,30”,15OMA
SENTCONE DE”TCE:S*LTCON.30V.150~
FUSE,CAnTRTDGE:lA,3AG,F’AST-BLO
FUSI,CAr(TRTDGE:lA,125”AC,FAST-%LP
FUSE,CARTRIDGE:lA.3AG.FAST-BLO
CoNN;F.cPT;ELEC:CKT BD MT;3 PRONG
CONN,RCPT,ELEC:CKT BD MT,3 PRONG
CONN,RCPT,EZEC:FEMRLE,BNC
h4fr
Code &4fr ,Port
Number
BOCB26
TnC15&02OFL
TDC156M020F8,
8121N075C103"
4OC626
CD8220
CD8220
CD8220
A1108
AllOS
AGCl
G-Al
AGC.2
2958235-L
131-1003~00
131-1003-00
2858235-l
131-1003-00
131-1003-00
131-1003-00
131-1003-00
131-1003-00
28.T8235,-1
276-0543-00,
715olM
LO84327-00
276-0569-00
2-I-0569-00