Tews Technologies TAMC900-A1 User manual

The Embedded I/O Compan
y
TAMC900-A1
Signal Conditioning Adapter for TAMC900
Version 1.0
User Manual
Issue 1.0.2
November 2010
TEWS TECHNOLOGIES GmbH
Am Bahnhof 7 25469 Halstenbek, Germany
Phone: [phone] Fax: [phone]
e-mail: [email protected] www.tews.com

TAMC900-A1 User Manual Issue 1.0.2 Page 2 of 17
TAMC900-A1-10R
Signal Conditioning Adapter for TAMC900,
Gain = 1, Mid-Size Front Panel, RoHS compliant
TAMC900-A1-11R
Signal Conditioning Adapter for TAMC900,
Gain = 1, Full-Size Front Panel, RoHS compliant
This document contains information, which is
proprietary to TEWS TECHNOLOGIES GmbH. Any
reproduction without written permission is forbidden.
TEWS TECHNOLOGIES GmbH has made any
effort to ensure that this manual is accurate and
complete. However TEWS TECHNOLOGIES GmbH
reserves the right to change the product described
in this document at any time without notice.
TEWS TECHNOLOGIES GmbH is not liable for any
damage arising out of the application or use of the
device described herein.
Style Conventions
Hexadecimal characters are specified with prefix 0x,
i.e. 0x029E (that means hexadecimal value 029E).
For signals on hardware products, an ‚Active Low’ is
represented by the signal name with # following, i.e.
IP_RESET#.
Access terms are described as:
W Write Only
R Read Only
R/W Read/Write
R/C Read/Clear
R/S Read/Set
©2008-2010 by TEWS TECHNOLOGIES GmbH

TAMC900-A1 User Manual Issue 1.0.2 Page 3 of 17
Issue Description Date
1.0 Initial Issue April 2008
1.0.1 - New Issue notation
- General Revision
February 2010
1.0.2 Full-Size Front Panel added November 2010

TAMC900-A1 User Manual Issue 1.0.2 Page 4 of 17
Table of Contents
1PRODUCT DESCRIPTION.........................................................................................6
2TECHNICAL SPECIFICATION...................................................................................7
3HANDLING AND OPERATING INSTRUCTIONS ......................................................8
3.1 ESD Protection................................................................................................................................8
3.2 Maximum Input Voltage..................................................................................................................8
4ANALOG INPUTS ......................................................................................................9
4.1 Input Voltage Range .......................................................................................................................9
4.2 Single Ended Signal Source........................................................................................................10
5CLOCK .....................................................................................................................11
6TRIGGER..................................................................................................................12
7PIN ASSIGNMENT ...................................................................................................13
7.1 Overview ........................................................................................................................................13
7.2 Clock Connector ...........................................................................................................................14
7.3 Trigger Connector.........................................................................................................................14
7.4 Analog-In Connector.....................................................................................................................15
7.5 SiCA Connector.............................................................................................................................15

TAMC900-A1 User Manual Issue 1.0.2 Page 5 of 17
List of Figures
FIGURE 1-1 : BLOCK DIAGRAM TAMC900-A1...............................................................................................6
FIGURE 4-1 : ANALOG INPUT BLOCK DIAGRAM..........................................................................................9
FIGURE 4-2 : SINGLE ENDED SIGNAL SOURCE ........................................................................................10
FIGURE 4-3 : SINGLE ENDED SIGNAL SOURCE WITH IMPEDANCE MATCHING...................................10
FIGURE 7-1 : CONNECTOR OVERVIEW ......................................................................................................13
FIGURE 7-2 : PIN LOCATIONS ANALOG-IN CONNECTOR.........................................................................15
List of Tables
TABLE 2-1 : TECHNICAL SPECIFICATION.....................................................................................................7
TABLE 7-1 : PIN ASSIGNMENT CLOCK CONNECTOR ...............................................................................14
TABLE 7-2 : PIN ASSIGNMENT TRIGGER CONNECTOR ...........................................................................14
TABLE 7-3 : PIN ASSIGNMENT ANALOG-IN CONNECTOR........................................................................15
TABLE 7-4 : PIN ASSIGNMENT SICA CONNECTOR ...................................................................................17

TAMC900-A1 User Manual Issue 1.0.2 Page 6 of 17
1 Product Description
The TAMC900-A1 is a simple Signal Conditioning Adapter (SiCA) providing I/O-connectors for the
analog inputs, clock and trigger inputs and the analog signal conditioning.
All inputs are differential. The signal conditioning consists of a differential amplifier with gain=1 and a
low pass filter to suppress high frequency noise.
The TAMC900-A1 provides eight analog, three clock and three trigger inputs.
For First-Time-Buyers the engineering documentation TAMC900-A1-ED is recommended.
The engineering documentation includes TAMC900-A1-DOC, schematics and data sheets of
TAMC900-A1.
Signal Conditioning Adapter
(SiCA)
8x
Diff.
Analog
Input
3x
Clock
3
88
3x
Trigger 3
HarLink
Infiniband
Connector
SiCA Connector
Signal Conditioning
(Gain = 1)
HarLink
Figure 1-1 : Block Diagram TAMC900-A1

TAMC900-A1 User Manual Issue 1.0.2 Page 7 of 17
2 Technical Specification
AMC Interface
Mechanical Interface Signal Conditioning Adapter for TAMC900
Electrical Interface compliant to TAMC900
I/O Interface
Number of Analog Channels 8 differential via Infiniband Connector
Number of Clock Inputs 3 differential (LVDS) via HarLink Connector
Number of Trigger Inputs 3 differential (LVDS) via HarLink Connector
Analog Signal Conditioning
Input Type Differential
Input Voltage Range (diff.) ±1 Volt
Input Common Mode Voltage 0 – 3.3 Volt
Max. Differential Input Voltage 1.4 Volt
Gain 1
-3dB Bandwidth 0 – 67 MHz
Output Slew Rate 630 V/µs
Output Settling Time 11 ns (2 Volt Step, 0.1% Settling)
Output Common Mode Voltage 1.37 Volt
Physical Data
Power Requirements 180 mA typical @ +6V DC
Temperature Range Operating
Storage
0 °C to +55 °C
0 °C to +70 °C
MTBF 804000 h
MTBF values shown are based on calculation according to MIL-HDBK-217F and
MIL-HDBK-217F Notice 2; Environment: GB20°C.
The MTBF calculation is based on component FIT rates provided by the
component suppliers. If FIT rates are not available, MIL-HDBK-217F and
MIL-HDBK-217F Notice 2 formulas are used for FIT rate calculation.
Humidity 5 – 95 % non-condensing
Weight 50 g
Table 2-1 : Technical Specification

TAMC900-A1 User Manual Issue 1.0.2 Page 8 of 17
3 Handling and Operating Instructions
3.1ESD Protection
The TAMC900-A1 is sensitive to static electricity.
Packing, unpacking and all other handling of the TAMC900-A1 has to
be done in an ESD/EOS protected area.
3.2Maximum Input Voltage
The maximum input voltage of the Clock and Trigger inputs is
2.5 Volt. The TAMC900 will be damaged if higher voltage levels are
used.
The allowed Common Mode Input Voltage range for the Analog
Inputs is 0 – 3.3 Volt.

TAMC900-A1 User Manual Issue 1.0.2 Page 9 of 17
4 Analog Inputs
The TAMC900-A1 provides access to the analog inputs of the eight ADCs of the TAMC900. As signal
conditioning, it provides a differential amplifier with Gain = 1 for each analog input.
The figure below shows one analog input path of the TAMC900-A1.
ANALOG_INx+ and ANALOG_INx- build one analog input of the TAMC900-A1, and the resistors RI
and RFset the gain of the signal conditioning (gain = 1).
- +
+ -
3.3 Volt
GND
R
I
R
I
R
F
LTC6404 Output to TAMC900
R
F
Signal Conditioning
ANALOG_INx-
ANALOG_INx+
AIN_x-
AIN_x+
Analog Input
Figure 4-1 : Analog Input Block Diagram
An Infiniband connector (FCI 58368-111010 or compatible) is used for the analog inputs.
A differential signal is composed of two (ground referenced) single
ended signals.
For each analog input, you need to connect three signals:
ANALOG_IN+, ANALOG_IN-, and GND
4.1Input Voltage Range
The common mode voltage range of the analog inputs is 0 – 3.3 Volt, and independent from the output
common mode voltage.
The maximum differential input voltage VINDIFF (difference between ANALOG_INx+ and
ANALOG_INx-) should be limited to ±1.0 Volt, because this is the input range of the ADCs on the
TAMC900.
Please refer to the LTC6406 data sheet for more details. The data sheet is part of the Engineering
documentation.
For optimal performance, do not exceed the maximum differential
input voltage range of the TAMC900 ADCs.

TAMC900-A1 User Manual Issue 1.0.2 Page 10 of 17
4.2 Single Ended Signal Source
If a single ended signal source is used, it can be connected to the TAMC900-A1 in the following way:
- +
+ -
3.3 Volt
R
I
R
I
R
F
LTC6404
-IN
+IN
LTC2254
ANALOG_IN-
ANALOG_IN+
GND
GND
GND
R
F
ADC
(TAMC900)
TAMC900-A1
Single Ended
Signal Source
Figure 4-2 : Single Ended Signal Source
In the above configuration, ANALOG_IN- should not exceed ±1.0 Volt (ADC input voltage range).
Unfortunately, most signal sources have a non-zero output impedance RS. This causes feedback
imbalance between the pair of feedback networks. For the best performance, it is recommended that
the input source output impedance be compensated for. If input impedance matching is required by
the source, a termination resistor RTshould be chosen:
S
S
R
R
−Ω
×
T
R
Ω
=200
200 (200 Ωis the input impedance of ANALOG_IN-)
To provide differential balance, RDB is chosen to equal RT|| RS:
ST
ST
DB RR RR
R+ =
- +
+ -
3.3 Volt
R
I
R
I
R
F
R
F
LTC6404
-IN
+IN
LTC2254
ADC
(TAMC900)
TAMC900-A1
ANALOG_IN-
ANALOG_IN+
GND
R
T
Single Ended
Signal Source
GND
GND
R
DB
R
S
Figure 4-3 : Single Ended Signal Source with impedance matching
The overall single-ended to differential gain (GAINSE) must take into account the input attenuation
of the RSand RTresistive divider and the effect of adding RDB:
)150( ))(150)(300(
DBTS
STSDB
SE RRR RRR
GAIN +
T
RR
−
+
+
=

TAMC900-A1 User Manual Issue 1.0.2 Page 11 of 17
5 Clock
All three differential clock inputs are directly routed to the SiCA Connector.
A Harting connector 27 21 121 8000 or compatible is used for the Clock inputs.
The Clock Inputs are directly routed to the TAMC900.
The maximum input voltage of the corresponding Virtex-5 I/Os is 2.5
Volt.
The device will be damaged if higher voltage levels are used.

TAMC900-A1 User Manual Issue 1.0.2 Page 12 of 17
6 Trigger
All three differential Trigger inputs are directly routed to the SiCA connector.
A Harting connector 27 21 121 8000 or compatible is used for the Trigger inputs.
The Trigger Inputs are directly routed to the TAMC900.
The maximum input voltage of the corresponding Virtex-5 I/Os is 2.5
Volt.
The device will be damaged if higher voltage levels are used.

TAMC900-A1 User Manual Issue 1.0.2 Page 13 of 17
7 Pin Assignment
7.1Overview
Pin 120
Pin 119 SiCA Connector
Clock
Connector
Pin 1
Pin 2e
Analog-In
Connector
Trigger
Connector
Pin 2a
Pin 1a
Pin 2
Figure 7-1 : Connector Overview

TAMC900-A1 User Manual Issue 1.0.2 Page 14 of 17
7.2Clock Connector
Pin Signal Level Pin Signal Level
1a CLKIN_2+ LVDS 2a CLKIN_2- LVDS
1b GND 2b GND
1c CLKIN_1+ LVDS 2c CLKIN_1- LVDS
1d GND 2d GND
1e CLKIN_0+ LVDS 2e CLKIN_0- LVDS
1z CASE Front Panel 2z CASE Front panel
Table 7-1 : Pin Assignment Clock Connector
7.3Trigger Connector
Pin Signal Level Pin Signal Level
1a TRIG_2+ LVDS 2a TRIG_2- LVDS
1b GND 2b GND
1c TRIG_1+ LVDS 2c TRIG_1- LVDS
1d GND 2d GND
1e TRIG_0+ LVDS 2e TRIG_0- LVDS
1z CASE Front Panel 2z CASE Front panel
Table 7-2 : Pin Assignment Trigger Connector

TAMC900-A1 User Manual Issue 1.0.2 Page 15 of 17
7.4Analog-In Connector
Pin 2
Pin 3 Pin 1
Pin 23
Pin 24Pin 25
Figure 7-2 : Pin Locations Analog-In Connector
Pin Signal Level Pin Signal Level
1 GND
2 ANALOG_IN0- 0 – 3.3 Volt 3 ANALOG_IN0+ 0 – 3.3 Volt
4 GND
5 ANALOG_IN1- 0 – 3.3 Volt 6 ANALOG_IN1+ 0 – 3.3 Volt
7 GND
8 ANALOG_IN2- 0 – 3.3 Volt 9 ANALOG_IN2+ 0 – 3.3 Volt
10 GND
11 ANALOG_IN3- 0 – 3.3 Volt 12 ANALOG_IN3+ 0 – 3.3 Volt
13 GND
14 ANALOG_IN4- 0 – 3.3 Volt 15 ANALOG_IN4+ 0 – 3.3 Volt
16 GND
17 ANALOG_IN5- 0 – 3.3 Volt 18 ANALOG_IN5+ 0 – 3.3 Volt
19 GND
20 ANALOG_IN6- 0 – 3.3 Volt 21 ANALOG_IN6+ 0 – 3.3 Volt
22 GND
23 ANALOG_IN7- 0 – 3.3 Volt 24 ANALOG_IN7+ 0 – 3.3 Volt
25 GND
Table 7-3 : Pin Assignment Analog-In Connector
7.5SiCA Connector
The Samtec QTE / QSE Series are used as I/O connection between TAMC900 and the SiCA. The
TAMC900 carries a QSE connector, and the mating QTE connector is populated on the SiCA. The
stacking height is defined by the QTE connector on the SiCA.

TAMC900-A1 User Manual Issue 1.0.2 Page 16 of 17
The Samtec QTE-060-02-L-D-A or compatible is used on the TAMC900-A1.
Pin Signal Level Pin Signal Level
1 GP_IO_0 2,5 Volt CMOS 2 SiCA_PWR +6 Volt
3 GP_IO_1 2,5 Volt CMOS 4 SiCA_PWR +6 Volt
5 GP_IO_2 2,5 Volt CMOS 6 SiCA_PWR +6 Volt
7 GP_IO_3 2,5 Volt CMOS 8 SiCA_PWR +6 Volt
9 GP_IO_4 2,5 Volt CMOS 10 SiCA_PWR +6 Volt
11 GP_IO_5 2,5 Volt CMOS 12 SiCA_PWR +6 Volt
13 GP_IO_6 2,5 Volt CMOS 14 GND logic Ground
15 GP_IO_7 2,5 Volt CMOS 16 GND logic Ground
17 GP_IO_8 2,5 Volt CMOS 18 LVDS_0+ LVDS
19 GP_IO_9 2,5 Volt CMOS 20 LVDS_0- LVDS
21 GND logic Ground 22 GND logic Ground
23 - - 24 LVDS_1+ LVDS
25 - - 26 LVDS_1- LVDS
27 - - 28 GND logic Ground
29 - - 30 LVDS_2+ LVDS
31 GND logic Ground 32 LVDS_2- LVDS
33 GND logic Ground 34 GND logic Ground
35 AIN_0- 36 LVDS_3+ LVDS
37 AIN_0+ 0 – 2.9 Volt 38 LVDS_3- LVDS
39 GND logic Ground 40 GND logic Ground
41 GND logic Ground 42 GND logic Ground
43 AIN_1- 44 LVDS_4+ LVDS
45 AIN_1+ 0 – 2.9 Volt 46 LVDS_4- LVDS
47 GND logic Ground 48 GND logic Ground
49 GND logic Ground 50 LVDS_5+ LVDS
51 AIN_2- 52 LVDS_5- LVDS
53 AIN_2+ 0 – 2.9 Volt 54 GND logic Ground
55 GND logic Ground 56 LVDS_6+ LVDS
57 GND logic Ground 58 LVDS_6- LVDS
59 AIN_3- 60 GND logic Ground
61 AIN_3+ 0 – 2.9 Volt 62 LVDS_7+ LVDS
63 GND logic Ground 64 LVDS_7- LVDS
65 GND logic Ground 66 GND logic Ground
67 AIN_4- 68 LVDS_8+ LVDS
69 AIN_4+ 0 – 2.9 Volt 70 LVDS_8- LVDS

TAMC900-A1 User Manual Issue 1.0.2 Page 17 of 17
Pin Signal Level Pin Signal Level
71 GND logic Ground 72 GND logic Ground
73 GND logic Ground 74 LVDS_9+ LVDS
75 AIN_5- 76 LVDS_9- LVDS
77 AIN_5+ 0 – 2.9 Volt 78 GND logic Ground
79 GND logic Ground 80 GND logic Ground
81 GND logic Ground 82 GND logic Ground
83 AIN_6- 84 TRIG_0+ LVDS
85 AIN_6+ 0 – 2.9 Volt 86 TRIG_0- LVDS
87 GND logic Ground 88 GND logic Ground
89 GND logic Ground 90 TRIG_1+ LVDS
91 AIN_7- 92 TRIG_1- LVDS
93 AIN_7+ 0 – 2.9 Volt 94 GND logic Ground
95 GND logic Ground 96 TRIG_2+ LVDS
97 GND logic Ground 98 TRIG_2- LVDS
99 - - 100 GND logic Ground
101 - - 102 GND logic Ground
103 - - 104 CLKIN_0+ LVDS
105 - - 106 CLKIN_0- LVDS
107 GND logic Ground 108 GND logic Ground
109 GP_IO_10 2,5 Volt CMOS 110 CLKIN_1+ LVDS
111 GP_IO_11 2,5 Volt CMOS 112 CLKIN_1- LVDS
113 GP_IO_12 2,5 Volt CMOS 114 GND logic Ground
115 GP_IO_13 2,5 Volt CMOS 116 CLKIN_2+ LVDS
117 GP_IO_14 2,5 Volt CMOS 118 CLKIN_2- LVDS
119 GP_IO_15 2,5 Volt CMOS 120 GND logic Ground
Table 7-4 : Pin Assignment SiCA Connector