Texas Instruments ADS5413EVM User manual

ADS5413EVM
January 2004 Wireless Infrastructure Products
User’s Guide
SLWU012

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Copyright 2004, Texas Instruments Incorporated

EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the specified input and output voltage ranges
described in the EVM User’s Guide.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
60°C. The EVM is designed to operate properly with certain components above 60°C as long
as the input and output ranges are maintained. These components include but are not limited
to linear regulators, switching transistors, pass transistors, and current sense resistors. These
types of devices can be identified using the EVM schematic located in the EVM User’s Guide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated

Contents
iii
Contents
1 Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Purpose 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 EVM Basic Functions 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3.1 Voltage Limits 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 ADS5413 EVM Operational Procedure 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Circuit Description 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Schematic Diagram 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Circuit Function 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1 Analog Inputs 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2 Clock Inputs 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3 Control Inputs 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4 Power 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5 Outputs 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Physical Description 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 PCB Layout 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Parts List 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Schematic 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures
3−1 Top Layer 1 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−2 Layer 2, Ground Plane 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3 Layer 3, Power Plane 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−4 Layer 4, Power Plane 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−5 Layer 5, Ground Plane 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−6 Layer 6, Bottom Layer 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1−1 Two Pin Jumper List Table 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−2 Three Pin Jumper List Table 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
iv
3−1 Parts List 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
v

1-1
Overview
Overview
This user’s guide document gives a general overview of the ADS5413
evaluation module (EVM) and provides a general description of the features
and functions to be considered while using this module.
Topic Page
1.1 Purpose 1−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 EVM Basic Functions 1−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Power Requirements 1−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 ADS5413 EVM Operational Procedure 1−2. . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

1-2
1.1 Purpose
The ADS5413 EVM provides a platform for evaluating the ADS5413
analog-to-digital converter (ADC) under various signal, reference, and supply
conditions. This document should be used in combination with the EVM
schematic diagram supplied.
1.2 EVM Basic Functions
Analog input to the ADC is provided via two external SMA connectors. The
single-ended input the user provides is converted into a differential signal at
the input of the device. One input uses a differential amplifier, while the other
input is transformer coupled.
The EVM provides external SMA connectors for input of the ADC clock. The
EVM allows the user to send a single-ended or differential clock to the ADC.
Another SMA connector allows the user to send a second clock source to the
output connector along with the digital data. This allows the user to provide the
required setup and hold times of the output data with respect to the output
clock. See the Clock Inputs section for proper configuration and operation.
Digital outputs from the EVM are via a 40-pin connector. The digital lines from
the ADC are buffered before going to this connector. More information on
these connectors can be found in the ADC output section.
Power connections to the EVM are via banana jack sockets. Separate sockets
are provided for the ADC core, output drivers, and external
reference/differential amplifier supplies.
1.3 Power Requirements
The EVM can be powered directly with only a 3.3-V supply if using the ADC
with 3.3-VDC output levels.
±5 V is required if using the differential amplifier input. 1.8 V is required for
DRVDD if 1.8-V logic output levels are desired.
1.3.1 Voltage Limits
Exceeding the maximum input voltages can damage EVM components.
Under voltage may cause improper operation of some or all of the EVM
components.
1.4 ADS5413 EVM Operational Procedure
The ADS5413EVM provides a flexible means of evaluating the ADS5413 in a
number of modes of operation. A basic set-up procedure that can be used as
a board confidence check is as follows:
1) Verify all jumper settings against the schematic jumper listed in Table 1−1
and Table 1−2.

1-3
Overview
Table 1−1.Two Pin Jumper List Table
Jumper Function Installed Removed Default
SJP1 Differential amplifier
common-mode voltage
input
Applies ADC common mode to
differential amplifier No connection Removed
W4 External REFT feed External Internal Removed
W9 External REFB feed External Internal Removed
Table 1−2.Three Pin Jumper List Table
Jumper Function Location: Pins 1−2 Location: Pins 2−3 Default
SJP2 Transformer and differential
amplifier common-mode
select
External common-mode voltage ADC output common-
mode voltage 2−3
W1 Reference select External reference Internal reference 2−3
W2 DRVDD voltage source +3.3 Vdc Voltage from J13 1−2
W5 Duty cycle select Duty cycle adjust off Duty cycle adjust on 1−2
W7 Power down select Operate mode Power-down mode 1−2
2) Connect supplies to the EVM as follows:
a) 3.3-V core and output driver supply to J6 and return to J5.
3) Switch power supply on.
4) Use a function generator with 50-Ωoutput to input an 65-MHz, 0-V offset,
2-Vp−pamplitude differential sine-wave signal into J3 and the
complementary signal into J4 to provide a true differential ADC input clock.
The frequency of the clock must be within the specification for the device
speed grade.
5) Use a function generator with 50-Ωoutput to input a 1.65-V offset, 3.3-Vp−p
amplitude square-wave signal into J9 to be used as the buffered output
clock. This signal must be the same frequency and synchronized with the
ADC clock.
6) Use a frequency generator with 50-Ωoutput to input a 17-MHz, 0-V offset,
1-Vp−pamplitude sine-wave signal into J2. This provides a transformer
coupled differential input signal to the ADC.
7) The digital pattern on the output connector J10 should now represent a
sine wave and can be monitored using a logic analyzer.

1-4

2-1
Circuit Description
Circuit Description
This chapter discusses the circuit description of the ADS5413 EVM.
Topic Page
2.1 Schematic Diagram 2−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Circuit Function 2−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

2-2
2.1 Schematic Diagram
The schematic diagram for the EVM is attached to the end of this document.
2.2 Circuit Function
The following paragraphs describe the function of individual circuits. See the
relevant data sheet for device operating characteristics.
2.2.1 Analog Inputs
The ADC has either transformer-coupled inputs or differential amplifier inputs
from a single-ended source. The inputs are provided via SMA connectors J1
and J2 on the EVM, which must be configured as follows:
1) For a 1:1 transformer coupled input to the ADC, a single-ended source is
connected to J2. R36, R38, SJP1 must be removed, and R41 and R45
must be installed. The input is ac coupled and has a 50-Ωterminator. This
is the default configuration for the EVM.
2) For a differential amplifier input to the ADC, a single ended source is
connected to J1. R36, R38, and SJP1 must be installed, and R41 and R45
must be removed. The input has a 50-Ωterminator.
2.2.2 Clock Inputs
The EVM provides separate inputs for the ADC clock and output buffer clock.
This allows the user to send a modified version of the ADC clock (inverted,
delayed, etc…) with the output data to generate the required setup and hold
times for the users interface.
2.2.2.1 True Differential ADC Clock
To provide a true differential clock, input a positive 65 MHz, 0-V offset, 0.5 Vp−p
amplitude sine-wave signal into J3 and the complimentary signal into J4. This
is the default configuration for the EVM
2.2.2.2 Single-Ended ADC Clock
To provide a single-ended ADC clock, simply connect a single-ended source
to J3. No board modifications are required.
2.2.2.3 Transformer-Coupled Differential ADC Clock
To provide a transformer-coupled differential clock using a single-ended input
source, configure the board as follows:
1) Install T2, R39, C31, and C32 and remove C25 and C40.
2) Connect the single-ended clock input to J12. The clock is ac-coupled and
terminated with 50 Ω.
2.2.2.4 Buffer Clock
To provide a clock to the output buffer, apply a +3.3 V, 1.65-V offset signal input
to J9. This input is terminated with a 50-Ωresistor to ground. This signal must
be the same frequency and synchronized with the ADC clock

2-3
Circuit Description
2.2.3 Control Inputs
The EVM has three discrete inputs to control the operation of the device.
2.2.3.1 Power Down
With jumper W7 installed between pins 2 and 3, the ADC is in power down
mode. The device is in operate mode with jumper W7 installed between pins
1 and 2 or removed. (The device has a weak internal pulldown resistor on this
pin).
2.2.3.2 External Reference
With jumper W1 installed between pins 2 and 3, the ADC is in internal
reference mode. The device is in external reference mode with jumper W1
installed between pins 1 and 2. (The device has a weak internal pulldown
resistor on this pin).
2.2.3.3 Duty Cycle Adjust Select
With jumper W5 installed between pins 2 and 3, the ADC is in the duty cycle
adjust mode (DCS). The DCS is disabled with jumper W5 installed between
pins 1 and 2. (The device has a weak internal pullup resistor on this pin).
2.2.4 Power
Power is supplied to the EVM via banana jack sockets. A separate connection
is provided for a 3.3-V core supply (J6 and J5), 1.8-V/3.3-V digital driver supply
(J13 and J14), and±5-V differential amplifier and external reference generator
supplies (J7, J8, and J11). The digital driver supply is only required if jumper
W2 is between pins 2 and 3.
2.2.5 Outputs
The data outputs from the ADC are buffered using a SN74AVC16244 before
going to header J10. The ADC and output buffer can provide 1.8-V or 3.3-V
output levels. This is selected by the voltage placed on the digital driver power
inputs (DRVDD). J10 is a standard 40-pin header on a 100-mil grid and allows
easy connection to a logic analyzer.

2-4

3-1
Physical Description
Physical Description
This chapter describes the physical characteristics and PCB layout of the
EVM, lists the components used on the module, and shows the schematic.
Topic Page
3−1 PCB Layout 3−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−2 Parts List 3−8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−3 Schematic 3−9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3

3-2
3.1 PCB Layout
The EVM is constructed on a 6-layer, 4.25-inch ×5.3-inch, 0.062-inch thick
PCB using FR−4 material. The individual layers are shown in Figure 3−1
through Figure 3−6.
Figure 3−1.Top Layer 1

3-3
Physical Description
Figure 3−2.Layer 2, Ground Plane

3-4
Figure 3−3.Layer 3, Power Plane

3-5
Physical Description
Figure 3−4.Layer 4, Power Plane