Texas Instruments TPS51123 User manual

User’s Guide
TPS51123 Buck Controller Evaluation Module User's
Guide
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 Performance Specification Summary................................................................................................................................... 2
3 Schematic................................................................................................................................................................................3
4 Test Setup and Results.......................................................................................................................................................... 4
5 Configuration.......................................................................................................................................................................... 6
6 Physical Layouts.................................................................................................................................................................... 7
7 List of Materials.....................................................................................................................................................................11
8 References............................................................................................................................................................................ 12
9 Revision History................................................................................................................................................................... 12
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TPS51123 Buck Controller Evaluation Module User's Guide 1
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1 Introduction
The TPS51123 is a cost effective, dual-synchronous buck controller targeted for notebook system power supply
solutions. It provides 5-V and 3.3-V LDOs and requires few external components. The TPS51123 supports
high-efficiency, fast transient response and provides a combined power-good signal. Out-of-Audio™ mode light-
load operation enables low acoustic noise at much higher efficiency than conventional forced PWM operation.
Adaptive on-time D-CAP™ control provides convenient and efficient operation. The device operates with supply
input voltages ranging from 5.5 V to 28 V and supports output voltages from 2 V to 5.5 V.
The TPS51123EVM evaluation module is a high-efficiency, dual synchronous buck converter providing 5 V at 8 A
and 3.3 V at 8 A from a 8-V to 25-V input.
Trademarks
Out-of-Audio™ and D-CAP™ are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
2 Performance Specification Summary
Table 2-1 gives the EVM performance specifications and qualifications.
Table 2-1. Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNITS
VIN Input voltage range Voltage applied to VBAT 8 25 V
CHANNEL1
VOUT Output voltage 5 V
fOperating frequency VTONSEL = VVREF, VVIN = 12 V, IOUT = 6 A 245 kHz
IOUT Output current 8 V ≤ VVIN ≤ 25 V 8 A
IOC Overcurrent limit VVIN = 12 V 10
CHANNEL2
VOUT Output voltage 3.3 V
fOperating frequency VTONSEL = VVREF, VVIN = 12 V, IOUT = 6 A 305 kHz
IOUT Output current 8 V ≤ VVIN ≤ 25 V 8 A
IOC Overcurrent limit VVIN = 12 V 10
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3 Schematic
Figure 3-1. TPS51123-EVM Schematic Diagram
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4 Test Setup and Results
4.1 Test Setup
Connect the test equipment and TPS51123EVM board as shown in Figure 4-1.
Electronic
Load1
Electronic
Load2
DMM1
DMM2
12V/10A
Power Supply
DMM3
+
_
+
_
Oscilloscope
CH1
CH2
Oscilloscope
+
_
VO2_GND
VO2
CN2
VO1
VO1_GND
VBAT_GND
VBAT
CN1
HPA399
TPS51123EVM
+
_
+
_
_
+
Electronic
Load1
Electronic
Load2
DMM1
DMM2
12V/10A
Power Supply
DMM3
+
_
+
_
Oscilloscope
CH1
CH2
Oscilloscope
+
_
VO2_GND
VO2
CN2
VO1
VO1_GND
VBAT_GND
VBAT
CN1
VO2_GND
VO2
CN2
VO1
VO1_GND
VBAT_GND
VBAT
CN1
HPA399
TPS51123EVM
+
_
+
_
_
+
Figure 4-1. Equipment Setup for TPS51123EVM Board
4.2 Test Procedure
1. Ensure the switches SW4 (ENC) and SW3 (EN0) are in the “OFF” position.
2. Ensure the shunt jumper for JP1 is set to 5-pin to 6-pin (Med1), and shunt jumper for JP2 is set to 5-pin to
6-pin (auto-skip).
3. Apply appropriate VBAT voltage to the VBAT and VBAT_GND terminals.
4. Turn on SW3 (EN0), and both VREG5 (5V-LDO) and VREG3 (3.3V-LDO) start up.
5. When SW3 stays on, VREF (2V-REF) is enabled.
6. When SW3 stays on and turn on SW4 (ENC), CH1-output, and CH2-output start up.
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4.3 Start-Up Performance
ENC (5 V/div)
VOUT1 (2 V/div)
PGOOD (5 V/div)
Figure 4-2. 5-V Start-Up Waveforms
ENC (5 V/div)
VOUT2 (2 V/div)
PGOOD (5 V/div)
Figure 4-3. 3.3-V Start-Up Waveforms
4.4 Transient Performance
Figure 4-4. 5-V Load Transient Response Figure 4-5. 3.3-V Load Transient Response
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TPS51123 Buck Controller Evaluation Module User's Guide 5
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5 Configuration
This EVM can be set at a configuration of the user's choice. Please refer to the following specific configuration
setting sections.
5.1 Switching Frequency Selection
The switching frequency can be set by the TONSEL pin using JP1 on the EVM. The default setting is 245 kHz
for CH1 and 305 kHz for CH2.
Table 5-1. Switching Frequency Selection
TONSEL
CONNECTION
SWITCHING FREQUENCY (kHz)
CH1 CH2
GND (SLOW) 200 250
VREF (MED1) 245 305
VREG3 (MED2) 300 375
VREG5 (FAST) 365 460
5.2 Operation Mode Selection
Operation mode can be set by the SKIPSEL pin using JP2 on the EVM. The default setting on the EVM is
auto-skip mode.
Table 5-2. Operation Mode Selection
SKIPSEL CONNECTION OPERATION MODE
GND Auto skip
VREF PWM only
VREG5 Out-of-Audio
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6 Physical Layouts
This section provides the board layout and assembly drawings for the EVM, that include the top layer (Figure
6-1), the bottom layer (Figure 6-2), and inner layer views (Figure 6-3 and Figure 6-4) of the EVM.
Figure 6-1. Top Layer Routing
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Figure 6-2. Bottom Layer Routing
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Figure 6-3. Inner Layer 1
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Figure 6-4. Inner Layer 2
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