Texas Instruments ADS62P EVM Series User manual

ADS62PXXEVM
User's Guide
Literature Number: SLAU237AMay 2008 – Revised April 2009

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Contents
1 Overview ............................................................................................................................. 61.1 ADS62PXX EVM Quick-Start Procedure .............................................................................. 62 Circuit Description ............................................................................................................... 82.1 Schematic Diagram ....................................................................................................... 82.2 ADC Circuit Function ..................................................................................................... 83 TI ADC SPI Control Interface ................................................................................................ 173.1 Installing the ADC SPI Control Software ............................................................................. 173.2 Setting Up the EVM for ADC SPI Control ............................................................................ 183.3 Using the TI ADC SPI Interface Software ............................................................................ 194 Connecting to FPGA Platforms ............................................................................................ 214.1 TSW1200 Capture Board ............................................................................................... 214.2 TSW1100 ................................................................................................................. 245 ADC Evaluation .................................................................................................................. 255.1 Hardware Selection ..................................................................................................... 255.2 Coherent Input Frequency Selection .................................................................................. 266 Physical Description ........................................................................................................... 276.1 PCB Layout ............................................................................................................... 276.2 Bill of Materials ........................................................................................................... 316.3 EVM Schematics ........................................................................................................ 33
Important Notices ............................................................................................................... 39
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List of Figures
1 ADS62PXX Jumpers ........................................................................................................ 82 ADS62PXX Surface Jumpers .............................................................................................. 93 ADS62PXXEVM Power Distribution ..................................................................................... 104 CDCE72010 EEPROM Configuration Block Diagram ................................................................. 165 Found New Hardware ..................................................................................................... 176 Window Logo Testing ...................................................................................................... 187 Hardware Device Manager ................................................................................................ 188 SPI Interface Screen ....................................................................................................... 199 TSW1200 GUI Introduction ............................................................................................... 2110 Quick-Setup Test Result .................................................................................................. 2211 ADC Performance With Clock Through Onboard VCXO, CDCE72010 and Crystal Filter ....................... 2312 ADC Performance With Clock Through Onboard VCXO, CDCE72010 Configured for Differential LVPECLOutput ........................................................................................................................ 2413 Top Silkscreen .............................................................................................................. 2714 Component Side ............................................................................................................ 2815 Power Plane 1 .............................................................................................................. 2816 Layer 2 ....................................................................................................................... 2917 Layer 3 ....................................................................................................................... 2918 Bottom Side ................................................................................................................. 3019 EVM Schematic, Sheet 1 .................................................................................................. 3320 EVM Schematic, Sheet 2 .................................................................................................. 3421 EVM Schematic, Sheet 3 .................................................................................................. 3522 EVM Schematic, Sheet 4 .................................................................................................. 3623 EVM Schematic, Sheet 5 .................................................................................................. 3724 Breakout Board Schematic, Sheet 6 ..................................................................................... 38
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List of Tables
1 Jumper List ................................................................................................................... 72 EVM Power Supply Jumper Description ................................................................................ 113 EVM Power Supply Options .............................................................................................. 114 Analog Input Jumper description ......................................................................................... 125 EVM Analog Input Options ................................................................................................ 136 Clock Input Jumper Description .......................................................................................... 147 EVM Clock Input Options ................................................................................................. 158 ADS62PXX Frequently Used Registers ................................................................................. 209 Bill of Materials ............................................................................................................. 31
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1 Overview
1.1 ADS62PXX EVM Quick-Start Procedure
User's GuideSLAU237A – May 2008 – Revised April 2009
ADS62PXXEVM
This user’s guide gives a general overview of the evaluation module (EVM) and provides a generaldescription of the features and functions to be considered while using this module. This manual isapplicable to the ADS62P42/43/44/45/48/49, ADS62P22/23/24/25/28/29 and ADS62C15/17 analog todigital converters (ADC), which will be collectively referred to as ADS62PXX. This document should beused in combination with respective ADC data sheet. The ADS62PXX EVM provides a platform forevaluating the analog-to-digital converter (ADC) under various signal, clock, reference and power supplyconditions.
The ADS62PXXEVM provides numerous options for providing clock, input frequency and power to theADC under evaluation. The quick start procedure describes how to quickly get initial results using thedefault configuration of the EVM as it was shipped. The EVM can be put back to default configuration bysetting all jumpers to the default positions as described in Table 1 . The default configuration of the EVM isfor the Input Frequency (IF) and the clock input, each to be a single ended input that istransformer-coupled to the ADC. The default configuration for the power supply is to provide a single 5Vsupply to the red banana jack J10, PWR IN. The default configuration for the EVM is to control the modesof operation by jumper settings for parallel input control pins rather than serial SPI control of the registerspace. The other modes of operation of the EVM are described in the latter sections of this document. Ifusers modify the default jumper settings, this procedure does not apply.
A quick-setup procedure for the default configuration of the ADS62PXX follows:
1. Verify all the jumper settings against the schematic jumper list in Table 1 .2. Connect the 5V supply between J10 (PWR IN) and J12(GND). If you are using the TSW1200 forcapture, it also can be used to source 5V for the EVM. To use the 5V output power of the TSW1200,configure JP8 to short 1-2, J22 to short 1-2, and jumper over 5V from the banana jacks on theTSW1200 to J10 on the ADC EVM. Do not connect a voltage source greater than 5.5V.3. Switch on power supplies.4. Using a function generator with 50 Ωoutput impedance, generate a 0V offset, 1.5V
PP
sine-wave clockinto J19. The frequency of the clock must be within the specification for the device speed grade.5. Use a frequency generator with a 50 Ωoutput impedance, generate a 0V offset, –1 dBFS-amplitudesine-wave signal into J6 (Channel A) or J3 (Channel B).This provides a transformer-coupled differentialinput signal to the ADC.6. Connect the TSW1200 or suitable logic analyzer to J8 to capture the resulting digital data. If aTSW1200 is being used to capture data, follow the additional alphabetically labeled steps. For moredetails, see Connecting to FPGA Platforms , located in this document.a. After installing the TSW1200 software and connecting the TSW1200 to the USB port, open theTSW1200 software.b. Depending on the ADC under evaluation, select from the TI ADC Selection pull-down menu.c. Change the ADC Sample rate and ADC Input frequency to match those of the signal generator.d. After selecting a Single Tone FFT test, press the Capture Data button.
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Table 1. Jumper List
Jumper Function Default Jumper Setting
Interface Circuit Operational Amplifier THS4509 (Bypassed)
SJP1 AMP_OUT+ 1-2SJP2 AMP_OUT- 1-2JP3 THS4509_PD 2-3SJP5 AMPIN- 1-2SJP3 AMPIN+ No Shunt
ADC Circuit
JP11 Parallel 1-2JP9 SDATA 1-2JP10 SEN 1-2MODE (Internal or External reference and GainJP12 1-2selection)JP8 SCLK 1-2JP5 CTRL3 1-2JP6 CTRL2 1-2JP7 CTRL1 1-2JP13 No ShuntDFS (Data Format and LVDS/CMOS outputJP14 3-4interface)JP22 SDOUT/SPI-MISO Selection No Shunt
Clock Interface Circuit
J18 VCXO EN No ShuntSJP4 CLOCKIN 1-2SJP7 CLOCKIN, Y0, Y1P SELECT 1-2SJP6 YIN SELECT 1-2SJP8 PLL LOCK 1-2J15 RST (CDC Reset) No ShuntJ14 CDC_PWRDWN 1-2JP20 AUX SEL 1-2JP21 MODE_SEL 1-2
Power Supply
JP15 ADC VA 1-2JP18 ADC VD 1-2JP16 TPS79501 INPUT SELECT 1-2JP19 5V_AUX 1-2JP17 TPS5420 INPUT SELECT No Shunt
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2 Circuit Description
2.1 Schematic Diagram
2.2 ADC Circuit Function
Circuit Description www.ti.com
The schematic diagram for the this EVM is attached at the end of this document. See the schematic orrelevant section of this user's guide before changing any jumpers.
Selection of various modes of operation of the ADS62PXX EVM is most often controlled by jumpers on theEVM, either by placing shunts on 0.025-inch square jumper posts or by installation of surface mount 0 Ωresistors. In general, the use of 0 Ωresistors as jumpers are used in the clock or signal path where signalintegrity is critical, and jumper posts are used for static or low-speed control paths. Figure 1 shows therelative location of the jumpers, connectors, and switches used on the ADS62PXX EVM. Figure 2 showsthe relative locations of most of the resistors and surface-mount 0 Ωjumper locations used on the EVM. Inthe description of the circuit options in the following sections, each operational mode is accompanied by atable entry that details the jumper or resistor changes that enable that option. Figure 1 and Figure 2 canassist the user to quickly identify where these jumpers are located on the EVM.
Figure 1. ADS62PXX Jumpers
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2.2.1 ADC Operational Mode
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Figure 2. ADS62PXX Surface Jumpers
By default, the ADC is configured to operate in parallel-mode operation, since jumper (JP11) asserts a3.3V state to the ADC reset pin. Consequently, the SW1 reset pushbutton must be pressed only when thedevice is configured in serial operation mode. Since the ADC is in parallel operation mode, voltages areused to set the ADC configuration modes. Users can use the information printed on the EVM silkscreen toset the operation modes.
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2.2.2 EVM Power Connections
Circuit Description www.ti.com
Figure 3. ADS62PXXEVM Power Distribution
Power is supplied to the EVM through banana jacks. From this input power, several different ways ofdelivering power to the ADC and other EVM functions are available. Figure 3 shows a simplifiedrepresentation of the power options available for the ADS62PXXEVM. The default option is to provide 5Vto the red banana jack J10, and from there, the EVM generates 3.3V for the analog supply to the ADCand the necessary digital supply voltage for the populated ADC. The EVM also generates the propervoltages for optional features of the EVM such as the Clock Generation circuitry, the USB circuitry, andthe CMOS output buffer.
Some ADC devices that may be evaluated on the ADS62PXXEVM platform do not take 1.8V for the digitalsupply, but rather require 3.3V for the digital supply. For this reason, an adjustable voltage regulator waschosen for the digital supply; the output may be changed to 3.3V by changing the value of a resistor, R269and capacitor C148. The resistor and capacitor need not to be changed in the field unless the ADC isbeing changed, because the EVM ships with the correct digital supply voltage for the ADC that is installed.For reference, ADS62P42/43/44/45,ADS62P22/23/24/25 and ADS62C15 use 3.3V as digital supply for theADC whereas ADS62P48/49,ADS62P28/29 and ADS62C17 use 1.8V as digital supply for the ADC.
Power for the optional THS4509 operational amplifier is supplied by banana jacks J11 and J13. If theamplifier is being evaluated in AC coupled configuration, 5V is supplied to J11, and J13 is connected toground. In DC-coupled configuration, 4V is supplied to J11 and –1V is supplied to J13. Otherwise, theseinputs may be left unconnected.
Although various power options are available on this EVM, care must be taken while applying power onJ10 as different options have different voltage ranges specified. Table 2 displays the general jumpersetting information; Table 3 displays the various power option settings. Prior to making any jumpersettings, see the schematics located at the end of this document.
CAUTION
Voltage limits: Exceeding the maximum input voltages can damage EVMcomponents. Undervoltage can cause improper operation of some or all of theEVM components.
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