Texas Instruments TPS92518EVM User manual

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TPS92518EVM Dual Buck Controller Evaluation Module
User's Guide
SLUUBM0–May 2017
TPS92518EVM Dual Buck Controller Evaluation Module
This user's guide describes the specifications, board connection description, characteristics, operation,
and use of the combined, two board TPS92518 Evaluation Module (EVM). A complete schematic diagram,
printed circuit board layouts, and bill of materials are included in this document.
Contents
1 Description.................................................................................................................... 2
2 Performance Specifications ................................................................................................ 3
3 Performance Data and Typical Characteristic Curves.................................................................. 4
4 Schematic, PCB Layout, and Bill of Materials.......................................................................... 11
5 Software ..................................................................................................................... 16
6 Use of LEDSPIMCUEVM-879 Microcontroller Board for SPI Communications with the TPS92518............ 22
List of Figures
1 Frequency vs Output Voltage.............................................................................................. 4
2 Efficiency Over Temperature at Different Peak Threshold Settings .................................................. 4
3 PWM Dimming, Multiple PWM Frequencies, Both Channels.......................................................... 5
4 Single-Channel PWM Dimming at 400 Hz ............................................................................... 5
5 SPI Setting Output Enable Bit and Subsequent Switching Initiation.................................................. 6
6 Hardware PWM Enable Pulled High, Triggering Switching ............................................................ 6
7 SPI Clearing Output Enable Bit and Subsequent Switching Shutdown .............................................. 7
8 Hardware PWM Enable Pulled Low, Triggering Chip Shutdown...................................................... 7
9 Current Sharing.............................................................................................................. 8
10 Switch Node Current ........................................................................................................ 8
11 Switch Node Current ........................................................................................................ 9
12 Additional Circuitry Required for Shunt FET Dimming ............................................................... 10
13 TPS92518EVM-878 Schematic .......................................................................................... 11
14 TPS92518EVM-878 Top Side............................................................................................ 12
15 TPS92518EVM-878 Bottom Side ........................................................................................ 13
16 Setup Screen 1............................................................................................................. 16
17 Setup Screen 2............................................................................................................. 16
18 Setup Screen 3............................................................................................................. 17
19 Setup Screen 4............................................................................................................. 17
20 Setup Screen 5............................................................................................................. 18
21 Setup Screen 6............................................................................................................. 18
22 Setup Screen 7............................................................................................................. 19
23 Setup Screen 8............................................................................................................. 19
24 Setup Screen 9............................................................................................................. 20
25 Setup Screen 10 ........................................................................................................... 20
26 Setup Screen 11 ........................................................................................................... 20
27 LEDSPIMCUEVM-879 Schematic, Page 1 ............................................................................. 22
28 LEDSPIMCUEVM-879 Schematic, Page 2 ............................................................................. 23
29 LEDSPIMCUEVM-879 Schematic, Page 3 ............................................................................. 24

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30 LEDSPIMCUEVM-879 Schematic, Page 4 ............................................................................. 25
List of Tables
1 Connector Descriptions..................................................................................................... 2
2 Test Points.................................................................................................................... 3
3 TPS92518 EVM Performance Specifications............................................................................ 3
4 TPS92518EVM-878 Bill of Materials..................................................................................... 14
Trademarks
Microsoft, .NET Framework are registered trademarks of Microsoft Corporation.
All other trademarks are the property of their respective owners.
1 Description
The complete two-board TPS92518EVM solution provides a dual-channel, high-brightness LED current
regulator which is configurable via a graphical user interface (GUI). It is designed to operate with an input
voltage in the range of 6.5–65 V. The EVM is setup for default output currents of 538 mA per channel,
easily adjustable to different currents up to 1.65 A, for an LED stack between approximately 3 V to nearly
65 V. The TPS92518 provides high efficiency, high bandwidth, fast PWM dimming, SPI dimming, and
adjustable on-time.
1.1 Typical Applications
This manual outlines the operation and implementation of the TPS92518 as a dual-channel LED current
regulator with the specifications listed in Table 1. For applications with a different input voltage range or
different output voltage range, refer to the TPS92518 data sheet (SLUSCR7). The TPS92518EVM-878
evaluation board is designed to be controlled by a TI microcontroller board, part number
LEDSPIMCUEVM-879, available separately, although it can be controlled by any SPI-capable control
system. Note that the TPS92518x supports a means to enable the part without SPI communication. By
applying a voltage above the second threshold level, 23.6 V typical, on the ENABLE pin, the state of the
LEDxEN register is bypassed. This allows a TPS92518 to be powered and operated using the default
register values (for details, refer to the TPS92518 data sheet (SLUSCR7)).
1.2 Connector Description
Table 1 describes the connectors and Table 2 lists the test points on the EVM and how to properly
connect, set up, and use the TPS92518EVM-878.
Table 1. Connector Descriptions
Connector Label Description
J1 and J18 VIN, GND
J1 connects power to channel 1 of the board, and J18 connects power to channel 2.
The evaluation board is set up with both channel supplies connected through R15,
so power connection can be to either J1 or J18 to power both channels from a
single supply. The board silkscreen identifies power (one pin) and ground (two pins)
connections on each connector.
J2 and J3 LED+, LED– and GND J2 connects the channel 1 output to the LED load, and J3 connects the channel 2
output to a separate LED load. The leads to the LED load should be twisted and
kept short to minimize voltage drop, inductance, and EMI. The board silkscreen
identifies LED+ and LED– and GND.
J4 SPI control header J4 allows attachment of a header cable for SPI control of the chip. The board
silkscreen identifies GND, MISO, MOSI, SCK, and SSN.
J10 and J11 SPI control from an LEDSPIMCUEVM-879
controller board
J10 and J11 allow daisy-chaining TPS92518EVM-878 boards to each other with one
LEDSPIMCUEVM-879 control board attached to the left-hand side of the left-most
evaluation board for controlling the TPS92518. This interface allows control of the
chip hardware enable line, PWM inputs to both channels, SPI lines, and hardware
address lines for multiple SSN settings for systems that have multiple
TPS92518EVM-878 boards controlled by a single LEDSPIMCUEVM-879 controller
interface board.
J12 and J14 SPI MISO pullup resistor
jumpers J12 and J14 provide for two different values of pullup resistor to the MISO line, 2.2 kΩand 4.7 kΩprovided on the evaluation board.

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Table 1. Connector Descriptions (continued)
Connector Label Description
J13 and J15 PWM jumpers
J13 and J15 are jumpers provided to allow for PWM signals to the two channels to
be generated from an LEDSPIMCUEVM-879 (when populated) or applied from an
external source (when jumper is removed and the signal is connected to pin 1 one
of the connector). J13 provides PWM to channel 1 of the chip, while J15 provides
PWM to channel 2.
J9 SSN configuration
jumper J9 allows configuration of the SSN chip select line for use with multiple chips on the same SPI bus.
J8 MISO This jumper enables configurations: shorting pins 5–6 sets the SPI communication
architecture up for a single TPS92518 or the end point of a daisy chain of them,
shorting 1–2 and 5–6 sets up for a TPS92518 in the middle of a daisy-chain, and
shorting 3–4 and 5–6 provides for a star architecture.
J7 SPI DI out If this jumper is closed, it allows multiple TPS92518 devices to be connected in a
star configuration.
J10 Control connector This connector allows the TPS92518 board to attach to a microcontroller, such as
the LEDSPIMCUEVM-879.
Table 2. Test Points
Test Point Description
Metal turrets All metal turrets are grounds.
PWM1 and PWM2 The test points labeled PWM1 and PWM2 allow for external signal sources to control the TPS92518
hardware PWM dimming.
ENABLE The test point labeled ENABLE near J10 allows for an external enable signal to control switching of
the TPS92518.
VDIGI The VDIGI test point allows for external application of power to the MISO pull-up resistors or
monitoring of the pull-up voltage.
SW1 and SW2 The SW1 and SW2 test points provide locations to monitor the switch nodes of the two channels.
VIN The VIN test point allows for external application of power to the digital system of the chip
independent of the analog power supplies to either channel 1 or 2. On the evaluation board this is
shorted to the analog supply by R16, so separate application of power is neither necessary nor useful
without removal of R16.
2 Performance Specifications
Table 3. TPS92518 EVM Performance Specifications
Parameter Test Conditions Min Typ Max Units
Input Characteristics
Voltage 6.5 14 65 V
Maximum Input
Current 2.5 A
Output Characteristics
Output Voltage,
VLED
Output/LED Voltage (absolute maximum) 0 65 V
Output/LED Voltage (practical limit) 60
Output Current,
ILED
Output current 0 1.65 A
Default Output Current (Registers = 127/255) 0.538
Dimming Methods
Analog LEDx_PKTH_DAC register = 0 to 255 yes
PWM Use PWMx pin input yes
Shunt FET Use external FET, program LEDx_MAXOFF_DAC register as per
datasheet outline yes

Temperature (qC)
Efficiency (%)
Output Current (Amps)
-60 -40 -20 0 20 40 60 80 100 120 140 160
94 0.8
94.1 0.81
94.2 0.82
94.3 0.83
94.4 0.84
94.5 0.85
94.6 0.86
94.7 0.87
94.8 0.88
94.9 0.89
95 0.9
D001
Efficiency
ILED1
ILED2
Output Voltage (V)
Switching Frequency (Hz)
0 5 10 15 20 25 30 35 40 45 50 55
150000
200000
250000
300000
350000
400000
450000
500000
550000
600000
650000
700000
750000
800000
850000
900000
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Table 3. TPS92518 EVM Performance Specifications (continued)
Parameter Test Conditions Min Typ Max Units
Systems Characteristics
Switching
frequency Switching Frequency (fSW) Range 1 2000 kHz
Peak efficiency 95 %
Operating
temperature –40 25 125 ºC
3 Performance Data and Typical Characteristic Curves
Figure 1 through Figure 4 illustrate the performance data and typical characteristic curves.
Conditions: VIN 50 V, peak threshold = 50, minimum off-time = 127
Figure 1. Frequency vs Output Voltage
Conditions: IN50 V, VLED 24.7 V, peak threshold = 120, minimum off-time = 127
Figure 2. Efficiency Over Temperature at Different Peak Threshold Settings

Dutycycle (%)
Output Current (A)
0 10 20 30 40 50 60 70 80 90 100
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
Ch. 2, PWMfreq=400Hz
Dutycycle (%)
Output Current (A)
0 10 20 30 40 50 60 70 80 90 100
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
Ch. 1 PWMfreq=250Hz
Ch. 2 PWMfreq=250Hz
Ch. 1 PWMfreq= 400Hz
Ch. 2 PWMfreq=400Hz
Ch. 1 PWMfreq=600Hz
Ch. 2 PWMfreq=600Hz
Ch. 1 PWMfreq=1000Hz
Ch. 2 PWMfreq=1000Hz
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VIN 12 V, VLED 3 V, peak threshold = 127, off time = 127
Figure 3. PWM Dimming, Multiple PWM Frequencies, Both Channels
VIN 12 V, VLED 3 V, peak threshold = 127, off time = 127
Figure 4. Single-Channel PWM Dimming at 400 Hz

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3.1 Startup Waveforms
3.1.1 Startup After SPI Enable Command
Figure 5. SPI Setting Output Enable Bit and Subsequent Switching Initiation
3.1.2 Startup on Hardware Enable Pin Transition
Figure 6. Hardware PWM Enable Pulled High, Triggering Switching

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3.2 Shutdown Waveforms
3.2.1 Shutdown After SPI Disable
Figure 7. SPI Clearing Output Enable Bit and Subsequent Switching Shutdown
3.2.2 Shutdown After Hardware Enable Pin Transition
Figure 8. Hardware PWM Enable Pulled Low, Triggering Chip Shutdown

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3.3 Current Sharing
The TPS92518 device can be set up to share current with both channels driving a single load.
VIN = 65 V, driving 1 LED for a VLED of 3.0062 V, with a peak threshold = 45 to get approximately a 225-mA LED
current, showing max and mean inductor currents on channels 1 and 2
Figure 9. Current Sharing
3.4 Diode and Boot Capacitor Current
3.4.1 Diode, Inductor, and Boot Capacitor Current at Low Output Current
Showing inductor current into the LED and current flow through the catch diode and boot capacitor used for supplying
gate drive power. VIN = 65 V, VLED = 23 V, TOFF register setting = 50, peak threshold register setting = 1
Figure 10. Switch Node Current

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3.4.2 Diode, Inductor, and Boot Capacitor Current at High Output Current
Showing inductor current into the LED and current flow through the catch diode and boot capacitor used for supplying
gate drive power. VIN = 65 V, VLED = 23 V, TOFF register setting 50, peak threshold register setting = 1
Figure 11. Switch Node Current
3.4.3 Shunt FET Dimming
Shunt FET dimming is simple with the TPS92518. Short leads between the evaluation board and the LED
load boards are important to prevent VLED overshoot. Locating the shunt FET on or near the LED load
board also helps to reduce VLED overshoot. Adding an appropriately rated diode from the LED+ line that
conducts back to the positive VIN input will clamp voltage overshoot.
NOTE: There is no provision for mounting such a diode on the board: it must be soldered into the
wiring used to connect the shunt FET into the circuit.
Similarly, repopulating R17 and C21 with different values will also protect the VLED pin from overshoots.
Figure 12 illustrates the circuitry modifications for shunt FET dimming: increasing the size of R17, adding
a diode to VIN, and adding an appropriately-rated FET with a gate pulldown resistor. Either adding a diode
or increasing R17 should be adequate. While the modified schematic shows both output capacitors
removed, replacing one with a 220-pF capacitor rather than just removing both may give better VLED
overshoot performance.

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Figure 12. Additional Circuitry Required for Shunt FET Dimming
3.4.4 Undervoltage Lockout Description
The TPS92518 can be set up with undervoltage lockout protection with the ability to change the turn-on
threshold and hysteresis, by populating a resistive divider that is unpopulated on the evaluation board.
This involves loading R1 and changing the value of R2, and possibly populating C28. For details refer to
the TPS92518 data sheet (SLUSCR7).

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4 Schematic, PCB Layout, and Bill of Materials
This section contains TPS92518EVM-878 schematics, PCB layouts, and bill of materials (BOM).
4.1 Schematic
Figure 13 illustrates the TPS92518EVM-878 schematic.
Figure 13. TPS92518EVM-878 Schematic

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4.2 Layout
Figure 14 and Figure 15 illustrate the top and bottom side TPS92518EVM-878 PCB layouts.
Figure 14. TPS92518EVM-878 Top Side

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Figure 15. TPS92518EVM-878 Bottom Side

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4.3 Bill of Materials
Table 4 lists the TPS92518EVM-878 BOM.
Table 4. TPS92518EVM-878 Bill of Materials
Designator Qty Value Description Package Reference Part Number Manufacturer
(none) 1 Printed Circuit Board PWR878 Any
C2, C3, C4, C5, C6, C7, C8,
C9, C22, C23, C27 11 2.2uF CAP, CERM, 2.2 µF, 100 V, ±10%, X7R, AEC-Q200 Grade 1, CGA6N3X7R2A225K230AB TDK
C10, C13 2 0.1uF CAP, CERM, 0.1 µF, 16 V, ±10%, X7R, 0603 0603 GCM188R71C104KA37D Murata
C11, C12 2 2.2uF CAP, CERM, 2.2 µF, 16 V, ±10%, X7R, 0805 0805 GCM21BR71C225KA64L Murata
C14, C15, C17, C18 4 1uF CAP, CERM, 1 µF, 100 V, ±10%, X7R, 1206 1206 GCM31CR72A105KA03L Murata
D1, D2 2 100V Diode, Switching, 100 V, 0.2 A, SOD-123 SOD-123 MMSD4148T1G ON Semiconductor
D3, D4 2 100V Diode, Schottky, 100 V, 3 A, SMC SMC SS3H10HE3_A/I Vishay-Siliconix
D5 1 100V Diode, Schottky, 100 V, 0.25 A, SOD-323F SOD-323F BAT46WJ,115 NXP Semiconductor
H1, H2, H3, H4 4 Bumpon, Hemisphere, 0.44 X 0.20, Clear Transparent Bumpon SJ-5303 (CLEAR) 3M
J1, J5 2 Header, 2.54 mm, 3x1, TH Header, 2.54mm, 3x1, TH 22-11-2032 Molex
J2, J3 2 Header, 2.54mm, 2x1, Vertical, TH Header, 2.54mm, 2x1, TH 22-23-2021 Molex
J4 1 Header, 100mil, 5x1, Gold, TH 5x1 Header TSW-105-07-G-S Samtec
J6, J7, J12, J13, J14 5 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec
J8 1 Header, 100mil, 3x2, Gold, TH 3x2 Header TSW-103-07-G-D Samtec
J9 1 Header, 100mil, 4x2, Gold, TH 4x2 Header TSW-104-07-G-D Samtec
J10 1 Header, 2.54mm, 10x2, Tin, R/A, TH Header, 2.54mm, 10x2, R/A,
TH TSW-110-08-T-D-RA Samtec
J11 1 Receptacle, 2.54mm, 10x2, Gold, R/A, TH Receptacle, 2.54mm, 10x2,
R/A, TH SSW-110-02-G-D-RA Samtec
L1, L2 2 100uH Inductor, Shielded, Ferrite, 100 µH, 2 A, 0.108 ohm, AEC-Q200 Grade
0, SMD 12.8x12.5mm MDH12577C-101MA=P3 Murata
Q1, Q2 2 100V MOSFET, N-CH, 100 V, 20 A, AEC-Q101, 8-PowerVDFN 8-PowerVDFN STL8N10LF3 STMicroelectronics
R2 1 20.0k RES, 20.0 k, 1%, 0.125 W, 0805 0805 CRCW080520K0FKEA Vishay-Dale
R7, R8 2 0.15 RES, 0.15 ohm, 1%, 1/2W, 1206 1206 (3216 Metric) ERJ-8BSFR15V Panasonic Electronic
Components
R10, R16, R17 3 0 RES, 0, 5%, 0.1 W, 0603 0603 CRCW06030000Z0EA Vishay-Dale
R11 1 2.2 kΩRES, 2.2 k, 5%, 0.1 W, 0603 0603 CRCW06032K20JNEA Vishay-Dale
R12 1 4.7k RES, 4.7 k, 5%, 0.1 W, 0603 0603 CRCW06034K70JNEA Vishay-Dale
R13, R14 2 4.75 RES, 4.75, 1%, 0.1 W, 0603 0603 CRCW06034R75FKEA Vishay-Dale
R15 1 0 RES, 0, 5%, 0.25 W, 1206 1206 CRCW12060000Z0EA Vishay-Dale
SH-J6, SH-J8, SH-J9, SH-
J12, SH-J13 5 Shunt, 2.54mm, Gold, Black Shunt, 2.54mm, Black 60900213421 Wurth Elektronik
TP1, TP2, TP3, TP4, TP5,
TP6, TP7 7 Orange Test Point, Compact, Orange, TH Orange Compact Testpoint 5008 Keystone

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Table 4. TPS92518EVM-878 Bill of Materials (continued)
Designator Qty Value Description Package Reference Part Number Manufacturer
TP8, TP9, TP10, TP11,
TP12, TP13, TP14, TP15 8 Double Terminal, Turret, TH, Double Keystone1502-2 1502-2 Keystone
U1 1 65V Automotive Dual Buck LED Controller with SPI Interface,
PWP0024J (TSSOP-24) PWP0024J TPS92518QPWPRQ1 Texas Instruments
C1, C16, C21, C25, C26 0 0.1uF CAP, CERM, 0.1 µF, 16 V, ±10%, X7R, 0603 0603 GCM188R71C104KA37D Murata
C19, C20 0 0.01uF CAP, CERM, 0.01 µF, 100 V, ±10%, X7R, 0603 0603 GCM188R72A103KA37D Murata
FID1, FID2, FID3 0 Fiducial mark. There is nothing to buy or mount. Fiducial N/A N/A
R1 0 80.6k RES, 80.6 k, 1%, 0.1 W, 0603 0603 CRCW060380K6FKEA Vishay-Dale
R3, R4 0 1.00k RES, 1.00 k, 1%, 0.125 W, 0805 0805 CRCW08051K00FKEA Vishay-Dale
R5 0 0 RES, 0, 5%, 0.1 W, 0603 0603 CRCW06030000Z0EA Vishay-Dale

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5 Software
5.1 TPS92518 Demonstration Kit Software Installation
Double-click on TPS92518 Demonstration Kit Installer.exe and click ‘yes’ when Windows Account Control
asks to allow the program to make changes to the computer.
This will bring up the evaluation software screen:
Figure 16. Setup Screen 1
Click the Next > button to install.
Figure 17. Setup Screen 2
Click the Next > button.

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Figure 18. Setup Screen 3
Click the Next > button.
Figure 19. Setup Screen 4
Wait for it to finish extracting and installing files.

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Figure 20. Setup Screen 5
Check the box stating you accept the license terms and click the Install > button.
Figure 21. Setup Screen 6
It may be necessary to stop other programs using Microsoft®.NET Framework®during the installation
process. Select Yes, if asked.

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Figure 22. Setup Screen 7
Figure 23. Setup Screen 8
Wait for .NET to download, verify, and install.

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Figure 24. Setup Screen 9
Click the Finish > button.
Figure 25. Setup Screen 10
Restart your computer by clicking on the Restart Now button.
Figure 26. Setup Screen 11
Click on the Finish > button.
At this point the software should be ready to use. Click on the TI TPS92518 Demonstration Kit icon.