Texas Instruments DS90UB913A-CXEVM User manual

DS90UB913A-CXEVM & DS90UB914A-CXEVM
User's Guide
Literature Number: SNLU135B
June 2013–Revised April 2016

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Introduction
Chapter 1
SNLU135B–June 2013–Revised April 2016
Introduction
(1) Coax cable is not provided with the EVM.
(2) Boards are configured to transmit power over coax cable, hence connect power to Deserializer board only.
(3) Not a specific recommendation, for evaluation purpose only.
1.1 Overview
The Texas Instruments DS90UB913A-CXEVM & DS90UB914A-CXEVM REV A Evaluation Modules
(EVM) provides an easy way to evaluate the operation and performance of the DS90UB913AQ /
DS90UB914AQ FPD-Link III Serializer/Deserializer.
(A) The DS90UB913A-CXEVM REV A contains the DS90UB913AQ Evaluation board.
(B) The DS90UB914A-CXEVM REV A contains the DS90UB914AQ Evaluation board
Other components required: Power supply (5 V) and 50-Ωcoaxial cable. (1) (2)
Figure 1-1. DS90UB913A-CXEVM & DS90UB914A-CXEVM pair
Specification for orderable coax cable: (3)
Water Blue, FAKRA Jack to FAKRA Jack Cable, 60-inch length, using RG174 Coax cable. EVM boards
have SMB connector mounted as shown in Figure 1-1.

www.ti.com Quick Setup of EVM
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Introduction
1.2 Quick Setup of EVM
Figure 1-2. DS90UB913A-CXEVM REV A Serializer Board (Default Settings)

Quick Setup of EVM www.ti.com
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Introduction
Figure 1-3. DS90UB914A-CXEVM REV A Deserializer Board (Default Settings)

www.ti.com Operation
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Introduction
1.3 Operation
Make sure S1, S2, JP8, JP13 of Serializer board and S1, S2, JP6, JP12 of Deserializer board are
configured as shown in Figure 1-2 and Figure 1-3.
1. Connect the DS90UB913AQ and DS90UB914AQ Evaluation boards using a coax cable.
2. Connect the 5-V power supply to Deserializer board (recommended current limit is 300 mA) and apply
power as shown in Figure 2-1.
3. Look for the LED D2 to light up on the DS90UB914AQ board.
• If the LED is lit and stable, then the DS90UB914AQ is LOCKED to the FPD-Link III serial stream…
CONGRATULATIONS, you are up and running!
• If not, continue to the next section.
1.4 Troubleshooting the EVM setup
1. Check power supply polarity.
WARNING
Reverse supply polarity can damage the board.
2. Check to make sure there is sufficient current (300 mA) by checking that the voltage (5 V) is correct
using DMM.
3. Check to make sure there is a FPD-Link III signal by probing on both C16 AND C19 on SER board and
C6 AND C7 on DES board.
4. Monitor the LOCK signal at pin 4 (pin 3 is GND) of connector JP2 using oscilloscope on DES board.
Do not rely on visual inspection of D2 (Lock LED) present on deserializer board.
5. With no PCLK input applied on SER board, PCLK output frequency on DES board should be 50MHz
for the default settings.
Table 1-1. PCLK Output (on DES) without Applying PCLK Input (on SER)
Mode Selected PCLK Output Expected
10 bit mode (default mode) 50 MHz
12 bit low frequency mode 25 MHz
12 bit high frequency mode 37.5 MHz
6. Go back to Figure 1-2 &Figure 1-3 to double check factory settings.

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Board Setup Details
Chapter 2
SNLU135B–June 2013–Revised April 2016
Board Setup Details
This section describes the connectors and jumpers on the board as well as how to properly connect, set
up and use the DS90UB913A/914A REV A EVM in detail.
2.1 Power Connections
1. Connect an external 5 V to pin 1 or 2 of JP5, on Deserializer board. (Refer to Figure 2-1)
2. Connect ground to pin 3 or 4 of JP5, on Deserializer board. (Refer to Figure 2-1)
3. Optionally, these boards can be configured for 12-V supply via Power Jack, JP11 on both the boards
separately. However, this would require U21, TPS65320 to be mounted on Deserializer board, as it is
not populated on the EVM.
4. Since boards are configured to transmit power over coax cable (PoC), it is not required to connect
external power to Serializer, unless PoC is not used.
Figure 2-1. Powering DS90UB913A-CXEVM and DS90UB914A-CXEVM Boards

www.ti.com FPD-Link III Connection
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Board Setup Details
2.2 FPD-Link III Connection
J1 is the default SMB connector on both the boards. The FPD-Link III serial stream comes out of J1 on
Serializer board as a single ended signal. Connect it to J1 on the Deserializer board. DOUT- on serializer
and RIN1- on deserializer are terminated to ground through 47-nF capacitor in series with 50Ωresistance.
Figure 2-2. Serial Link Connection Using a Single 50-ωCoaxial Cable
2.3 LVCMOS Input Connector Description (on DS90UB913AQ Board)
JP1 – GPO0, GPO1, CLK OUT, CLK IN, DIN[11:0], HSYNC, VSYNC, PCLK IN are the input pins for the
LVCMOS interface on Serializer board. The even numbered pins are the input signals. All the odd
numbered pins are connected to VSS. Refer to Figure 2-3 below.
JP10 and JP1 pins are not connected.
Figure 2-3. Parallel Input Connector on Serializer Board

LVCMOS Output Connector Description (on DS90UB914AQ Board) www.ti.com
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Board Setup Details
2.4 LVCMOS Output Connector Description (on DS90UB914AQ Board)
JP1 – ROUT[11:0], HSYNC, VSYNC, PCLKO are the pins of output connector for the LVCMOS interface
on Deserializer board. The even numbered pins are the output signals. All the odd numbered pins are
connected to VSS.
JP8 – GPIO0, GPIO1, GPIO2, GPIO3 are the access points for DS90UB914AQ GPIO data. Refer to
Figure 2-4 below.
JP1 and JP7 pins are not connected.
Figure 2-4. Parallel Output Connector on Deserializer Board

www.ti.com Factory Set Switch Settings and Jumpers Default Configuration
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Board Setup Details
(1) A power down and power up sequence through switch S1.2 is required, for the mode change to be effective.
2.5 Factory Set Switch Settings and Jumpers Default Configuration
2.5.1 Serializer Board Default Configuration
S1, S2, JP8 and JP13 of Serializer board are factory configured as shown in Figure 1-2 for plug and play
operation.
1. The S1 switch is factory set as shown in Figure 2-5.
The PDN switch (S1.2) is set HIGH and will turn on the DS90UB913AQ upon power up. This switch is
connected to PDB pin of the device.
The RES pin (S1.1) is pulled low as recommended by datasheet.
Figure 2-5. Switch S1: Default Settings on Serializer Board
2. The Mode Select switch, S2 is factory set as shown below in Figure 2-6 to use Serializer in PCLK from
imager mode. To operate in external oscillator mode, move S2.1 to deselect position and S2.2 to
select position (1). Refer device datasheet for more details on these modes.
Only one switch is allowed to be in SELECT mode at a time.
Figure 2-6. Switch S2: Default Settings on Serializer Board
3. S3 is a momentary switch, which is present on the top right corner of the SER board. Press this switch
to clear the output of one shot latches for low pulse on GPO0 and GPO1.
4. S4 is a momentary switch for Transmitter Power Down.
5. On JP8 and JP13, a 2-pin jumper is factory placed as shown in Figure 1-2. This selects power from U4
for 1.8V VDD and from U3 for 3.3V VDDIO respectively.

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Board Setup Details
2.5.2 Deserializer Board Default Configuration
S1, S2, JP6, JP12 of Deserializer board are factory configured as shown in Figure 1-3 for plug and play
operation.
1. The S1 switch is factory set as shown below in Figure 2-7.
(a) The PDN switch is set high and will turn on the Deserializer upon power up. This switch is
connected to PDB pin of the device.
(b) The OEN and OSS_SEL switch are set HIGH and will enable outputs to toggle upon power up.
(c) The SEL switch is set high to select RIN1+/- input, which feeds serial stream data to the device
from coax cable.
Refer to Table 2-1 for more details.
Figure 2-7. Switch S1: Default Settings on Deserializer Board
Table 2-1. Switch S1: Deserializer Board
Switch reference Default Setting Function
S1.1-PDN High High: Deserializer is enabled and is ON.
Low: Deserializer is in Sleep (power down mode). In this mode,
programmed control register data are NOT retained and reset to
default values.
S1.2-BISTEN Low High: BIST Mode Enabled
Low: BIST Mode Disabled
S1.3-OEN High Refer table on "Output States" in the device datasheet
S1.4-OSS SEL
S1.5-SEL High High: RIN1+/- input is selected as the active channel on the
Deserializer.
Low: RIN0+/- input is selected as the active channel on the
Deserializer.
S1.6-RES Low Reserved and must be set Low always.
S1.7-RES