Texas Instruments ADS7881 User manual

User's GuideSLAU150 – December 2004
ADS7881/ADS7891EVM
This users guide describes the characteristics, operation, and use of theADS7881/ADS7891 12-Bit/14-Bit, parallel, analog-to-digital converter evaluation mod-ule. A complete circuit description, as well as schematic diagram, layout and bill ofmaterials, are included.
Contents1 Related Documentation from Texas Instruments ............................................... 12 EVM Overview ...................................................................................... 23 Introduction .......................................................................................... 24 Analog Interface .................................................................................... 25 Digital Interface ..................................................................................... 46 Power Supplies ..................................................................................... 67 Using the EVM ...................................................................................... 6Appendix A ADS7881EVM/ADS7891EVM Bill of Materials ........................................ 8Appendix B ADS7881EVM/ADS7891EVM Layout ................................................ 10Appendix C ADS7881EVM/ADS7891EVM Schematic ............................................ 14
List of Figures
1 ADS7881 Input Buffer Circuit ..................................................................... 32 Decoding Control Signals Using the Address Bus ............................................. 7B-1 Top Layer – Layer 1 .............................................................................. 10B-2 Ground Plane – Layer 2 .......................................................................... 11B-3 Power Plane – Layer 3 ........................................................................... 12B-4 Bottom Layer – Layer 4 .......................................................................... 13
List of Tables
1 Analog Input Connector ............................................................................ 21 Analog Input Connector ............................................................................ 32 Solder Short Jumper Setting ...................................................................... 43 Pinout for Parallel Control Connector P2 ........................................................ 44 Jumper Settings ..................................................................................... 55 Data Bus Connector P3 ............................................................................ 56 Pinout for Converter Control Connector J3 ..................................................... 67 Power Supply Test Points ......................................................................... 68 Power Connector, J1, Pin Out .................................................................... 6A-1 Bill of Materials ...................................................................................... 8
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1 Related Documentation from Texas Instruments
2 EVM Overview
2.1 Features
3 Introduction
4 Analog Interface
Related Documentation from Texas Instruments
To obtain a copy of any of the following TI documents, call the Texas Instruments Literature ResponseCenter at [phone] or the Product Information Center (PIC) at [phone]. When ordering,identify this booklet by its title and literature number. Updated documents can also be obtained throughour website at www.ti.com.Data Sheets: Literature Number:ADS7881 SLAS400ADS7891 SLAS410ADS8411 SLAS369THS4031 SLOS224OPA132 SBOS054REF1004-2.5 SBVS032SN74AHC138 SCLS258SN74AHC245 SCLS230SN74AHC1G04 SCLS318
•Full-featured Evaluation Board for the high speed SAR type ADS7881(12-bit 4MSPS) orADS7891(14-bit 3MSPS) single channel, parallel interface Analog to Digital Converters.•On board signal conditioning•On board Reference•Input and Output Digital Buffers•On board decoding for stacking multiple EVMs.
The ADS7881EVM and ADS7891EVM showcase the 12-bit 4-MSPS and 14-bit 3MSPS A-to-D converter.The ADS7881 and ADS7891 devices include a capacitor based SAR A/D converter with inherent sampleand hold. The two devices offer either a 12-bit or 14-bit parallel interface. Both offer byte mode operationthat enables easy interface with 8-bit processors. They also have a pseudo-differential input stage and a2.5V internal reference.
This evaluation module serves as a reference design and a low cost method to test these converters inthe users' application. The following sections will describe the pin outs of the various analog, power anddigital connectors and power requirements.
The ADS7881 and ADS7891 analog-to-digital converter has both a positive and negative analog input pin.The negative input pin, which has a range of -200mV up to 200mV is shorted on the board. A signal forthe positive input pin can be applied at connector P1 pin 2(shown in Table 1 ) or at center pin of SMAconnector J2.
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4.1 Signal Conditioning
130 pF
C0G
+2.5 V
THS4031
1000 pF
C0G
(+)IN
(−)IN
C35
C16
R13
U2
C33
R25
C7
C31
C37
C15
R10
R6
R1
R12
604 
−VCC
0.1 F
1 F
604 
21 
21 
12 
1 F
0.1 F
+VCC
1 F
VIN
10 k
Analog Interface
Table 1. Analog Input Connector
Connector.Pin#
(1)
Signal Description
P1.2 +IN Non-inverting input channelP1.4 ReservedP1.6 ReservedP1.8 ReservedP1.10 ReservedP1.12 ReservedP1.14 ReservedP1.16 ReservedP1.18 ReservedP1.20 REF+ External reference input
(1)
All odd numbered pins of P1 are tied to AGND.
The factory recommends the analog input to any SAR type converter be buffered and low pass filtered.This input buffer on the ADS7881/ADS7891EVM utilizes the THS4031 configured as an INVERTING gainof one, as shown in Figure 1 . It is important to note the amplifier is not stable at a gain of one, thus, it isconfigured in for inverting gain of one. The THS4031 was selected for its low noise, high slew rate andfast settling time. The low pass filter resistor and capacitor values were selected such thatADS7881/ADS7891EVM would meet the 1MHz AC performance specifications listed in the datasheet. Theseries resistor works in conjunction with the capacitor to filter the input signal, but also isolates theamplifier from the capacitive load. The capacitor to ground at the input of the A/D works in conjunctionwith the series resistor to filter the input signal, and acts like a charge reservoir. This external filtercapacitor works with the amplifier to charge the internal sampling capacitor during sampling mode.Resistors R1 and R12 were selected to reduce offset.
The EVM has a provision to offset the input voltage by adjusting, R25, a 10k potentiometer.
Figure 1. ADS7881 Input Buffer Circuit
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4.2 Reference
5 Digital Interface
Digital Interface
The ADS7881/ADS7891EVM provides an onboard 2.5V reference circuit. The EVM also has the provisionfor users to supply a reference voltage via connecter P1 pin 20. This reference voltage can be filteredthrough amplifier U1. The converter itself has on-chip reference buffer, therefore it is not necessary tobuffer externally. The reference buffer circuit on the EVM is used to generate the offset voltage for theinput amplifier, U2.
The EVM allows users to select from three reference sources. Set SJP1, SJP2, and SJP4 to selecton-board reference voltage (REF1004-2.5), ADC internal reference or a user supplied reference voltagevia P1 pin 20. See Table 2 for jumper settings. See Appendix B for full schematic.
Table 2. Solder Short Jumper Setting
Reference PadsDescriptionDesignator
1–2 2–3
SJP1 Apply on-board reference directly to SJP2 pin 3 Installed
(1)
Apply buffered reference voltage to SJP2 pin 3 InstalledSJP2 Apply internal reference to REFIN pin Installed
(1)
Apply external reference to REFIN pin InstalledSJP4 Apply on-board reference to U1, reference buffer InstalledApply user supplied reference to U1, reference buffer InstalledSJP5 Apply DC offset to input signal Installed
(1)
N/ASJP6 Short to pin 4 of amplifier U1 to ground InstalledShort to pin 4 of amplifier U1 to -VCC Installed
(1)
SJP7 Short to pin 4 of amplifier U2 to ground InstalledShort to pin 4 of amplifier U2 to -VCC Installed
(1)
(1)
Factory set condition
The ADS7881/ADS7891EVM is designed for easy interfacing to multiple platforms. Samtec part numbersSSW-110-22-F-D-VS-K , TSM-110-01-T-DV-P, SSW-116-22-S-D-VS , and TSM-116-01-T-D-V-P provide aconvenient dual row header/socket combination at P1, P2, P3, and J3. Please consult Samtec atwww.samtec.com or 1-800-SAMTEC-9 for a variety of mating connector options.
Connectors P1, P2 and P3 allows the user to plug the EVM into the 5-6k interface card to interface directlywith TMS320C5000 and TMS320C6000 series of DSP. See Table 3 for connector pin out.
Table 3. Pinout for Parallel Control Connector P2
Connector.Pin
(1)
Signal Description
P2.1 DC_CS Daughter card Board Select pinP2.3
P2.5
P2.7 A0 Address line from processorP2.9 A1 Address line from processorP2.11 A2 Address line from processorP2.13
P2.15
P2.17
(1)
All even numbered pins of P2 are tied to DGND.
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Digital Interface
Table 3. Pinout for Parallel Control Connector P2 (continued)
Connector.Pin
(1)
Signal Description
P2.19 BUSY Busy signal from converter. W4 must be shorted.
Read( RD), conversion start( CONVST) and reset ( RESET) signals to the converter can be assigned to twodifferent addresses in memory via jumper settings. This allows for the stacking of up to twoADS7881EVM, and/or ADS7891EVMs into processor memory. See Table 4 for jumper settings. Note, theevaluation module does not allow chip select ( CS) line of the converter to be assigned to different memorylocations. It is therefore suggested the CS line be grounded or wired to an appropriate signal of the userprocessor.
Table 4. Jumper Settings
Reference PinsDescriptionDesignator
1–2 2–3
W1 Short U8 pin 14 to Powerdown/Reset signal Installed
(1)
Short U8 pin 13 to Powerdown/Reset signal InstalledW2 Short U8 pin 12 to CONVST signal Installed
(1)
Short U8 pin 11 to CONVST signal InstalledW3 Short U8 pin 10 to RD signal Installed
(1)
Short U8 pin 8 to RD signal InstalledW4 Short inverted BUSY to INTC Installed
(1)
Short BUSY to INTC InstalledW5 Short +5VD to +BVDD Installed
(1)
Short +3.3VD to +BVDD Installed
(1)
Factory set condition
The data bus is available at connector P3, see table 4 for pin out information.
Table 5. Data Bus Connector P3
Connector.Pin
(1)
Signal Description
P3.1 D0 Buffered Data Bit 0 (LSB)P3.3 D1 Buffered Data Bit 1P3.5 D2 Buffered Data Bit 2P3.7 D3 Buffered Data Bit 3P3.9 D4 Buffered Data Bit 4P3.11 D5 Buffered Data Bit 5P3.13 D6 Buffered Data Bit 6P3.15 D7 Buffered Data Bit 7P3.17 D8 Buffered Data Bit 8P3.19 D9 Buffered Data Bit 9P3.21 D10 Buffered Data Bit 10P3.23 D11 Buffered Data Bit 11 (MSB - ADS7881)P3.25 D12 Buffered Data Bit 12P3.27 D13 Buffered Data Bit 13 (MSB - ADS7891)P3.29 D14 Not connectedP3.31 D15 Not connected
(1)
All even numbered pins of P3 are tied to DGND.
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6 Power Supplies
Power Supplies
This evaluation module provides direct access all the analog-to-digital converter control signals viaconnector J3, see Table 6 .
Table 6. Pinout for Converter Control Connector J3
Connector.Pin
(1)
Signal Description
J3.1 CS Chip select pin. Active low.J3.3 RD Read pin. Active low.J3.5 CONVST Convert start pin. Active low.J3.7 BYTE BYTE mode pin. Used for 8-bit buses.J3.9 PWD/RST Active low input, acts as device power down/device reset signal.J3.11 A_PDWN Nap mode enable, active lowJ3.13 BUSY Converter status output. High when a conversion is in progress.
(1)
All even numbered pins of J3 are tied to DGND.
The EVM accepts four power supplies.•A dual ±Vs DC supply for the dual supply op-amps. Recommend ±12VDC supply.•A single +5.0 V DC supply for analog section of the board (A/D + Reference).•A single +5.0V or +3.3V DC supply for digital section of the board (A/D + address decoder + buffers).
There are two ways to provide these voltages.•Wire in voltages at test points on the EVM. See Table below.
Table 7. Power Supply Test Points
Test Point Signal Description
TP11 +BVDD Apply +3.3VDC or +5.0VDC. See respective ADC datasheet for full range.TP10 +AVCC Apply +5.0VDC.TP12 +VA Apply +12.0VDC. Positive supply for amplifier.TP14 –VA Apply -12.0VDC. Negative supply for amplifier.
•Use the power connector J1, and derive the voltages else where. The pin out for this connector isbelow. Set jumper W5 to short between pins 1-2 or pins 2-3 to short +3.3VD or +5VD, respectively, tobe the buffer digital supply (+BVDD).
Table 8. Power Connector, J1, Pin Out
Signal Power Connector - J1 Signal
+VA (+12VA) 1 2 –VA (–12VA)+AVCC(+5VA) 3 4 N/CN/C 5 6 AGNDN/C 7 8 N/C+3.3VD 9 10 +5VD
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7 Using the EVM
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
1
1
1
W1
W2
W3
RD
CONVST
RESET
SN74AHC138
A
B
C
G
A0
A1
A2
DC_CS
Using the EVM
The ADS7881EVM/ADS7891EVM serves as a reference design, prototype board and as test platform forthe software engineer to develop code.
As a reference design, the ADS7881EVM/ADS7891EVM contains the essential circuitry to showcase theanalog-to-digital converter. This essential circuitry includes the input amplifier, reference circuit, andbuffers. The EVM analog input circuit is optimized for 1 MHz sine wave, therefore users may need toadjust the resistor and capacitor values of the A/D input RC circuit. In ac type applications where signaldistortion is concern, polypropylene capacitors should be used in the signal path. In applications were theinput is multiplexed, the A/D input resistor and capacitor may need to adjusted or possibly removedaltogether.
As a prototype board, the buffer circuit consists of footprint is a standard 8 pin SOIC and resistor pads forinverting and non-inverting configurations. The ADS7881EVM/ADS7891EVM can be used to evaluate bothdual and single supply amplifiers. The EVM comes installed with a dual supply amplifier as it allows theuser to take advantage of the full input voltage range of the converter. For applications that require signalsupply operation and smaller input voltage range, the THS4031 can be replaced with the single supplyamplifier like OPA300. Pad jumper SJP7 should be shorted between pads 1 and 2, as it shorts the minussupply pin of the amplifier to ground. Positive supply voltage can be applied via test point TP12 orconnector J1 pin 1.
As a software test platform, connectors P1, P2, P3 plug into the parallel interface connectors of the 5-6Kinterface card. The 5-6K interface card sits on the C5000 and C6000 Digital Signal Processor starter kit(DSK). The ADS7881EVM/ADS7891EVM is then mapped into the processor's memory space. This cardalso provides an area for signal conditioning. This area can be used to install application circuit(s) fordigitization by the ADS7881 and/or ADS7891 analog-to-digital converter. Refer to the 5-6K interface carduser's guide (SLAU104 ) for more information.
For the software engineer the ADS7881EVM/ADS7891EVM provides a simple platform for interfacing tothe converter. The EVM provides standard 0.1" headers and sockets to wire into prototype boards. Theuser need only provide in 3 address lines (A2, A1, A0) and address valid line( DC_CS) to connector P2, asshown in Figure 2 . To choose which address combinations will generate RD, CONVST, and RESET setjumpers as shown in Table 4 . Recall chip select ( CS) signal is not memory mapped or tied to P2, thereforeit must be controlled via general purpose pin or shorted to ground at J3 pin 1. If address decoding is notrequired, the EVM provides direct access to converter data bus via P3 and control via J3.
Figure 2. Decoding Control Signals Using the Address Bus
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Appendix A ADS7881EVM/ADS7891EVM Bill of Materials
Appendix A
The following table contains a complete Bill of Materials for the ADS7881EVM/ADS7891EVM. Theschematic diagram is also provided for reference. Contact the Product Information Center or e-mail[email protected] for questions regarding this EVM.
Table A-1. Bill of Materials
Item Reference Footprint Manufacturer'sQty. Value Manufacturer DescriptionNo. Designators Part Number
1 2 21 R1 R12 805 Panasonic-ECG or Alter- ERJ-6ENF21R RES, 21.0 Ω, 1/10W, 1% 0805nate SMD
2 3 NI R2 R5 R11 805 NOT INSTALLED NOT INSTALLED
3 1 NI R3 603 NOT INSTALLED NOT INSTALLED 1/10W, 0805 Chip Resistor
4 3 100 R4 R14 R15 805 Panasonic-ECG or Alter- ERJ-6ENF1000V RES, 100 Ω, 1/10W, 1%, 0805nate SMD
5 2 604 R6 R10 805 Panasonic-ECG or Alter- ERJ-6ENF6040V RES, 604 Ω, 1/10W, 1%, 0805nate SMD
6 6 10k R7 R16 R17 R18 R19 603 Panasonic-ECG or Alter- ERJ-3EKF1002V RES, 10.0 k Ω, 1/16W, 1%, 0603R20 nate SMD
7 1 49.9 R8 1206 Panasonic-ECG or Alter- ERJ-8ENF49R9V RES, 49.9 Ω, 1/8W, 1%, 1206nate SMD
8 1 49.9k R9 805 Panasonic-ECG or Alter- ERJ-6ENF4992V RES, 49.9 k Ω, 1/10W, 1%, 0805nate SMD
9 1 12 R13 805 Panasonic-ECG or Alter- ERJ-6GEYJ120V RES, 12 Ω, 1/8W, 5%, 0805 SMDnate
1 10 R13
(1)
805 Yageo America or Alter- 9C08052A10R0FKHFT RES, 10 Ω, 1/8W, 1%, 0805 SMDnate
10 1 75 R21 805 Panasonic-ECG or Alter- ERJ-6ENF75R0V RES, 75.0 Ω, 1/10W, 1%, 0805nate SMD
11 1 0 R24 603 Panasonic-ECG or Alter- ERJ-3GEY0R00V RES, 0 Ω, 1/16W, 5%, 0603 SMDnate
12 1 10k R22 805 Panasonic-ECG or Alter- ERJ-6ENF1002V RES, 10.0 k Ω, 1/10W, 1%, 0805nate SMD
13 1 10k R25 BOURNS_ 32 ×4W Bourns 3214W-1-103E TRIMPOT, 10 k Ω, 4MM TOP ADJSMD
14 4 10 µF C1 C6 C12 C19 1206 TDK Corporation or Alter- C3216X5R1C106KT CAP, CER, 10 µF, 16V, X5R,nate 20%, 1206
15 2 1 µF C2 C28 603 TDK Corporation or Alter- C1608X5R1C105K CAP, CER, 1.0 µF, 16V, X5R,nate 10%, 0603
16 5 1000 pF C3 C5 C11 C16 C23 603 TDK Corporation or Alter- C1608C0G1H102J CAP, CER, 1000 pF, 50V, C0G,nate 5%, 0603
17 13 0.01 µF C4 C10 C13 C20 603 TDK Corporation or Alter- C1608X7R1H103KT CAP, CER, 10000 pF, 50V, X7R,C21C26 C41 C44 C46 nate 10%, 0603C48 C50 C53 C56
18 4 0.1 µF C7 C15 C32 C36 805 TDK Corporation or Alter- C1608X7R1E104K CAP, CER, 0.10 µF, 25V X7R,nate 10%, 0603
19 8 2.2 µF C8 C40 C42 C47 C51 603 TDK Corporation or Alter- C1608X5R1A225MT CAP, CER, 2.2 µF, 6.3V, X5R,C52 C54 C55 nate 20%, 0603
20 9 0.1 µF C9 C18 C22 C25 C38 603 TDK Corporation or Alter- C1608X7R1E104K CAP, CER, 0.10 µF, 25V, X7RC43 C57 C58 C62 nate 10%, 0603
21 4 10 µF C14 C24 C27 C29 6032 Panasonic-ECG or Alter- ECS-T1EC106R CAP, 10 µF, 25V, TANTALUM,nate TE, SMD
22 1 22 µF C17 1206 Panasonic-ECG or Alter- C3216XR0J226M CAP, CER, 22 µF, 6.3V X5R,nate 20%, 1206
1 1500 pF C16
(1)
603 TDK Corporation or Alter- C1608C0G1H152J CAP, CER, 1500 pF, 50V, C0G,nate 5%, 0603
23 4 NI C30 C39 C61 C63 805 NOT INSTALLED NOT INSTALLED Multilayer Ceramic - 0805 Size
24 5 1 µF C31 C33 C37 C59 C60 805 TDK Corporation or Alter- C2012X7R1E105K CAP, CER, 1.0 µF, 25V, X7R,nate 0805, T/R
25 1 130 pF C35 805 TDK Corporation or Alter- C2012C0G1H131 CAP, CER, 130 pF, 50V 5%,nate C0G, 0805
26 1 10 µF C49 3528 Kemet or Alternate T491B106K016AS CAP, TANTALUM, 10 µF, 16V10%, SMD
(1)
Used for ADS7891EVM only.
ADS7881EVM/ADS7891EVM Bill of Materials8 SLAU150 – December 2004

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Appendix A
Table A-1. Bill of Materials (continued)Item Reference Footprint Manufacturer'sQty. Value Manufacturer DescriptionNo. Designators Part Number
27 2 1K RP1 RP3 CTS_742 CTS Corporation 742C163102JTR RES ARRAY, 1 k Ω, 16TERM8RES SMD
28 1 100 RP2 CTS_742 CTS Corporation 742C163101JTR RES ARRAY 100 Ω16TRM,8RES SMD
29 4 L1 L2 L3 L4 805 TDK Corporation MMZ2012R601A Ferrite chip, 600 Ω, 500 mA
30 1 U1 8-SOP(D) Texas Instruments OPA132UA DiFet amplifier
31 1 U2 8-SOP(D) Texas Instruments THS4031IDR 100 MHz, low-noise, high-speedamplifier
32 1 NI U3 3-SOT-23 NOT INSTALLED NOT INSTALLED REF3040, 50 ppm/–C, 50-A inSOT23-3 CMOS voltage refer-ence
33 1 ADS7881 U4 SOCKET_48 QFPP Texas Instruments ADS7881IPFBT ADS7881, 12-bit, 4 MSPS
ADS7891 U4
(1)
ADS7891IPFBT ADS7891, 14-bit, 3 MSPS
34 3 SN74AHC245 U5 U6 U7 20-TSSOP(PW) Texas Instruments SN74AHC245PWR Octal bus transceiver, 3-state
35 1 SN74AHC138 U8 16-TSSOP (PW) Texas Instruments SN74AHC138PWR 3-line to 8-line decoder/demultiplexer
36 1 REF1004-2.5 U9 8-SOP(D) Texas Instruments REF1004-2.5 Micropower voltage reference
37 1 SN74AHC1G04 U12 5-SOT(DBV) Texas Instruments SN74AHC1G04DBVR Single inverter gate
38 2 10 ×2×0.1 P1 P2 10 ×2×0.1_SMT_PL Samtec SSW-110-22-S-D-VS 0.025" SMT socket - bottom sideUG_& _SOCKET of PWB
39 2 Samtec TSM-107-01-T-D-V-P 0.025" SMT plug - top side ofPWB
40 1 Data Bus P3 10 ×2×0.1_SMT_PL Samtec SSW-116-22-S-D-VS 0.025" SMT socket - bottom sideUG_& _SOCKET of PWB
41 1 Samtec TSM-116-01-T-D-V-P 0.025" SMT plug - top side ofPWB
42 1 Power Supply J1 5 ×2×0.1_SMT_SOC Samtec SSW-105-22-S-D-VS 0.025" SMT socket - bottom sideKET of PWB
43 1 Samtec TSM-105-01-T-D-V-P 0.025" SMT plug - top side ofPWB
44 1 SMA_PCB_MT J2 SMA_JACK Johnson Components Inc. 142-0701-301 Right angle SMA connector
45 1 7 ×2×0.1 J3 7 ×2×0.1_SMT_PLU Samtec SSW-107-22-S-D-VS 0.025" SMT socket - bottom sideG_&_ SOCKET of PWB
46 1 Samtec TSM-107-01-T-D-V-P 0.025" SMT plug - top side ofPWB
47 1 SW-PB S1 EVQ-PJ Panasonic EVQ-PJU04K switch
48 5 W1 W2 W3 W4 W5 3POS_JUMPER Samtec TSW-103-07-L-S 3 Position jumper _ 0.1" spacing
49 1 SJP2 SJP5 SJP2 NOT INSTALLED NOT INSTALLED Pad 2 position jumper
50 5 SJP3 SJP1 SJP2 SJP4 SJP6 SJP3 NOT INSTALLED NOT INSTALLED Pad 3 position jumperSJP7
51 1 TO_0.025 TP1 test_point2 Keystone Electronics 5002K-ND Test point, PC, mini 0.040" D,white
52 10 TO_0.025 TP3 TP4 TP6 TP8 TP9 test_point2 Keystone Electronics 5000K-ND Test point, PC, mini 0.040" D, redTP10 TP11 TP12 TP14TP15
53 4 TO_0.025 TP5 TP7 TP2 TP13 test_point2 Keystone Electronics 5001K-ND Test point, PC, mini 0.040" D,black
ADS7881EVM/ADS7891EVM Bill of MaterialsSLAU150 – December 2004 9

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Appendix B ADS7881EVM/ADS7891EVM Layout
Appendix B
Figure B-1. Top Layer – Layer 1
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Appendix B
Figure B-2. Ground Plane – Layer 2
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Appendix B
Figure B-3. Power Plane – Layer 3
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Appendix B
Figure B-4. Bottom Layer – Layer 4
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Appendix C ADS7881EVM/ADS7891EVM Schematic
Appendix C
See attachment for schematic drawings.
ADS7881EVM/ADS7891EVM Schematic14 SLAU150 – December 2004

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TITLE:
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DOCUMENT CONTROL #:
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BlockDiagram.sch
A
DATE: 11-Nov-2004
ADS7881EVM/ADS7891EVM
6456873
+IN
EXT_REF
B_CS B_RD B_CONVST B_BYTE B_PWN/RST BUSY DB[13...0] B_APWD
Analog Circuits & A/D
Parallel Control
12
34
56
78
910
1112
1314
1516
1718
1920
P2
Analog Input
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
P1
+VA
-VA
B_DB[13...0]
DB[13...0]
CS RD CONVST BYTE PWN/RST B_BUSY
BUSY
B_CS
B_RD
B_CONVST
B_BYTE
B_PWN/RST
+AVCC
+VA
-VA
+BVDD
A0 A1 A2 DC_CS A_PWD INTc
B_APWD
Power & Digital Buffer
J2
B_DB[13...0]
DB[13..0]
B_DB0
B_DB1
B_DB2
B_DB3
B_DB4
B_DB5
B_DB6
B_DB7
B_DB8
B_DB9
B_DB10
B_DB11
B_DB12
B_DB13
+AVCC
+BVDD
Lijoy Philipose
Lijoy Philipose
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
P3
Data Bus
CS
RD
CONVST
BYTE
PWN/RST
B_BUSY
A0
A1
A2
1 2
3 4
5 6
7 8
910
J1
Power Supply
+VA -VA
+5VD
AGND
+AVCC
TP10
TP11
TP12
TP14
ADC Control
INTc
DC_CS
12
34
56
78
9
11
13
10
12
14
J3
A_PWD
DGND
W5
+3.3VD

1 2 3 4 5 6
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54321
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ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
23
Analog-to-Digital Converter
A
DATE: 11-Nov-2004
Analog Circuits
6456873
C21
0.01uF
C43
0.1uF
C42
2.2uF
C48
0.01uF
C41
0.01uF
C47
2.2uF
C52
2.2uF
C44
0.01uF
C55
2.2uF
C56
0.01uF
+5VCC
+5VCC
+5VCC
+5VCC
C54
2.2uF
C50
0.01uF
+5VCC
C51
2.2uF
C53
0.01uF
+VBD
B_CS
B_RD
B_CONVST
B_BYTE
BUSY
DB0
DB1
DB2
DB3
DB4
DB5
DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13
C46
0.01uF
C40
2.2uF
+5VCC
BUSY
DB[13...0]
B_CS
B_RD
B_BYTE
B_CONVST
-VCC
+VCC
C7
0.1uF
C31
1uF
C37
1uF
C15
0.1uF
R10
604
R13
10
C39
NI
+IN
C35
130pF
C33
1uF
R5
NI
EXT_REF
R4
100
DB[13...0]
R11
NI
TP4
31
2
SJP2
R6
604
+
C49
10uF
C8
2.2uF
C13
0.01uF
+VBD
C16
1500pF
+5VCC
C17
22uF
R21
75
R14
100
C61
NI
+VCC
C59
1uF
C36
0.1uF
-VCC
C32
0.1uF
C60
1uF
IN
1
OUT
2GND 3
U3
NI
+5VCC
R3
NI
3 1
2
SJP1
3 1
2
SJP4
R24
0
Lijoy Philipose
Lijoy Philipose
C63
NI
1
2
3
R25
10k
12
SJP5
3
2
6
74
5
1
U1
OPA132
R8
49.9
31
2
SJP7
31
2
SJP6
*
3
2
6
74
5 1
8
U2
THS4031
C30
NI
*
TP9
R1
21
R2
NI
REFIN
1
REFOUT
2
NC
3
+VA
4
AGND
5
+IN
6
-IN
7
AGND
8
+VA
9
+VA
10
AGND
11
AGND
12
AGND
14
AGND
15
DB13
16
DB12
17
DB11
18
DB10
19
DB9
20
DB8
21
DB7
22
DB6
23
+VBD
24
BDGND 25
DB5 26
DB4 27
DB3 28
DB2 29
DB1 30
DB0 31
N/C 32
N/C 33
+VBD 34
BDGND 35
BUSY 36
APWD 37
pwr_dwn/RESET 38
BYTE 39
CONVST 40
RD 41 CS 42
+VA 43
AGND 44 AGND 45
+VA 46
REFM 47 REFM 48
+VA
13
U4
ADS7881/ADS7891
B_PWN/RST
B_PWN/RST
B_A_PWD
B_A_PWD
N/C
1
N/C
2
N/C
3
Anode
4N/C 5
Cathode 6
N/C 7
Cathode 8
U9
REF1004-2.5
R9
49.9k
R12
21
Installed on ADS7881EVM
R13 : 12 Ohm
C16 : 1000pF C0G
U4 : ADS7881
Installed on ADS7891EVM
R13 =10 Ohm
C16 = 1500 pF C0G
U4 : ADS7891

123456
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ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
33
Power & Digital Buffer
A
DATE: 11-Nov-2004
Power Supply & Digital Circuits
6456873
L4
MMZ2012R601A
L2
MMZ2012R601A
L1
MMZ2012R601A
+
C24
10uF
+
C29
10uF
+
C27
10uF
C28
1uF
C2
1uF
C4
0.01uF
C26
0.01uF
L3
MMZ2012R601A
+
C14
10uF
TP6 +5VCC
C10
0.01uF
C9
0.1uF
TP5
TP8 +VBD
C20
0.01uF
C22
0.1uF
TP7
TP3
TP1
TP2
+VCC
-VCC
C12
10uF
C19
10uF
C6
10uF
C1
10uF
C5
1000pF
C3
1000pF
C23
1000pF
C11
1000pF
B_DB[13...0]
116
215
314
413
5
9
12
6
8
10
11
7
RP1
1K
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U6
SN74AHC245PWR
C57
0.1uF
B_RD
116
215
314
413
5
9
12
6
8
10
11
7
RP3
1K
+VBD
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U7
SN74AHC245PWR
C58
0.1uF B_RD
DB[17...0]
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
B_DB13
B_DB12
B_DB11
B_DB0
B_DB10
B_DB1
B_DB9
B_DB2
B_DB8
B_DB3
B_DB7
B_DB4
B_DB6
B_DB5
CS
RD
CONVST
BYTE
PWN/RST
B_BUSY
116
215
314
413
5
9
12
6
8
10
11
7
RP2
100
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U5
SN74AHC245PWR
+VBD
C25
0.1uF
CS
RD
CONVST
BYTE
PWN/RST
R20
10k
R19
10k
R18
10k
+VBD
R17
10k
R16
10k
BUSY
B_CS
B_RD
B_CONVST
B_BYTE
B_PWN/RST
+AVCC +VA
-VA
DB[17...0]
B_DB[13...0]
+BVDD
B_CS
B_BYTE
B_CONVST
B_RD
B_PWN/RST
Lijoy Philipose
Lijoy Philipose
A1
B2
C3
G1 6
G2A 4
G2B 5
Y0
15
Y1
14
Y2
13
Y3
12
Y4
11
Y5
10
Y6
9
Y7
7
VCC 16
GND
8
U8
SN74AHC138PWR
A0
A1
A2
A0
A2
A1
+VBD
C62
0.1uF
+VBD
1
3
2
W1
1
3
2
W2
TP13
W3
+VBD
DC_CS
RESET#
S1
DC_CS
2 4
53
U12
SN74AHC1G04DBV
+VBD
C38
0.1uF
INTc
W4
A_PWD
R7
10k
A_PWD
B_A_PWD
B_A_PWD
R15 100
C18 0.1uF
R22
10k
+VBD
TP15

FCC Warnings
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequencyenergy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules,which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in otherenvironments may cause interference with radio communications, in which case the user at his own expense will be required totake whatever measures may be required to correct this interference.
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLYand is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms ofrequired design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typicallyfound in the end product incorporating the goods. As a prototype, this product does not fall within the scope of the European Uniondirective on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.Should this evaluation kit not meet the specifications indicated in the EVM User's Guide, the kit may be returned within 30 daysfrom the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLERTO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANYWARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from allclaims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliantor agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user's responsibility to take any and allappropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE Liable to the other FORANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.TI assumes no liability for applications assistance, customer product design, software performance, or infringement ofpatents or services described herein.
Please read the EVM User's Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User's Guide prior tohandling the product. This notice contains important safety information about temperatures and voltages. For further safetyconcerns, please contact the TI application engineer.Persons handling the product must have electronics training and observe good laboratory practice standards.No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, orcombination in which such TI products or services might be or are used.
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of ±12 V and the output voltage range of 0 V to 5.5 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there arequestions concerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to theEVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the loadspecification, please contact a TI field representative.During normal operation, some circuit components may have case temperatures greater than 60 °C. The EVM is designed tooperate properly with certain components above 60 °C as long as the input and output ranges are maintained. These componentsinclude but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types ofdevices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes nearthese devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2004, Texas Instruments Incorporated

IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current andcomplete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’sstandard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support thiswarranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarilyperformed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products andapplications using TI components. To minimize the risks associated with customer products and applications, customers shouldprovide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, maskwork right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or servicesare used. Information published by TI regarding third-party products or services does not constitute a license from TI to use suchproducts or services or a warranty or endorsement thereof. Use of such information may require a license from a third party underthe patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and isaccompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is anunfair and deceptive business practice. TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or servicevoids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive businesspractice. TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product wouldreasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreementspecifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramificationsof their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-relatedrequirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding anyapplications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and itsrepresentatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products arespecifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet militaryspecifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade issolely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements inconnection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI productsare designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use anynon-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audioData Converters dataconverter.ti.com Automotive www.ti.com/automotiveDSP dsp.ti.com Broadband www.ti.com/broadbandInterface interface.ti.com Digital Control www.ti.com/digitalcontrolLogic logic.ti.com Military www.ti.com/militaryPower Mgmt power.ti.com Optical Networking www.ti.com/opticalnetworkMicrocontrollers microcontroller.ti.com Security www.ti.com/securityRFID www.ti-rfid.com Telephony www.ti.com/telephonyLow Power www.ti.com/lpw Video & Imaging www.ti.com/videoWireless
Wireless www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2007, Texas Instruments Incorporated

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