Texas Instruments LMK00101 User manual

1
SNLU098A–March 2012–Revised July 2019
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LMK00101 User’s Guide
User's Guide
SNLU098A–March 2012–Revised July 2019
LMK00101 User’s Guide
This user guide describes how to set up and operate the LMK00101 evaluation board kit (EVK). The
LMK00101 is a high performance, low noise, low voltage CMOS fanout buffer. The core voltage can be
2.5 or 3.3 volts, while the power supply for the outputs can be selected from: 1.5 V, 1.8 V, 2.5 V, or 3.3 V,
provided that it does not exceed the core supply voltage .
Contents
1 Introduction ................................................................................................................... 2
2 Quick Start.................................................................................................................... 2
2.1 Quick Start Description............................................................................................. 3
3 Signal Path and Control Switches......................................................................................... 3
4 Power Supplies .............................................................................................................. 4
5 Clock Inputs .................................................................................................................. 4
5.1 Crystal Oscillator Interface......................................................................................... 4
5.2 Configuring OSCin for a Crystal Mode........................................................................... 4
6 Clock Outputs ................................................................................................................ 4
7 Schematics ................................................................................................................... 5
8 PCB Layout................................................................................................................... 7
9 Bill of Materials............................................................................................................... 9
List of Figures
1 LMK00101 Quick Start Setup.............................................................................................. 2
2 Schematic Sheet 1 .......................................................................................................... 5
3 Schematic Sheet 2 .......................................................................................................... 6
4 PCB Top ...................................................................................................................... 7
5 Bottom Side (Layer Inverted, Not to Scale) .............................................................................. 8
List of Tables
1 Part Description.............................................................................................................. 2
2 Default Clock Output Modes / Interfaces................................................................................. 3
3 Input Selection (0=SW OFF, 1=SW ON) ................................................................................. 3
4 Output Enable Selection (0=OFF, 1=ON) ................................................................................ 3
5 Power Supply Configuration................................................................................................ 4
6 Bill of Materials............................................................................................................... 9
Trademarks
All trademarks are the property of their respective owners.

Output
Power Supply
Core
Power Supply
CLKin0
DifferentialSingle Ended
Oscillator Input
CLKin1
Differential
Input Select
DIP Switches
CLKout0-
CLKout5
CLKout6-
CLKout9
Introduction www.ti.com
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LMK00101 User’s Guide
1 Introduction
This user guide describes how to set up and operate the LMK00101 evaluation board kit (EVK). The
LMK00101 is a high performance, low noise, low voltage CMOS fanout buffer. The core voltage can be
2.5 or 3.3 volts, while the power supply for the outputs can be selected from: 1.5 V, 1.8 V, 2.5 V, or 3.3 V,
provided that it does not exceed the core supply voltage .
Table 1. Part Description
BUFFER IC PACKAGE
U1 LMK00101 LLP-32
2 Quick Start
Figure 1. LMK00101 Quick Start Setup

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LMK00101 User’s Guide
2.1 Quick Start Description
The LMK00101 EVK allows full verification of the device functionality and performance specifications. To
quickly set up and operate the board with basic equipment, refer to the quick start procedure below and
test setup shown in Figure 1.
1. Verify the output mode control switches, S1[1:4], match the states shown in Table 2 to reflect the
default output clock interfaces configured on the EVK.
Table 2. Default Clock Output Modes / Interfaces
SW POSITION/NAME SW STATE
S1[1] / SEL1 0 (OFF)
S1[2] / SEL0 1 (ON)
S1[3] / OE 1 (OFF)
S1[4] / NC Unused
2. Connect the Vdd SMA from the board to a 3.3 V source. This powers the non-output portions of the
LMK00101.
3. Connect the Vdd CLKout SMA from the board to a 3.3 V source. This powers the output drivers of the
LMK00101.
4. Set the desired clock input using the input selection control switches, S1[1:2], per Table 3. A
differential clock source can be connected to SMAs CLKin0/0* or CLKin1/1*.
Note: CLKin0/0* and CLKin1/1* paths are configured by default to receive a differential clock as the
input. The SMA inputs are DC coupled to the device inputs and terminated with 100 Ωdifferential.
Refer to the Clock Inputs section to configure the EVK for a single-ended input.
Table 3. Input Selection (0=SW OFF, 1=SW ON)
SELECTED INPUT DEFAULT INPUT MODE S1[1]CLKin_Sel0 State S1[2] CLKin_Sel1 State
CLKin0/0* Differential clock 0 0
CLKin1/1* Differential clock 0 1
OSCin Select OSCin 1 Don't Care
5. Connect and measure any clock output SMA labeled CLKoutX to an oscilloscope or other test
instrument using SMA cable(s). The output clock will be level-translated/buffered copy of the selected
clock input or crystal oscillator. Note: All output clocks are AC-coupled to the SMA connectors to
ensure safe use with RF instruments.
Note: Switching noise from one or more un-terminated outputs may impair the signal quality of the
measured output(s). To minimize switching noise and EMI, properly terminate any unused output path
using an SMA load or the component options near the SMA outputs, or alternatively, remove the 0 Ω
series resistor nearest the unused output pin.
3 Signal Path and Control Switches
The LMK00101 supports single-ended or differential clocks on CLKin0 and CLKin1. A third input, OSCin,
has an integrated crystal oscillator interface that supports a fundamental mode, AT-cut crystal or an
external single-ended clock. The three-input multiplexer is pin-controlled. To achieve the maximum
operating frequency and lowest additive jitter, it is recommended to use a differential clock with high input
slew rate (>1 V/ns) and DC-coupling to either CLKin0 or CLKin1 port.
All control pins are configured with the control switch, S3. The output enable logic is shown in Table 4.
Table 4. Output Enable Selection (0=OFF, 1=ON)
CLKout ENABLE MODE S1[3]-OE
Disabled/Hi-Z 0
Enabled 1

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LMK00101 User’s Guide
4 Power Supplies
By default, Vdd and VddCLKout are supplied by two external power supplies. To modify the EVK with a
different power supply configuration, populate the resistor options as shown in Table 5.Then, apply the
appropriate voltage(s) to the EVK power input(s).
Decoupling capacitors and 0 Ωresistor footprints, which can accommodate ferrite beads, can be used to
isolate the EVK power input(s) from the device power pins. Do not disconnect or ground any of the
VddCLKout pins as they are all internally connected inside the device.
Table 5. Power Supply Configuration
DUAL EXTERNAL INPUTS (DEFAULT) SINGLE EXTERNAL INPUT 3.3 V
Vdd input Apply 3.3 V Apply 3.3 V ± 5%
VddCLKout input Apply Voltage ≤Vdd Not used
R38 0 ΩDNP
R39 0 Ω0Ω
R43 DNP 0 Ω
5 Clock Inputs
The SMA inputs labeled CLKin0 & CLKin0* and CLKin1 & CLKin1* are configured to receive a differential
clock or single ended clock. Best performance is achieved with DC-coupled differential input clock.
5.1 Crystal Oscillator Interface
The LMK00101 has an integrated crystal oscillator interface (OSCin/OSCout) that supports a fundamental
mode, AT-cut crystal. If the crystal input is selected, an optional onboard crystal on either footprint Y1 or
Y2 will start-up and the oscillator clock can be measured on any enabled output.
A crystal with the HC49 footprint can be populated on the bottom side of the PCB. Alternatively, a 3.2 x
2.5 mm crystal can be populated on Y2, located on the top side. Only one crystal footprint should be used
at a time.
The values of C42 and C25(CEXT) depend on the load capacitance (CL) specified for the crystal. The OSC
input capacitance (CIN) of the device is 1 pF differential, and the trace capacitance (CTRACE) of OSCin and
OSCout is around 1 pF. If the selected crystal is specified for CLof 18 pF, the CEXT is calculated as
follows:
CEXT= (CL–CIN–CTRACE/2) * 2 (1)
CEXT= (18 pF –1 pF –1 pF/2) * 2 (2)
CEXT= 33 pF (3)
5.2 Configuring OSCin for a Crystal Mode
To configure the board to use crystal mode remove C26 to disconnect the OSCin Port. Install 0 Ωresistors
on R33 and R34. Install a crystal in either footprint (Y1 or Y2) and install the proper load capacitors in C24
and C25.
6 Clock Outputs
All clock outputs are LVCMOS. In the case that not all outputs are used, any unused outputs should be
left floating.

1 1
2 2
3 3
4 4
5 5
6 6
DD CC
BB AA
1 2
LMK00101 Main Schematic
3/20/2012
LMK0101ENG_Sheet2.SchDoc
Sheet Title: Size: Schematic:
Mod. Date:
File:
Rev: Sheet: of
B
Texas Instruments and/or its licensors do not warrant the accur acy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. T
exas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system funct ionality for your application. http://www.ti.com
Contact: http://www.national.com/support
LMK00101 EVK
Project:
Designe d for: Public Release
870600680 X1
Assemb ly Va riant: Customer
© Texas Instruments 2011
1
2
3
4
5
CLKin1* 142-0701-851
1
2
3
4
5
CLKin1 142-0701-851
1
2
3
4
5
CLKin0* 142-0701-851
1
2
3
4
5
CLKin0 142-0701-851
GND
100 R5
GND
GND
100 R14
GND
GND
51 R6
DNP 51
R7
DNP
51
R13
DNP 51
R12
DNP
0.1uF R3 0.1uF R4
0.1uF R10 0.1uF R11
51 R27
DNP
51
R26
DNP
51
R24
DNP
51 R25
DNP
51 R23
DNP
51
R18
DNP
51 R19
DNP
VCCO
VCCO
GND
GND
GND
VCC
VCCO
5.6pF
C24
DNP
5.6pF C25
DNP
0 R34
DNP
0
R33
DNP
1
2
3
4
5
OSCin 142-0701-851
0.1 F
μ
C26
51 R16
GND GND
40 MHz
Y1
DNP
0 R15
0
R17
GND
0 C22
0 C23
0
C20
0
C21
C0_N
C0_P
Y2
DNP
VddCLKout
2
CLKout1
3
GND
4
CLKout2
5
VddCLKout
6
CLKout3
7
CLKout4
8
CLKout0
1
Vdd 10
OSCin 11
OSCout 12
CLKin0 13
CLKin0* 14
GND 15 GND 16 GND 9
CLKout6 18
VddCLKout 19
CLKout7 20
GND 21
CLKout8 22
VddCLKout 23
CLKout9 24
CLKout5 17
GND`
26
CLKin1*
27
CLKin1
28
SEL1
29
SEL0
30
OE
31
GND
32
GND
25
DAP
33
U1
LMK00101
GND
51 R22
DNP
51 R21
DNP
51 R20
DNP
0.1 F
μ
C32
0.1 F
μ
C33
0.1 F
μ
C34
0.1 F
μ
C36
0.1 F
μ
C35
GND
GND
GND
GND
GND
1
2
3
4
5
CLKout7
142-0701-851
GND
1
2
3
4
5
CLKout6
142-0701-851
1
2
3
4
5
CLKout5
142-0701-851
GND
GND
1
2
3
4
5
CLKout9 142-0701-851
1
2
3
4
5
CLKout8 142-0701-851
GND
GND
GND
0.1 F
μ
C28
0.1 F
μ
C27
1
2
3
4
5
CLKout0 142-0701-851
1
2
3
4
5
CLKout1 142-0701-851
GND GND
GND GND
0.1 F
μ
C31
0.1 F
μ
C30
0.1 F
μ
C29
GND
GND
GND
1
2
3
4
5
CLKout4 142-0701-851
1
2
3
4
5
CLKout3 142-0701-851
1
2
3
4
5
CLKout2 142-0701-851
GND
GND
GND
VCC
12 34 56 78 910
uWire HEADER_2X5
DNP
GND
10 F
μ
C1
1 F
μ
C2
0.01 F
μ
C3
GND
VCC
SEL1
SEL0
OE
C1_P C1_N
C1in_N
C1in_P
0 R28
GND
VCCO
GND
GND
15k R303
DNP 15k
R304
DNP 15k
R305
DNP
4.7k R302
DNP
4.7k R301
DNP
GND
100 R1
DNP
100 R2
DNP
100 R8
DNP
100
R9
DNP
C0in_N
C0in_P
GND
0
R35
0
R36
0
R37
GND
6
3 18 27
5
4
S1 A6S-4104-H
0
R29
0 R31
0
R32 0.01 F
μ
C11
DNP
0.1 F
μ
C10
DNP
0.01 F
μ
C12
DNP
0.1 F
μ
C13
DNP
0.01 F
μ
C17
DNP
0.1 F
μ
C16
DNP
0.01 F
μ
C18
DNP
0.1 F
μ
C19
DNP
0.01 F
μ
C15
DNP 0.1 F
μ
C14
DNP
0 R30
4.7k R300
DNP
Note: Parts with Designators greater than or equal to 300 are on the bottom side.
100pF C37
GND
100pF C38
GND
100pF C39
100pF C40
GND
100pF C41
GND
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LMK00101 User’s Guide
7 Schematics
Figure 2. Schematic Sheet 1

1 1
2 2
3 3
4 4
5 5
6 6
DD CC
BB AA
2 2
LMK00101 Power Supply
3/20/2012
LMK0101ENG_Sheet3.SchDoc
Sheet Title: Size: Schematic:
Mod. Date:
File:
Rev: Sheet: of
B
Texas Instruments and/or its licensors do not warrant the accur acy or completeness of this specification or any information contained therein. Texas Instr uments and/or its licensors do not warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. T
exas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system funct ionality for your application. http://www.ti.com
Contact: http://www.national.com/support
LMK00101 EVK
Project:
Designed for: Public Release
870600680 X1
Assemb ly Va riant: Customer
© Texas Instruments 2011
600680 001
551
PCB Part Number: REV A
-
1
2
3
4
5
Vdd 142-0701-851
11 22
Vdd_TB TERMBLOCK_2
DNP
0
R39
0
R42
DNP
VccIN
IN
4
ADJ 6
GND 3
NC
7
SD
8
DAP
9
OUT 5
BYP 1
NC
2
U3 LP3878SD-ADJ/NOPB
DNP
10 F
μ
C7
1 F
μ
C8
0.01 F
μ
C9
GND
VCC
10 F
μ
C304
DNP 10 F
μ
C306
DNP
2200pF C305
DNP
0.01 F
μ
C307
DNP
51k
R310
DNP 2.00k
R312
DNP
866 R311
DNP
GND
GND
GND
GND TP_VCC_LDO
DNP
TPVcc
DNP
TPVccIN
DNP
0 R41
DNP
0
R309
DNP
IN
4
ADJ 6
GND 3
NC
7
SD
8
DAP
9
OUT 5
BYP 1
NC
2
U2 LP3878SD-ADJ/NOPB
DNP
10 F
μ
C300
DNP 10 F
μ
C302
DNP
2200pF C301
DNP
0.01 F
μ
C303
DNP
51k
R306
DNP 1.30k
R308
DNP
866 R307
DNP
GND
GND
TP_VCCO_LDO
DNP
0 R40
DNP
1 F
μ
C5
VCCO
10 F
μ
C4
0
R43
DNP
1
2
3
4
5
VddCLKout 142-0701-851
0
R38
GND
TPVcco
DNP
SO1 0.375" Standoff
SO2 0.375" Standoff
SO3 0.375" Standoff
SO4 0.375" Standoff
0.1 F
μ
C6
GND
GND
11 22
VddCLKout_TB TERMBLOCK_2
DNP
SO5 0.375" Standoff
SO6 0.375" Standoff
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Figure 3. Schematic Sheet 2

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LMK00101 User’s Guide
8 PCB Layout
Figure 4. PCB Top

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LMK00101 User’s Guide
Figure 5. Bottom Side (Layer Inverted, Not to Scale)

www.ti.com Bill of Materials
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LMK00101 User’s Guide
9 Bill of Materials
Table 6. Bill of Materials
Item DESCRIPTION QTY DESIGNATOR MANUFACTURER PART NUMBER
1CAP, CERM, 10uF, 10V,
+/-10%, X5R, 0805 3 C1, C4, C7 MuRata GRM21BR61A106KE19L
2CAP, CERM, 1uF, 16V, +/-
10%, X7R, 0603 3 C2, C5, C8 TDK C1608X7R1C105K
3CAP, CERM, 0.01uF,
100V, +/-5%, X7R, 0603 2 C3, C9 Kemet C0603C103J1RACTU
4CAP, CERM, 0.1uF, 16V,
+80/-20%, Y5V, 0603 1 C6 TDK C1608Y5V1C104Z
5RES, 0 ohm, 5%, 0.1W,
0603 11 C20, C21, C22, C23, R15,
R17, R35, R36, R37, R38,
R39 Vishay-Dale CRCW06030000Z0EA
6CAP, CERM, 0.1uF, 16V,
+/-10%, X7R, 0603 15 C26, C27, C28, C29, C30,
C31, C32, C33, C34, C35,
C36, R3, R4, R10, R11 TDK C1608X7R1C104K
7CAP, CERM, 100pF, 25V,
+/-5%, C0G/NP0, 0402 5 C37, C38, C39, C40, C41 MuRata GRM1555C1E101JA01D
8Connector, SMT, End
launch SMA 50 ohm 17
CLKin0, CLKin0*, CLKin1,
CLKin1*, CLKout0,
CLKout1, CLKout2,
CLKout3, CLKout4,
CLKout5, CLKout6,
CLKout7, CLKout8,
CLKout9, OSCin, Vdd,
VddCLKout
Emerson Network Power
Connectivity 142-0701-851
9RES, 100 ohm, 5%, 0.1W,
0603 2 R5, R14 Vishay-Dale CRCW0603100RJNEA
10 RES, 51 ohm, 5%, 0.1W,
0603 1 R16 Vishay-Dale CRCW060351R0JNEA
11 RES, 0 ohm, 5%, 0.063W,
0402 5 R28, R29, R30, R31, R32 Vishay-Dale CRCW04020000Z0ED
12 DIP Switch, 4 position slide
actuator, SPST, SMD 1 S1 Omron Electronic Components A6S-4104-H
13 0.375" Standoff 6 SO1, SO2, SO3, SO4,
SO5, SO6
14 LMK00101 1 U1 Texas Instruments LMK00101
15 CAP, CERM, 0.1uF, 16V,
+80/-20%, Y5V, 0402 0 C10, C13, C14, C16, C19 TDK C1005Y5V1C104Z
16 CAP, CERM, 0.01uF, 25V,
+/-10%, X7R, 0402 0 C11, C12, C15, C17, C18 TDK C1005X7R1E103K
17 CAP, CERM, 5.6pF, 50V,
+/-5%, C0G/NP0, 0603 0 C24, C25 AVX 06035A5R6CAT2A
18 CAP, CERM, 10uF, 10V,
+/-10%, X5R, 0805 0 C300, C302, C304, C306 MuRata GRM21BR61A106KE19L
19 CAP, CERM, 2200pF,
100V, +/-5%, X7R, 0603 0 C301, C305 AVX 06031C222JAT2A
20 CAP, CERM, 0.01uF, 25V,
+/-5%, C0G/NP0, 0603 0 C303, C307 TDK C1608C0G1E103J
21 RES, 100 ohm, 5%, 0.1W,
0603 0 R1, R2, R8, R9 Vishay-Dale CRCW0603100RJNEA
22 RES, 51 ohm, 5%, 0.1W,
0603 0R6, R7, R12, R13, R18,
R19, R20, R21, R22, R23,
R24, R25, R26, R27 Vishay-Dale CRCW060351R0JNEA
23 RES, 0 ohm, 5%, 0.1W,
0603 0R33, R34, R40, R41, R42, R43, R309 Vishay-Dale CRCW06030000Z0EA
24 RES, 4.7k ohm, 5%, 0.1W,
0603 0 R300, R301, R302 Vishay-Dale CRCW06034K70JNEA

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Table 6. Bill of Materials (continued)
Item DESCRIPTION QTY DESIGNATOR MANUFACTURER PART NUMBER
25 RES, 15k ohm, 5%, 0.1W,
0603 0 R303, R304, R305 Vishay-Dale CRCW060315K0JNEA
26 RES, 51k ohm, 5%, 0.1W,
0603 0 R306, R310 Vishay-Dale CRCW060351K0JNEA
27 RES, 866 ohm, 1%, 0.1W,
0603 0 R307, R311 Vishay-Dale CRCW0603866RFKEA
28 RES,1.30k ohm, 1%, 0.1W,
0603 0 R308 Vishay-Dale CRCW06031K30FKEA
29 RES, 2.00k ohm, 1%,
0.1W, 0603 0 R312 Vishay-Dale CRCW06032K00FKEA
30 Testpoint 0 TP_VCC_LDO, TP_VCCO_LDO, TPVcc,
TPVccIN, TPVcco
31
Micropower800mA Low
Noise "Ceramic Stable"
Adjustable Voltage
Regulator for 1V to 5V
Applications, 8-pin LLP,
Pb-Free
0 U2, U3 Texas Instruments LP3878SD-ADJ/NOPB
32 0 uWire, Vdd_TB,
VddCLKout_TB
33 Crystal, xxxMHz, xxpF,
[MountType] 0 Y1
34 Crystal, Citizen CS325,
XXMHz 0 Y2