Texas Instruments ADS8401EVM User manual

User's GuideSLAU114A – December 2004
ADS8401/ADS8405/ADS8411EVM User's Guide
This user's guide describes the characteristics, operation, and use of theADS8401/ADS8405/ADS8411 16-bit parallel analog-to-digital converter evaluationboard. A complete circuit description, as well as schematic diagram, layout, and bill ofmaterials, are included.
Contents1 EVM Overview ...................................................................................... 22 Digital Interface ..................................................................................... 43 Power Supplies ..................................................................................... 54 Using the EVM ...................................................................................... 65 Related Documentation From Texas Instruments .............................................. 7Appendix A ADS8401EVM/ADS8405EVM/ADS8411EVM BOM .................................. 8Appendix B ADS8401/ADS8405/ADS8411EVM Layout .......................................... 10Appendix C ADS8401/ADS8405/ADS8411EVM Schematic ..................................... 14
List of Figures
1 ADS8411 Input Buffer Circuit ..................................................................... 32 Decoding Control Signals Using the Address Bus ............................................. 7B-1 Toplayer – Layer 1 ................................................................................ 10B-2 Ground Plane – Layer 2 .......................................................................... 11B-3 Power Plane – Layer 3 ........................................................................... 12B-4 Bottom Layer – Layer 4 .......................................................................... 13
List of Tables
1 Analog Input Connector ............................................................................ 22 Pad Jumper Setting ................................................................................ 33 Parallel Control Connector P2 .................................................................... 44 Pin Jumper Setting for Decoder Outputs ........................................................ 45 Data Bus Connector P3 ............................................................................ 46 Pinout for Converter Control Connector J3 ..................................................... 57 Power Supply Test Points ......................................................................... 58 Power Connector, J1, Pin Out .................................................................... 6A-1 Bill of Materials ...................................................................................... 8
ADS8401/ADS8405/ADS8411EVM User's GuideSLAU114A – December 2004 1

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1 EVM Overview
1.1 Features
1.2 Analog Interface
1.3 Signal Conditioning
EVM Overview
•Full-Featured evaluation board for the high speed SAR type ADS8401, ADS8405, and ADS841116-bit, single channel, parallel interface analog-to-digital converters.•On board signal conditioning•On board reference•Input and output digital buffers•On board decoding for stacking multiple EVMs
The ADS8401, ADS8405, and ADS8411 analog-to-digital converters have both a positive and negativeanalog input pin. The EVM gives the provision to ground the negative input close to the device via SJP3,or to wire in a user ground. The negative input pin, which has a range of –200 mV up to 200 mV, arrivesshorted to ground on the EVM via SJP3. A signal to the positive input pin can be applied at connector P1pin 2 (shown in Table 1 ) or at center pin of SMA connector J2.
Table 1. Analog Input Connector
Connector.Pin#
(1)
Signal Description
P1.2 +IN Non-inverting input channelP1.4 ReservedP1.6 ReservedP1.8 ReservedP1.10 ReservedP1.12 ReservedP1.14 ReservedP1.16 ReservedP1.18 ReservedP1.20 REF+ External reference input
(1)
All odd numbered pins of P1 are tied to AGND.
The factory recommends the analog input to any SAR type converter be buffered and low pass filtered.This input buffer on the ADS8411/ADS8405/ADS8401EVM utilizes the THS4031 configured as anINVERTING gain of one, as shown in Figure 1 . It is important to note the amplifier is not stable at a gain ofone, thus, it is configured in for inverting gain of one. The THS4031 was selected for its low noise, highslew rate and fast settling time. The low pass filter resistor and capacitor values are selected such thatADS8411/ADS8405/ADS8401EVM meets the 100 kHz ac performance specifications listed in the datasheet. The series resistor works in conjunction with the capacitor to filter the input signal, and isolates theamplifier from the large capacitive load. The capacitor to ground at the input of the A/D works inconjunction with the series resistor to filter the input signal, and acts like a charge reservoir. This externalfilter capacitor works with the amplifier to charge the internal sampling capacitor during sampling mode.
The EVM has a provision to offset the input voltage by adjusting a 10 k Ωpotentiometer (R25).
ADS8401/ADS8405/ADS8411EVM User's Guide2 SLAU114A – December 2004

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−VCC
+VCC
+4.096 V
Vin
1kΩ
THS4031
6800 pF
(+)IN
(−)IN
1kΩ
10 kΩ
0.22 µF
0.1 µF
1 µF
1 µF
0.1 µF
500 Ω
15 Ω
C39
R13
R2
R25
R6
R10
C7
C31
C37
C15
C33
U2
1.4 Reference
EVM Overview
Figure 1. ADS8411 Input Buffer Circuit
The ADS8401/ADS8405/ADS8411EVM allows users to select from three different reference sources. Itprovides an onboard 4.096-V reference circuit. Allows for the user to supply a user reference voltage viaconnector P1 pin 20 or select the on-chip reference voltage. The user reference voltage and onboardreference voltages can be filtered by installing amplifier U1. The ADS8401, ADS8405, and ADS8411analog-to-digital converters have a integrated onboard reference buffer; therefore, it is not necessary tobuffer the voltage externally. The reference buffer (U1)circuit on the EVM is not populated with anamplifier for this reason. The EVM comes installed with on-chip internal reference shorted directly to thereference pin of the converter.
The EVM allows users to select from three reference sources via solder jumper pads SJP1, SJP2, andSJP3. Set SJP1, SJP2, and SJP3 to select from the three reference voltage sources. See Table 2 forjumper settings. See Appendix C for the full schematic.
Table 2. Pad Jumper Setting
Reference Description Jumper SettingDesignator
1–2 2–3
SJP1 Select REF3040 output for reference voltage Installed
(1)
Not installedSelect buffered reference voltage Not installed InstalledSJP2 Select internal A/D 4.096 V reference Installed
(1)
Not installedSelect U3, REF3040, as 4.096 V reference Not installed InstalledSJP3 Short (–) IN pin to ground Installed
(1)
N/ASJP4 Buffered REF3040 reference voltage Installed
(1)
Not installedBuffer user supplied reference voltage via P1 pin 20 Not installed InstalledSJP5 Apply offset voltage to A/D buffer Not installed N/ASJP6 Set negative rail of amplifier U1 to ground Installed Not installedSet negative rail of amplifier U1 to –V
CC
Not installed InstalledSJP7 Set negative supply of amplifier U2 to ground Installed Not installedSet negative supply of amplifier U2 to –V
CC
Not installed Installed
(1)
(1)
Factory set conditioin
SLAU114A – December 2004 3ADS8401/ADS8405/ADS8411EVM User's Guide

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2 Digital Interface
Digital Interface
The ADS8411/ADS8405/ADS8401EVM is designed for easy interfacing to multiple platforms. Samtec plugand socket connectors provide a convenient dual row header/socket combination at P1, P2 and P3 to pluginto prototype boards or ribbon cables. Consult Samtec at www.samtec.com or 1-800-SAMTEC-9 for avariety of mating connector options.
Table 3. Parallel Control Connector P2
Connecator.Pin
(1)
Signal Description
P2.1 DC_CS Daughter card Board Select pinP2.3
P2.5
P2.7 A0 Address line from processorP2.9 A1 Address line from processorP2.11 A2 Address line from processorP2.13
P2.15
P2.17
P2.19 BUSY Busy signal from converter. W4 must be shorted.
(1)
All even numbered pins of P2 are tied to DGND
Read ( RD), conversion start ( CONVST), and reset ( RESET) signals to the converter can be assigned totwo different addresses in memory via jumper settings. This allows for the stacking of up to twoADS8401EVM, ADS8405EVM and/or ADS8411EVMs into processor memory. See Table 4 for jumpersettings. Note that the evaluation module does not allow the chip select ( CS) line of the converter to beassigned to different memory locations. It is, therefore, suggested the CS line be grounded or wired to anappropriate signal of the processor.
Table 4. Pin Jumper Setting for Decoder Outputs
Reference Description Jumper SettingDesignator
1–2 2–3
W1 Set A[2..0] = 0x1 to generate RD pulse Installed
(1)
Not installedSet A[2..0] = 0x2 to generate RD pulse Not installed InstalledW2 Set A[2..0] = 0x3 to generate CONVST pulse Installed
(1)
Not installedSet A[2..0] = 0x4 to generate CONVST pulse Not installed InstalledW3 Set A[2..0] = 0x5 to generate RESET pulse Installed
(1)
Not installedSet A[2..0] = 0x6 to generate RESET pulse Not installed InstalledW4 Short busy signal to P2 pin 19 Installed
(1)
N/A
(1)
Factory set conditioin
The data bus is available at connector P3. See Table 5 for pin out information.
Table 5. Data Bus Connector P3
Connector.Pin
(1)
Signal Description
P3.1 D0 Buffered Data Bit 0 (LSB)P3.3 D1 Buffered Data Bit 1P3.5 D2 Buffered Data Bit 2
(1)
All even numbered pins of P3 are tied to DGND.
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3 Power Supplies
Power Supplies
Table 5. Data Bus Connector P3 (continued)
Connector.Pin
(1)
Signal Description
P3.7 D3 Buffered Data Bit 3P3.9 D4 Buffered Data Bit 4P3.11 D5 Buffered Data Bit 5P3.13 D6 Buffered Data Bit 6P3.15 D7 Buffered Data Bit 7P3.17 D8 Buffered Data Bit 8P3.19 D9 Buffered Data Bit 9P3.21 D10 Buffered Data Bit 10P3.23 D11 Buffered Data Bit 11P3.25 D12 Buffered Data Bit 12P3.27 D13 Buffered Data Bit 13P3.29 D14 Buffered Data Bit 14P3.31 D15 Buffered Data Bit 15 (MSB)
This evaluation module provides direct access to all the analog-to-digital converter control signals viaconnector J3, see Table 6 .
Table 6. Pinout for Converter Control Connector J3
Connector.Pin
(1)
Signal Description
J3.1 CS Chip select pin, active lowJ3.3 RD Read pin, active lowJ3.5 CONVST Convert start pin, active lowJ3.7 BYTE BYTE mode pin, used for 8-bit busesJ3.9 RESET Reset pin, active lowJ3.11 BUSY Converter status output. High when a conversion is in process.
(1)
All even numbered pins of J3 are tied to DGND.
The EVM accepts four power supplies.•A dual ±Vs dc supply for the dual supply op amps. Recommend ±12 VDC supply.•A single +5 V dc supply for analog section of the board (A/D + Reference).•A single +5 V or +3.3 V dc supply for digital section of the board (A/D + address decoder + buffers).
The two ways to provide these voltages are as follows:1. Wire in voltages at test points on the EVM. See Table 7 .
Table 7. Power Supply Test Points
Test Point Signal Description
TP11 +BVDD Apply +3.3 VDC or +5 VDC. See respective ADC data sheet for full range.TP10 +AVCC Apply +5 VDCTP12 +VA Apply +12.0 VDC. Positive supply for amplifier.TP14 –VA Apply –12.0 VDC. Negative supply for amplifier.
ADS8401/ADS8405/ADS8411EVM User's GuideSLAU114A – December 2004 5

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4 Using the EVM
Using the EVM
2. Use the power connector J1, and derive the voltages elsewhere. See Table 8 for the pinoutsfor this connector.
Table 8. Power Connector, J1, Pin Out
Signal Power Connector – J1 Signal
+VA (+12VA) 1 2 –VA (–12VA)+AVCC (+5VA) 3 4 N/CN/C 5 6 AGNDN/C 7 8 N/CN/C 9 10 +BVCC (+5VD)
The ADS8401/ADS8405/ADS8411EVM serves three functions:1) a reference design2) a prototype board3) a test platform for the software engineer to develop code.
As a reference design, the ADS8401/ADS8405/ADS8411EVM contains the essential circuitry to showcasethe analog-to-digital converter. This essential circuitry includes the input amplifier, reference circuit, andbuffers. The EVM analog input circuit is optimized for 100 kHz sine wave, therefore users may need toadjust the resistor and capacitor values of the A/D input RC circuit. In AC type applications where signaldistortion is concern, polypropylene capacitors should be used in the signal path. In applications where theinput is multiplexed, the A/D input resistor and capacitor may need to be adjusted or possibly removedaltogether.
As a prototype board, the buffer circuit consists of footprint is a standard 8–pin SOIC and resistor pads forinverting and non-inverting configurations. The ADS8401/ADS8405/ADS8411EVM can be used toevaluate both dual and single supply amplifiers. The EVM comes installed with a dual supply amplifier as itallows the user to take advantage of the full input voltage range of the converter. For applications thatrequire signal supply operation and smaller input voltage range, the THS4031 can be replaced with thesingle supply amplifier like OPA300 or OPA355. Pad jumper SJP7 should be shorted between pads 1 and2, as it shorts the minus supply pin of the amplifier to ground. Positive supply voltage can be applied viatest pint TP12 or connector J1 pin 1.
As a software test platform, connectors P1, P2 and P3 plug into the parallel interface connectors of the5-6K interface card. The 5-6K interface card sits on the C5000 and C6000 Digital Signal Processor starterkit (DSK). The ADS8401/ADS8405/ADS8411EVM is then mapped into the processor's memory space.This card also provides an area for signal conditioning. This area can be used to install applicationcircuit(s) for digitalization by the ADS8401, ADS8405 or ADS8411 analog-to-digital converter. Refer to the5-6K interface card user's guide (SLAU104 ) for more information.
For the software engineer the ADS8401/ADS8405/ADS8411EVM provides a simple platform forinterfacing to the converter. The EVM provides standard 0.1 inch headers and sockets to wire intoprototype boards. The user need only provide in 3 address lines (A2, A1, A0) and address valid lineDC_CS) to connector P2, as shown in Figure 2 . To choose which address combinations will generate RD,CONVST, and RESET set jumpers as shown in Table 4 . Recall chip select ( CS) signal is not memorymapped or wired to P2, therefore it must be controlled via general purpose pin or shorted to ground at J3pin 1. If address decoding is not required, the EVM provides direct access to converter data bus andcontrol I/O via connectors P3 and J3, respectively.
ADS8401/ADS8405/ADS8411EVM User's Guide6 SLAU114A – December 2004

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A
B
C
A1
A0
A2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7 RESET
RD
CONVST
1
1
1
W1
W2
W3
SN74AHC138
G
DC_CS
5 Related Documentation From Texas Instruments
Related Documentation From Texas Instruments
Figure 2. Decoding Control Signals Using the Address Bus
To obtain a copy of any of the following TI documents, call the Texas Instruments Literature ResponseCenter at [phone] or the Product Information Center (PIC) at [phone]. When ordering,identify this booklet by its title and literature number. Updated documents can also be obtained throughour website at www.ti.com.
Data Sheets Literature Number:ADS8401 SLAS376ADS8405 SLAS427ADS8411 SLAS369THS4031 SLOS224OPA627 SBOS165REF3040 SBVS032SN74AHC138 SCLS258SN74AHC245 SCLS230
ADS8401/ADS8405/ADS8411EVM User's GuideSLAU114A – December 2004 7

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Appendix A ADS8401EVM/ADS8405EVM/ADS8411EVM BOM
Appendix A
Table A-1 contains a complete bill of materials for the ADS8401/ADS8405/ADS8411EVM. The schematicdiagram is provided in Appendix C. Contact the Product Information Center or e-mail[email protected] for questions regarding this EVM.
Table A-1. Bill of Materials
Item QTY Value Reference MFG MFG. Part No. DescriptionNo. Designators
1 1 0 ΩR24 Panasonic - ECG or ERJ-3GEY0R00V Resistor, 0 Ω, 1/16 W, 5%, 0603 SMDalternate
2 1 15 ΩR1 Panasonic - ECG or ERJ-6ENF15R0V Resistor, 15 Ω, 1/10 W, 1%, 0805 SMDalternate
0 R1
(1)
Panasonic - ECG or ERJ-6GEY0R00V Resistor 0 Ω, 805alternate
3 1 49.9 ΩR8 Panasonic - ECG or ERJ-8ENF49R9V Resistor, 49.9 Ω, 1/8 W, 1%, 1206 SMDalternate
4 1 NI R11 Not installed Not installed
5 1 5 ΩR13 Yageo America or 9C08052A4R99FKHFT Resistor, 4.99 Ω, 1/8 W, 1%, 0805 SMDalternate
15 ΩR13
(1)
Panasonic - ECG or ERJ-6ENF15R0V Resistor, 15 Ω, 1/10W, 1%, 0805 SMDalternate
6 1 75 ΩR21 Panasonic - ECG or ERJ-6ENF75R0V Resistor, 75 Ω, 1/10 W, 1%, 0805 SMDalternate
7 1 100 ΩR14 Panasonic - ECG or ERJ-6ENF1000V Resistor, 100 Ω, 1/10 W, 1%, 0805 SMDalternate
8 1 200 ΩR4 Panasonic - ECG or ERJ-6ENF2000V Resistor, 200 Ω, 1/10 W, 1%, 0805 SMDalternate
9 1 499 ΩR2 Panasonic - ECG or ERJ-6ENF4990V Resistor, 499 Ω, 1/10 W, 1%, 0805 SMDalternate Panasonic -ECG or alternate
10 2 1 k ΩR6 R10 Panasonic - ECG or ERJ-6ENF1001V Resistor, 1 k Ω, 1/10 W, 1%, 0805 SMDalternate
11 5 10 k ΩR16, R17, R18, Panasonic - ECG or ERJ-3EKF1002V Resistor, 10 k Ω, 1/16 W, 1%, 0603 SMDR19, R20 alternate
12 4 1 nF C3, C5, C11, C23 TDK Corporation or C3216C0G1H102JT Capacitor, 1000 pF, 50 V, ceramic, NPOalternate 1206
13 1 4700 pF C39 WIMA MKP2 4700/630/5 Capacitor, 4700 pF, polypropylene
6800 pF C39
(1)
WIMA MKP2 6800/100/1 Capacitor, 6800 pF, polypropylene
14 10 0.01 µF C13, C21, C38, TDK Corporation or C1608X7R1H103JT Capacitor, 10000 pF, 50 V, ceramic, X7RC41, C44, C46, alternate 0603C48, C53 C50, C56
15 3 0.01 µF C10, C18, C20 TDK Corporation or C2012X7R1H103KT Capacitor, 10000 pF, 50 V, ceramic, X7Ralternate 0603
16 14 0.1 µF C8, C25, C34, C40, TDK Corporation or C1608X7R1E104KT Capacitor, 0.1 µF, 25 V, ceramic, X7RC42, C43, C47, alternate 0603C51, C52, C54,C55, C57, C58, C62
17 7 0.1 µF C7, C9, C15, C22, TDK Corporation or C2012X7R1H104JT Capacitor, 0.10 µF, 50 V, ceramic, X7RC32, C36, C45 alternate 0805
18 2 0.01 µF C4, C26 TDK Corporation or C3216X7R1H103JT Capacitor, 10000 pF, 50 V, ceramic, X7Ralternate 1206
19 1 0.22 µF C33 TDK Corporation or C2012X7R1C224KT Capacitor, 0.22 µF, 16 V, ceramic, X7Ralternate 0805
20 4 1 µF C31, C37, C59, C60 TDK Corporation or C2012X7R1E105KT Capacitor,ceramic, 1 µF, 25 V, X7R 0805alternate T/R
21 2 1 µF C2, C28 TDK Corporation or C3216X7R1E105KT Capacitor, 0.1 µF, 25 V, ceramic, X7Ralternate 1206
(1)
This part is to be used with the ADS8411EVM only.
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Appendix A
Table A-1. Bill of Materials (continued)Item QTY Value Reference MFG MFG. Part No. DescriptionNo. Designators
22 4 10 µF C1, C6, C12, C19 TDK Corporation or C3216X5R1C106MT Capacitor, 10 µF, 16 V, ceramic, X5R 1206alternate
23 3 10 µF C14, C24, C49 Kemet or alternate T491B106K016AS Capacitor, tantalum, 10 µF, 16 V, 10%,SMT
24 1 22 µF C17 TDK Corporation or C3216X5R0J226MT Capacitor, 22 µF, 6.3 V, ceramic, X5Ralternate 1206
25 2 47 µF C27, C29 Kemet or alternate T491B476M010AS Capacitor, tantalum, 47 µF, 10 V, 20%,SMT
26 2 NI C16, R3 Not installed Not installed
27 5 NI C30, C35, C61, Not installed Not installed Chip resistor, 1/10 W, 0805C63, R5
28 1 10 k ΩR25 Bourns 3214W-1-103E Trimpot, 10 k Ω, 4 mm top ADJ SMD
29 2 1 k ΩRP1, RP3 CTS Corporation 742C163102JTR Resistor array, 1 k Ω, 16 terminal, 8 resistor,SMD
30 1 100 ΩRP2 CTS Corporation 742C163101JTR Resistor array, 100 Ω, 16 terminal, 8 re-sistor, SMD
31 4 BLM21AJ601SN1L L1, L2, Lc, L4 TDK Corporation or MPZ2012S601AT Chip ferrite beads, 600 Ωat 100 MHzalternate
32 1 OPA627 U1 Not installed Not installed
33 1 THS4031 U2 Texas Instruments THS4031IDR Amplifier, 100-MHz, low-noise, high-speed
34 1 REF3040 U3 Texas Instruments REF3040AIDBZT REF3040, 50 ppm/ °C, 50 µA in SOT23-3CMOS voltage reference
35 1 ADS8401 U4 Texas Instruments ADS8401IPFBT ADS8401, 16 bit, 1.25 MSPS
ADS8405 U4
(2)
Texas Instruments ADS8405IPFBT ADS8405, 16 bit, 1.25 MSPS
ADS8411 U4
(1)
Texas Instruments ADS8411IPFBT ADS8411, 16 bit, 2 MSPS
36 3 SN74AHC245PWR U5, U6, U7 Texas Instruments SN74AHC245PWR Octal bus transceiver, 3-state
37 1 SN74AHC138PWR U8 Texas Instruments SN74AHC138PWR 3-line to 8-line decoder/demultiplexer
38 1 SOIC-8 U9 Not installed Not installed
39 1 5X2X.1 J1 Samtec SSW-105-22-S-D-VS 0.025" SMT socket - bottom side of PWBSamtec TSM-105-01-T-D-V-P 0.025" SMT plug - top side of PWB
40 1 SMA_PCB_MT J2 Johnson Components 142-0701-301 Right angle SMA connectorInc.
41 1 6X2X.1 J3 Samtec SSW-106-22-S-D-VS 0.025" SMT socket - bottom side of PWBSamtec TSM-105-01-T-D-V-P 0.025" SMT plug - top side of PWB
42 2 10X2x.1 P1, P2 Samtec SSW-110-22-S-D-VS 0.025" SMT socket - bottom side of PWBSamtec TSM-110-01-T-D-V-P 0.025" SMT plug - top side of PWB
43 1 16X2X.1_SMT_ P3 Samtec SSW-116-22-S-D-VS 0.025" SMT socket - bottom side of PWBPLUG_ &_SOCKET Samtec TSM-116-01-T-D-V-P 0.025" SMT plug - top side of PWB
44 1 SW-PB S1 Panasonic EVQ-PJU04K Switch
45 2 SJP2, SJP3, SJP5 Not installed Not installed Pad 2 position jumper
46 5 SJP1, SJP2, SJP3, Not installed Not installed Pad 3 position jumperSJP4, SJP6, SJP7
47 2 2POS_JUMPER W4, W5 Samtec TSW-102-07-L-S 2 Positiion jumper, 0.1" spacing
48 3 3POS_JUMPER W1, W2, W3 Samtec TSW-103-07-L-S 3 Positiion jumper, 0.1" spacing
49 14 TP_0.025 TP1, TP2, TP3, Keystone 5000K-ND Test point - Single, 0.025" pinTP4, TP5, TP6, ElectronicsTP7, TP8, TP9,TP10, TP11, TP12,TP13, TP14
(2)
This part is to be used with the ADS8405EVM only.
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Appendix B ADS8401/ADS8405/ADS8411EVM Layout
Appendix B
Figure B-1. Toplayer – Layer 1
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Appendix B
Figure B-2. Ground Plane – Layer 2
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Appendix B
Figure B-3. Power Plane – Layer 3
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Appendix B
Figure B-4. Bottom Layer – Layer 4
ADS8401/ADS8405/ADS8411EVM LayoutSLAU114A – December 2004 13

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Appendix C ADS8401/ADS8405/ADS8411EVM Schematic
Appendix C
The following pages contain the schematics for the ADS8401EVM, ADS8405EVM, and ADS8411EVM.
ADS8401/ADS8405/ADS8411EVM Schematic14 SLAU114A – December 2004

A
B
C
D
D
C
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ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
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Drawn By:
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Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
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BlockDiagram.sch
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DATE: 29-Jul-2004
ADS8401/ADS8405/ADS8411EVM
6446988
+IN
EXT_REF
B_CS B_RD B_CONVST B_BYTE B_RESET BUSY DB[15...0]
Analog-to-Digital Converter
Parallel Control
12 34 56 78 910 1112 1314 1516 1718 1920
P2
Analog Input
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
P1
+VA
-VA
B_DB[15...0]
DB[15...0]
CS RD CONVST BYTE RESET B_BUSY
BUSY
B_CS
B_RD
B_CONVST
B_BYTE
B_RESET
+AVCC
+VA
-VA
+BVDD
A0 A1 A2 DC_CS
Power & Digital Buffer
J2
B_DB[15...0]
DB[15..0]
B_DB0
B_DB1
B_DB2
B_DB3
B_DB4
B_DB5
B_DB6
B_DB7
B_DB8
B_DB9
B_DB10
B_DB11
B_DB12
B_DB13
B_DB14
B_DB15
+AVCC
+BVDD
Lijoy Philipose
Lijoy Philipose
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11 12 12
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21 22 22
23
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25
25 26 26
27
27 28 28
29
29 30 30
31
31 32 32
P3
CS
RD
CONVST
BYTE
RESET
B_BUSY
A0
A1
A2
1 2
3 4
5 6
7 8
910
J1
+VA -VA
+BVDD
AGND
+AVCC
DGND
TP10
TP11
TP12
TP14
W4
ADC Control
12 34 56 78 9
11
10
12
J3
BUSY
DC_CS

1 2 3 4 5 6
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ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
23
Analog-to-Digital Converter
B
DATE: 29-Jul-2004
Analog Circuits
6446988
C21
0.01uF
C43
0.1uF
C42
0.1uF
C48
0.01uF
C41
0.01uF
C47
0.1uF
C52
0.1uF
C44
0.01uF
C55
0.1uF
C56
0.01uF
+5VCC
+5VCC
+5VCC
+5VCC
C54
0.1uF
C50
.01uF
+5VCC
C51
0.1uF
C53
0.01uF
+VBD
B_CS
B_RD
B_CONVST
B_BYTE
BUSY
B_RESET
+VBD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15
C46
0.01uF
C40
0.1uF
+5VCC
BUSY
DB[15...0]
B_CS
B_RD
B_BYTE
B_CONVST
B_RESET
-VCC
+VCC
C7
0.1uF
C31
1uF
C37
1uF C15
0.1uF
R10
1000
R13
5
C39
4700pF
+IN
C35
NI
C33
0.22uF
R5
NI
EXT_REF
R4
200
DB[15...0]
R11
NI
TP4
31
2
SJP2
1 2
SJP3
R6
1000
+
C49
10uF
REFIN
1
REFOUT
2
NC
3
+VA
4
AGND
5
+IN
6
-IN
7
AGND
8
+VA
9
+VA
10
AGND
11
AGND
12
AGND
14
AGND
15
DB15
16
DB14
17
DB13
18
DB12
19
DB11
20
DB10
21
DB9
22
DB8
23
+VBD
24
BDGND 25
DB7 26
DB6 27
DB5 28
DB4 29
DB3 30
DB2 31
DB1 32
DB0 33
+VBD 34
BDGND 35
BUSY 36
+VBD 37
RESET 38
BYTE 39
CONVST 40
RD 41 CS 42
+VA 43
AGND 44 AGND 45
+VA 46
REFM 47 REFM 48
+VA
13
U4
ADS8401
C8
0.1uF
C13
0.01uF
+VBD
C16
NI
NC 1
+VIN 2
EN 3
GND 4 NC
5
VREF
6
NC
7
NC
8
U9
NI
+5VCC
C18
0.01uF
C45
0.1uF
C17
22uF
R21
75
R14
100
C61
NI
+VCC
C59
1uF C36 0.1uF
-VCC
C32
0.1uF
C60
1uF
IN
1
OUT
2GND 3
U3
REF3040
+5VCC
R3
NI
3 1
2
SJP1
3 1
2
SJP4
SJP3
R24
0
Lijoy Philipose
Lijoy Philipose
C63
NI
1
2
3
R25
10k
12
SJP5
3
26
74
5
1
U1
OPA627
R8
50
31
2
SJP7
31
2
SJP6
*
*
*
3
26
74
5 18
U2
THS4031
C30
NI
*
C34
0.1uF
C38
0.01uF
TP9
R1
15
R2
500

123456
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6
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ti
12500 TI Boulevard. Dallas, Texas 75243
TITLE:
SHEET: OF:
FILE: SIZE:
REV:
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
DOCUMENT CONTROL #:
33
Power & Digital Buffer
B
DATE: 29-Jul-2004
Power Supply & Digital Buffer Circuits
6446988
L4
BLM21AJ601SN1L
L2
BLM21AJ601SN1L
L1
BLM21AJ601SN1L
+
C24
10uF
+
C29
47uF
+
C27
47uF
C28
1uF
C2
1uF
C4
0.01uF
C26
0.01uF
L3
BLM21AJ601SN1L
+
C14
10uF
TP6 +5VCC
C10
0.01uF
C9
0.1uF
TP5
TP8 +VBD
C20
0.01uF
C22
0.1uF
TP7
TP3
TP1
TP2
+VCC
-VCC
C12
10uF
C19
10uF
C6
10uF
C1
10uF
C5
1nF
C3
1nF
C23
1nF
C11
1nF
B_DB[17...0]
116
215
314
413
5
9
12
6
810
11
7
RP1
1K
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U6
SN74AHC245PWR
C57
0.1uF
B_RD
116
215
314
413
5
9
12
6
810
11
7
RP3
1K
+VBD
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U7
SN74AHC245PWR
C58
0.1uF
B_RD
DB[17...0]
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
B_DB15
B_DB14
B_DB13
B_DB12
B_DB11
B_DB0
B_DB10
B_DB1
B_DB9
B_DB2
B_DB8
B_DB3
B_DB7
B_DB4
B_DB6
B_DB5
CS
RD
CONVST
BYTE
RESET
B_BUSY
116
215
314
413
5
9
12
6
810
11
7
RP2
100
/OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
VCC
GND
U5
SN74AHC245PWR
+VBD
C25
0.1uF
CS
RD
CONVST
BYTE
RESET
R20
10k R19 10k R18 10k
+VBD
R17
10k
R16
10k
BUSY
B_CS
B_RD
B_CONVST
B_BYTE
B_RESET
+AVCC +VA
-VA
DB[17...0]
B_DB[17...0]
+BVDD
B_CS
B_BYTE
B_CONVST
B_RD
B_RESET
Lijoy Philipose
Lijoy Philipose
+VBD
A1
B2
C3
G1 6
G2A 4
G2B 5
Y0
15 Y1
14 Y2
13 Y3
12 Y4
11 Y5
10 Y6
9Y7
7
VCC 16
GND
8
U8
SN74AHC138PWR
A0
A1
A2
A0
A2
A1
+VBD
C62
0.1uF
+VBD
1
3
2
W1
1
3
2
W2
TP13
W3
+VBD
+VBD
DC_CS
RESET#
S1
DC_CS

FCC Warnings
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequencyenergy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules,which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in otherenvironments may cause interference with radio communications, in which case the user at his own expense will be required totake whatever measures may be required to correct this interference.
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLYand is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms ofrequired design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typicallyfound in the end product incorporating the goods. As a prototype, this product does not fall within the scope of the European Uniondirective on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.Should this evaluation kit not meet the specifications indicated in the EVM User's Guide, the kit may be returned within 30 daysfrom the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLERTO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANYWARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from allclaims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliantor agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user's responsibility to take any and allappropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE Liable to the other FORANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.TI assumes no liability for applications assistance, customer product design, software performance, or infringement ofpatents or services described herein.
Please read the EVM User's Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User's Guide prior tohandling the product. This notice contains important safety information about temperatures and voltages. For further safetyconcerns, please contact the TI application engineer.Persons handling the product must have electronics training and observe good laboratory practice standards.No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, orcombination in which such TI products or services might be or are used.
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of ±12 V and the output voltage range of 0 V to 5.5 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there arequestions concerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to theEVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the loadspecification, please contact a TI field representative.During normal operation, some circuit components may have case temperatures greater than 60 °C. The EVM is designed tooperate properly with certain components above 60 °C as long as the input and output ranges are maintained. These componentsinclude but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types ofdevices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes nearthese devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2004, Texas Instruments Incorporated

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