Texas Instruments AM263 Series User manual

User’s Guide
AM263x Control Card Hardware User's Guide
ABSTRACT
The AM263x Control Card Evaluation Module (EVM) is an evaluation and development board for the Texas
Instruments Sitara™ AM263x series of microcontrollers (MCUs). This EVM provides an easy way to start
developing on the AM263x MCUs with on-board emulation for programming and debugging as well as buttons
and LED for a simple user interface. The control card also enables header pin access to key signals through the
use of a high speed edge connector (HSEC) baseboard docking station for rapid prototyping.
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Table of Contents
1 Preface: Read This First.........................................................................................................................................................4
1.1 Sitara MCU+ Academy.......................................................................................................................................................4
1.2 If You Need Assistance...................................................................................................................................................... 4
1.3 Important Usage Notes...................................................................................................................................................... 4
2 Control Card Overview...........................................................................................................................................................5
2.1 Kit Contents........................................................................................................................................................................5
2.2 Key Features......................................................................................................................................................................6
2.3 Component Identification................................................................................................................................................... 7
2.4 HSEC 180-pin Control Card Docking Station.....................................................................................................................8
2.5 Compliance........................................................................................................................................................................ 8
3 Board Setup.............................................................................................................................................................................8
3.1 Power Requirements..........................................................................................................................................................8
3.2 Push Buttons....................................................................................................................................................................13
3.3 Boot Mode Selection........................................................................................................................................................ 14
3.4 JTAG Path Selection........................................................................................................................................................ 15
4 Hardware Description...........................................................................................................................................................16
4.1 Functional Block Diagram................................................................................................................................................ 16
4.2 GPIO Mapping................................................................................................................................................................. 17
4.3 Reset................................................................................................................................................................................18
4.4 Clock................................................................................................................................................................................ 20
4.5 Memory Interface............................................................................................................................................................. 21
4.6 Ethernet Interface.............................................................................................................................................................22
4.7 I2C....................................................................................................................................................................................28
4.8 Industrial Application LEDs.............................................................................................................................................. 29
4.9 SPI................................................................................................................................................................................... 30
4.10 UART..............................................................................................................................................................................30
4.11 MCAN.............................................................................................................................................................................31
4.12 FSI..................................................................................................................................................................................32
4.13 JTAG.............................................................................................................................................................................. 32
4.14 Test Automation Header.................................................................................................................................................34
4.15 LIN..................................................................................................................................................................................35
4.16 MMC ..............................................................................................................................................................................36
4.17 ADC and DAC................................................................................................................................................................ 37
4.18 Pinmux Mapping............................................................................................................................................................ 40
4.19 HSEC Pinout.................................................................................................................................................................. 46
5 References............................................................................................................................................................................ 52
5.1 Reference Documents..................................................................................................................................................... 52
5.2 Other TI Components Used in This Design..................................................................................................................... 52
6 Revision History................................................................................................................................................................... 52
A E2 Design Changes..............................................................................................................................................................53
List of Figures
Figure 2-1. System Architecture.................................................................................................................................................. 5
Figure 2-2. Component Identification...........................................................................................................................................7
Figure 3-1. USB Type-C Power Delivery Classification............................................................................................................... 9
Figure 3-2. Type-C CC Configuration........................................................................................................................................ 10
Figure 3-3. Power Status LEDs..................................................................................................................................................11
Figure 3-4. E1 Power Tree Diagram of AM263x Control Card.................................................................................................. 12
Figure 3-5. Power Sequence Diagram...................................................................................................................................... 13
Figure 3-6. Push Buttons........................................................................................................................................................... 13
Figure 3-7. SW3 Switch Positions............................................................................................................................................. 14
Figure 3-8. JTAG Path Switch Position......................................................................................................................................15
Figure 4-1. AM263x Control Card Block Diagram..................................................................................................................... 16
Figure 4-2. Reset Architecture...................................................................................................................................................18
Figure 4-3. PORz Reset Signal Tree......................................................................................................................................... 18
Figure 4-4. WARMRESETn Reset Signal Tree..........................................................................................................................19
Figure 4-5. Oscillator Clock Tree............................................................................................................................................... 20
Figure 4-6. Crystal Clock Tree...................................................................................................................................................20
Figure 4-7. QSPI Interface.........................................................................................................................................................21
Figure 4-8. Board ID EEPROM..................................................................................................................................................22
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Figure 4-9. RGMII1 Gigabit Ethernet PHY.................................................................................................................................22
Figure 4-10. RGMII1 Gigabit Ethernet PHY Strapping Resistors.............................................................................................. 23
Figure 4-11. ICSSM Overview................................................................................................................................................... 24
Figure 4-12. PRU0 ICSS Gigabit Ethernet PHY Strapping Resistors........................................................................................25
Figure 4-13. PRU1 ICSS Industrial Ethernet PHY Strapping Resistors.................................................................................... 26
Figure 4-14. I2C Instances Tree................................................................................................................................................ 28
Figure 4-15. Industrial Application LED Driver...........................................................................................................................29
Figure 4-16. SPI.........................................................................................................................................................................30
Figure 4-17. UART-USB Bridge for Emulation...........................................................................................................................30
Figure 4-18. UART 1:2 MUX to HSEC.......................................................................................................................................31
Figure 4-19. MCAN Transceiver................................................................................................................................................ 31
Figure 4-20. FSI Header............................................................................................................................................................ 32
Figure 4-21. JTAG......................................................................................................................................................................32
Figure 4-22. JTAG Path Switch..................................................................................................................................................33
Figure 4-23. Test Automation Header........................................................................................................................................34
Figure 4-24. LIN PHY................................................................................................................................................................ 35
Figure 4-25. Micro-SD Connector Interface...............................................................................................................................36
Figure 4-26. ADC HSEC Connections.......................................................................................................................................37
Figure 4-27. ADC Switch Routing..............................................................................................................................................38
Figure A-1. LIN PHY.................................................................................................................................................................. 53
List of Tables
Table 3-1. Current Sourcing Capability and State of USB Type-C Cable.................................................................................. 10
Table 3-2. Power Status LEDs...................................................................................................................................................10
Table 3-3. Control Card Push Buttons....................................................................................................................................... 14
Table 3-4. Supported Boot Modes............................................................................................................................................. 14
Table 3-5. Boot-Mode Selection Table....................................................................................................................................... 15
Table 4-1. GPIO Mapping Table.................................................................................................................................................17
Table 4-2. Clock Source.............................................................................................................................................................20
Table 4-3. EEPROM Mux Table................................................................................................................................................. 22
Table 4-4. RGMII1 Gigabit Ethernet PHY Strapping Resistors..................................................................................................23
Table 4-5. Gigabit Ethernet PHY MDIO/MDC MUX................................................................................................................... 25
Table 4-6. PRU0 ICSS Gigabit Ethernet PHY Strapping Resistors........................................................................................... 26
Table 4-7. PRU1 ICSS Industrial Ethernet PHY Strapping Resistors........................................................................................ 27
Table 4-8. ICSS HSEC MUX......................................................................................................................................................27
Table 4-9. CPSW RGMII1 RJ45 Connector LED indication.......................................................................................................27
Table 4-10. ICSSM PRU0 RJ45 Connector LED indication.......................................................................................................28
Table 4-11. ICSSM PRU1 RJ45 Connector LED indication....................................................................................................... 28
Table 4-12. I2C Addressing....................................................................................................................................................... 29
Table 4-13. UART Mux Select Logic..........................................................................................................................................31
Table 4-14. Test Automation Header GPIO Mapping.................................................................................................................35
Table 4-15. LIN MUX Select Logic.............................................................................................................................................35
Table 4-16. LIN Switch Logic..................................................................................................................................................... 36
Table 4-17. LIN Node Application Switch...................................................................................................................................36
Table 4-18. ADC MUX Select Logic...........................................................................................................................................38
Table 4-19. VREF Switch...........................................................................................................................................................38
Table 4-20. DAC VREF Switch.................................................................................................................................................. 38
Table 4-21. ADC VREF Switch.................................................................................................................................................. 39
Table 4-22. Pinmux Mapping Table............................................................................................................................................40
Table 4-23. E1 HSEC Pinout..................................................................................................................................................... 46
Table 4-24. E2 HSEC Pinout..................................................................................................................................................... 49
Table A-1. I2C2 Signal Routing..................................................................................................................................................53
Table A-2. LIN MUX Selection Table..........................................................................................................................................53
Table A-3. E2 Termination Resistor Location Table................................................................................................................... 54
Table A-4. E2 Buck Converter Table..........................................................................................................................................54
Table A-5. E2 HSEC Connector Mapping..................................................................................................................................54
Table A-6. E1 ADC Channel Signals......................................................................................................................................... 55
Table A-7. E2 ADC Channel Signals......................................................................................................................................... 55
Table A-8. E2 HSEC MUX Table................................................................................................................................................56
Table A-9. E2 ESD Connection Mapping...................................................................................................................................56
Trademarks
Sitara™, Texas Instruments™, E2E™, and Code Composer Studio™ are trademarks of Texas Instruments.
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All trademarks are the property of their respective owners.
1 Preface: Read This First
1.1 Sitara MCU+ Academy
Texas Instruments™ offers the MCU+ Academy as a resource for designing with the MCU+ software and tools
on supported devices. The MCU+ Academy features easy-to-use training modules that range from the basics of
getting started to advanced development topics.
1.2 If You Need Assistance
If you have any feedback or questions, support for the Sitara MCUs and the AM263x Control Card development
kit is provided by the TI Product Information Center (PIC) and the TI E2E™ Forum. Contact information for
the PIC can be found on the TI website. Additional device-specific information can be found in the Reference
Documents.
1.3 Important Usage Notes
Note
The E1 Control Cards have a known issue that will cause JTAG connection issues when using the
on-board XDS110 at speeds higher than 1 MHz. A small number of E1 sample devices have a slower
isolator (U53) installed that is limited to 1 MHz. If you are experiencing JTAG connections issues with
Code Composer Studio™ (CCS) IDE then ensure that the target configuration being used has a JTAG
TCLK Frequency of 1.0 MHz. To check the JTAG TCLK frequency of the target configuration:
1. Open the target configuration or create a new target configuration.
2. Click on the advanced tab to access advanced setup settings.
3. Click on Texas Instruments XDS110 USB Debug Probe_0 connection
4. Change the default setting for The JTAG TCLK Frequency (MHz) from "Fixed default 5.5-MHz
frequency" to "Fixed with user specified value"
5. Change the fixed user specified value from "5.5 MHz" to "1.0 MHz"
6. Click the Save button
7. Click Test Connection and confirm that there are no errors connecting to JTAG
Note
The AM263x Control Card requires a 5 V, 3A power supply in order to function. While a USB type-C
cable is included, A 5 V, 3A power supply is not included in the kit and must be ordered separately
The Belkin USB-C Wall Charger is known to work with the Control Card and supplied type-C cable.
For more information on power requirements refer to Power Requirements. If there is an insufficient
power input then the red LED (LD16) will glow. For more information on power status LEDs refer to
Power Status LEDs.
Note
External Power Supply or Power Accessory Requirements:
• Nominal output voltage: 5-VDC
• Max output current: 3000 mA
• Efficiency Level V
Note
TI recommends using an external power supply or accessory which complies with applicable regional
safety standards such as (by example) UL, CSA, VDE,CCC,PSE, etc.
Note
For a list of design changes for E2 of the AM263x Control Card, refer to E2 Design Changes
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2 Control Card Overview
Figure 2-1. System Architecture
2.1 Kit Contents
The Sitara AM263x Control card development kit contains the following items:
• AM263x Sitara series control card development board
• Type-A to Micro-B USB cable (1 meter length)
• CAT5 Ethernet cable (1 meter length)
• MicroSD Card (16Gbyte capacity)
Note
The maximum length of the IO calbes shall not exceed 3 meters.
Not included:
• HSEC 180-pin Baseboard Docking Station
• Standoffs
• USB Type-C 5-V/3-A AC/DC supply and cable
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2.2 Key Features
The AM263x Control Card has the following features:
• PCB dimensions: 105.76 mm width by 82.81 mm length + 6.17 mm length of HSEC interface
• Powered through 5V, 3A USB type-C input
• Three RJ45 ethernet ports capable of 1 Gb or 100Mb speeds
• On-board XDS110 debug probe
• Three push buttons:
– PORz
– User interrupt
– RESETz
• LEDs for:
– Power status
– User testing
– Ethernet connection
– I2C driven array
• CAN connectivity with on-board CAN transceiver
• Dedicated FSI connector
• TI Test Automation Header
• MMC interface to micro SD card connector
• 180 pin HSEC interface for rapid prototyping
• On-board memory
– 128 MB QSPI Flash
– 1 MB I2C EEPROM
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2.3 Component Identification
Figure 2-2. Component Identification
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2.4 HSEC 180-pin Control Card Docking Station
The TMDSHSECDOCK 180-pin docking station is available for purchase through Texas Instruments. The
docking station is a baseboard that enables rapid prototyping. There is a power switch on the docking station
that determines whether power to the control card will be supplied by the 5V connector or USB connector.
Note
The docking station power switch must to be toggled to the EXT-ON side to meet the power
requirements of the AM263x Control Card.
The AM263x Control Card has a power mux (TPS2121RUXT) that will supply power from the type-C connection
as long as the voltage supplied by the type-C connection is equal to or greater than the voltage supplied by the
HSEC docking station. Therefore, if both a type-C connection is present and the control card is connected to a
powered HSEC docking station, then the power mux will rout the type-C supplied voltage to VMAIN of the control
card. If there is no type-C connection and voltage is being supplied through the HSEC docking station then the
power mux will route that voltage to VMAIN of the control card.
For more information on the docking station, refer to the Informational Guide
2.5 Compliance
RoHS Compliance: All components selected meet RoHS compliance.
Electrostatic Discharge Compliance: Components installed on the product are sensitive to Electrostatic
Discharge (ESD). It is recommended this product be used in an ESD controlled environment. This may include
a temperature and/or humidity controlled environment to limit the buildup of ESD. It is also recommended to use
ESD protection such as wrist straps and ESD mats when interfacing with the product.
Note
The product is used in the basic electromagnetic environment as in laboratory condition and the
applied standard will be as per EN IEC 61326-1:2021
3 Board Setup
3.1 Power Requirements
The AM263x Control Card is powered from a 5 V, 3 A USB type-C input or from a 5 V, 3 A HSEC connection
supplied by the docking station. The following sections describe the power distribution network topology that
supply the AM263x Control Card, supporting components and the reference voltages.
Power supply solutions that are compatible with the AM263x Control Card:
• When using the USB type-C input:
– 5 V, 3 A power adapter with USB-C receptacle
– 5 V, 3 A power adapter with captive USB-C cable
– PC USB type-C port that has Power Delivery classification
• Thunderbolt
• Battery behind USB logo
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Figure 3-1. USB Type-C Power Delivery Classification
• When using the HSEC DC barrel jack power input:
– A power adapter that is at least 15 W
Power supply solutions that are NOT compatible with the AM263x Control Card:
• When using USB type-C input:
– Any USB adapter cables such as:
• Type-A to type-C
• micro-B to type-C
• DC barrel jack to type-C
– 5 V, 1.5 A power adapter with USB-C captive cable or receptacle
– PC USB type-C port not capable of 3 A
3.1.1 Power Input Using USB Type-C Connector
The AM263x Control Card can be powered through a USB type-C connection. The USB Type-C source should
be capable of providing 3A at 5 V and should advertise the current sourcing capability through the CC1 and CC2
signals. On this EVM, the CC1 and CC2 from the USB type-C connector are interfaced to the port controller
IC (TUSB320LAIRWBR). This device uses the CC pins to determine port attach/detach, cable orientation, role
detection, and port control for Type-C current mode. The CC logic detects the Type-C current mode as default,
medium, or high depending on the role detected.
The Port pin is pulled down to ground with a resistor to configure the IC in upward facing port (UFP) mode.
VBUS detection is implemented to determine a successful attach in UFP mode. The OUT1 and OUT2 pins
are connected to a NOR gate. Active low on both the OUT1 and OUT2 pins advertises high current (3A) in
the attached state which enables the load switch (TPS22965DSGT) to provide the VBUS_MAIN supply which
powers other regulators that create the power rails for the device.
In UFP mode, the port controller IC constantly presents pull-down resistors on both CC pins. The port controller
IC also monitors the CC pins for the voltage level corresponding to the Type-C mode current advertisement
by the connected DFP. The port controller IC de-bounces the CC pins and waits for VBUS detection before
successfully attaching. As a UFP, the port controller device detects and communicates the advertised current
level of the DFP to the system through the OUT1 and OUT2 GPIOs.
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The AM263x Control Card's power requirement is 5 V at 3A and if the source is not capable of providing
the required power, the output at the NOR gate becomes low that disables the VBUS_MAIN power switch.
Therefore, if the power requirement is not met, all power supplies except VSYS_TA_3V3 will remain in the off
state. The board gets powered on completely only when the source can provide 5 V at 3A.
Figure 3-2. Type-C CC Configuration
Table 3-1. Current Sourcing Capability and State of USB Type-C Cable
OUT1 OUT2 Advertisement
H H Default current in unattached state
H L Default current in attached state
L H Medium current (1.5A) in attached state
L L High current (3.0A) in attached state
The AM263x Control Card includes a power solution based on discrete regulators for each of the power rails.
During the initial stage of the power supply, 5V supplied by the type-C USB connector is used to generate all of
the necessary voltages required by the Control Card.
Discrete DC-DC buck regulators are used to generate the supplies required for the AM263x system on a chip
(SoC) and other peripherals
One DC-DC buck regulator (TPS54334) is used to generate the 3.3 V supply from the main 5V supply. The
3.3V supply is then used as Vin for two different DC-DC buck regulators: 1.2V supply (TPS62826), and 1.7V
VPP supply (TPS75801). The test automation header's 3.3V supply is generated by one DC-DC buck regulator
(TPS62177) from the main 5V supply.
3.1.2 Power Status LEDs
Multiple power-indication LEDs are provided on-board to indicate to users the output status of major supplies.
The LEDs indicate power across various domains as shown in the table below.
Table 3-2. Power Status LEDs
Name Default Status Operation Function
LD16 OFF SAFETY_ERROR Power error indication for voltage - VUSB_5V0
LD15 ON VSYS_3V3 Power indicator for voltage - VSYS_3V3
LD14 ON VSYS_TA_3V3 Power indicator for voltage -VSYS_TA_3V3
LD1 ON VSYS_1V2 Power indicator for voltage - VSYS_1V2
LD6 OFF XDS110_PROG_STAZ2 LED will glow after XDS configuration
LD7 OFF XDS110_PROG_STAZ1
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Figure 3-3. Power Status LEDs
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3.1.3 Power Tree
Figure 3-4. E1 Power Tree Diagram of AM263x Control Card
A. In E2 of the Control Card, the TPS62826 and TPS54334 are both changed to be TPS62913.
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3.1.4 Power Sequence
Figure 3-5. Power Sequence Diagram
3.2 Push Buttons
The control card supports multiple user push buttons that provide reset inputs and user interrupts to the
processor.
Figure 3-6. Push Buttons
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Table 3-3 lists the push buttons that are placed on the top side of the AM263x control card board.
Table 3-3. Control Card Push Buttons
Push Button Signal Function
SW1 INTn User Interrupt signal
SW2 PORz SoC PORz reset input
SW4 RESETn SoC warm reset input
3.3 Boot Mode Selection
The bootmode for the AM263x is selected by a DIP switch (SW3) or the test automation header. The test
automation header uses an I2C IO expansion buffer to drive the bootmode when PORz is toggled. The
supported boot modes are as shown in Table 3-4.
Table 3-4. Supported Boot Modes
Boot Mode/Peripheral Boot Media/Host Notes
QSPI (4S) - Quad Read Mode QSPI Flash Download and boot SBL from QSPI flash in quad read mode. Attempt
Primary SBL, followed by Secondary SBL if primary loading fails.
UART External Host Download and boot SBL from UART. Device is expected to get SBL
from UART. Device supports the XMODEM protocol for download over
UART.
QSPI (1S) - Single Read Mode QSPI Flash Download and boot SBL from QSPI flash in single read mode. Attempt
Primary SBL,followed by Secondary SBL if primary loading fails.
QSPI (4S) - Quad Read UART
Fallback Mode
QSPI Flash / External Host Download and boot SBL from QSPI flash in quad read mode. Attempt
Primary SBL, followed by Secondary SBL if primary loading fails. If
Secondary SBL also fails then boot from external host via UART
interface.
QSPI (1S) - Single Read UART
Fallback Mode
QSPI Flash / External Host Download and boot SBL from QSPI flash in single read mode. Attempt
Primary SBL, followed by Secondary SBL if primary loading fails. If
Secondary SBL also fails then boot from external host via UART
interface.
DevBoot N/A No SBL. Used for development purposes only.
Figure 3-7. SW3 Switch Positions
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Table 3-5. Boot-Mode Selection Table
Boot Mode
SPI0_D0_pad
(SOP3)
SPI0_CLK_pad
(SOP2) QSPI_D1 (SOP1) QSPI_D0 (SOP0)
QSPI (4S) - Quad Read Mode 0 0 0 0
UART 0 0 0 1
QSPI (1S) - Single Read Mode 0 0 1 0
QSPI (4S) - Quad Read UART Fallback
Mode
0 1 0 0
QSPI (1S) - Single Read UART Fallback
Mode
0 1 0 1
DevBoot 1 0 1 1
Unsupported Boot Mode All other combinations not defined above
3.4 JTAG Path Selection
The AM263x Control Card allows for JTAG connections to the SoC through the on-board XDS110 or an external
emulator via the HSEC docking station. A switch (SW5) is used to drive the select line of a mux (U19) to
determine the JTAG path for the SoC. The following image shows proper switch position for SW5 for the two
JTAG paths.
Figure 3-8. JTAG Path Switch Position
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4 Hardware Description
4.1 Functional Block Diagram
Figure 4-1. AM263x Control Card Block Diagram
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4.2 GPIO Mapping
Table 4-1. GPIO Mapping Table
SI No. GPIO Description GPIO Pin Name Functionality Net Name Active Status
1 Interupt To SoC GPIO21 LIN2_RXD Interrupt SOC_INTn LOW
2 Interupt To DP83826E GPIO66 EPWM12_A Interrupt ICSSM2_PWDN/INTn LOW
3 Interupt To DP83869_01 GPIO67 EPWM11_B Interrupt RGMII1_INT LOW
4 Interupt To DP83869_02 GPIO68 EPWM12_B Interrupt ICSSM1_INT LOW
5 User Defined LED GPIO20 LIN2_TXD GPIO USER_LED0 PREFERABLE
6 User Defined LED GPIO1 QSPI0_CSn1 GPIO USER_LED1 PREFERABLE
IO Expander 01
7 Standby input to CAN tranciever P00 GPIO MCAN1_STB High
8 Enable control to clock buffer P01 Enable CLK_BUF_EN High
9 Select line for ICSSM Mux 1 P02 Mux Selection ICSSM1_MUX_SEL PREFERABLE
10 Select line for ICSSM Mux 2 P03 Mux Selection ICSSM2_MUX_SEL PREFERABLE
11 Reset input to DP83869_01 P04 Reset GPIO_RGMII1_RST LOW
12 Reset input to DP83869_02 P05 Reset GPIO_ICSSM1_RST LOW
13 Reset input to DP83826E P06 Reset GPIO_ICSSM2_RST LOW
14 Enable control to SD load switch P07 Load SW Enable GPIO_uSD_PWR_EN High
15 Select line for RGMII1 MUX P10 Mux Selection RGMII_MUX_SEL PREFERABLE
16 Reset Control to QSPI P11 Reset QSPI0_RESET LOW
17 Select line for I2C0 MUX P12 Mux Selection I2C0_MUX_SEL PREFERABLE
18 GPIO output from TA header to SoC P13 1.2V REG EN TA_GPIO2 PREFERABLE
19 Enable control to 1.7V LDO P14 LDO Enable VPP_LDO_EN High
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4.3 Reset
Figure 4-2 shows the reset architecture of the AM263x Control Card.
Figure 4-2. Reset Architecture
The AM263x SoC has the following resets:
• PORz is the Power-On-Reset for the MAIN Domain.
• WARMRESETn is the Warm Reset to MAIN Domain.
Figure 4-3. PORz Reset Signal Tree
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The PORz signal is driven by a 3-input AND gate that generates a power on reset for the MAIN domain when:
• The under voltage monitor (TPS3711DDCR) has an input voltage, VMAIN, that is below 4.48 V.
• The 1.2-V buck converter (TPS62913RPUR) power good output is driven low by having an output voltage
that is below the power-good threshold.
• The user push button (SW2) is pressed.
• The Test Automation Header outputs a logic LOW signal (TA_PORZn) to a P-Channel MOSFET gate which
causes V_GS of the PMOS to be less than zero and so the PORz signal connects to the PMOS drain which
is tied directly to ground.
The PORz signal is tied to:
• AM263x SoC PORz input
• RGMII1 Ethernet PHY reset
• ICSSM1 Gigabit Ethernet PHY reset
• ICSSM2 Industrial Ethernet PHY reset
• BOOTMODE buffer output enable
Figure 4-4. WARMRESETn Reset Signal Tree
The WARMRESETn signal creates a warm reset to the MAIN domain when:
• The user push button (SW4) is pressed.
• The Test Automation Header outputs a logic LOW signal (TA_RESETz) to a P-Channel MOSFET gate which
causes V_GS of the PMOS to be less than zero and so the RESETz signal connects to the PMOS drain
which is tied directly to ground.
The WARMRESETn signal is tied to:
• AM263x SoC WARMRESETN output
• RESETz signal created from push button + PMOS logic
• IO Expander reset
• Micro SD reset
The AM263x Control Card also has an external interrupt to the SoC, INTn, that occurs when:
• The user push button (SW1) is pressed.
• The Test Automation Header outputs a logic LOW signal (TA_GPIO1) to a P-Channel MOSFET gate which
causes V_GS of the PMOS to be less than zero and so the INTn signal connects to the PMOS drain which is
tied directly to ground.
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4.4 Clock
The AM263x SoC requires a 25-MHz clock input for XTAL_XI. All reference clocks required for the SoC and the
three Ethernet PHY's are generated from a single four output clock buffer (LMK1C1104PWR), which is sourced
from a single 25-MHz LVCMOS Oscillator by default. A clock buffer is used for level translation from 3.3 V to 1.8
V.
The Control Card also requires a 16-MHz clock source for the TM4C129 microcontroller for UART-USB JTAG
support.
Figure 4-5. Oscillator Clock Tree
Alternatively, the SoC clock input can be sourced from a single 25-MHz crystal. To use the crystal there must
be resistors mounted and unmounted. When the Crystal is used as a clock source then the AM263x CLKOUT0
signal is used to source the four output clock buffer for the Ethernet PHY reference clock signals.
Figure 4-6. Crystal Clock Tree
The following table describes the proper resistors to be mounted and DNI'd in order for each clock source
configuration.
Table 4-2. Clock Source
Clock Source Mounted DNI
25-MHz LVCMOS Oscillator (default) R161, R135 R158, R155, R134
25-MHz Crystal R158, R155, R134 R161, R135
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