Texas Instruments BQ25792EVM User manual

User’s Guide
BQ25792EVM, BQ25798EVM and BQ25798BKUPEVM
(BMS034) Evaluation Module
ABSTRACT
This user's guide describes the characteristics, operation, and functionality of the BQ25792 and BQ25798
Evaluation Module (EVM). It will also describe the equipment, test setup, and software required to operate the
EVM. A complete schematic diagram, printed-circuit board (PCB) layouts, and bill of materials (BOM) are also
included in this document.
Throughout this user's guide, the abbreviations and terms EVM, BQ2579XEVM, BMS034, and evaluation
module are synonymous with the BQ25792EVM, BQ25798BKUPEVM, and BQ25798EVM.
p
WARNING
Hot surface! Contact may cause burns. Do not touch!
Some components may reach high temperatures >55°C when the board is powered on. The user must
not touch the board at any point during operation or immediately after operating, as high temperatures
may be present.
Table of Contents
1 Introduction.............................................................................................................................................................................3
1.1 EVM Features.................................................................................................................................................................... 3
1.2 I/O Descriptions..................................................................................................................................................................4
1.3 Recommended Operating Conditions................................................................................................................................ 6
2 Test Setup and Results.......................................................................................................................................................... 6
2.1 Equipment.......................................................................................................................................................................... 6
2.2 Equipment Setup................................................................................................................................................................6
2.3 Software Setup...................................................................................................................................................................7
2.4 Test Procedure................................................................................................................................................................... 9
3 PCB Layout Guidelines........................................................................................................................................................ 14
4 Board Layout, Schematic and Bill of Materials..................................................................................................................15
4.1 BMS034 Board Layout..................................................................................................................................................... 15
4.2 BQ2579XEVM (BMS034) Schematics............................................................................................................................. 19
4.3 Bill of Materials.................................................................................................................................................................22
5 Revision History................................................................................................................................................................... 25
List of Figures
Figure 2-1. Equipment Test Setup for Testing Battery Charging..................................................................................................7
Figure 2-2. Single-Bit Registers Section......................................................................................................................................9
Figure 2-3. Multi-Bit Register Section........................................................................................................................................ 10
Figure 2-4. 16-Bit Register Section............................................................................................................................................10
Figure 2-5. Icon Guide............................................................................................................................................................... 10
Figure 2-6. Chip Configuration...................................................................................................................................................11
Figure 2-7. Charger Configuration............................................................................................................................................. 11
Figure 2-8. Single-Bit Register Section......................................................................................................................................12
Figure 2-9. Multi-Bit Register Section........................................................................................................................................ 13
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Figure 2-10. OTG Configuration Section................................................................................................................................... 13
Figure 2-11. Chip Configuration.................................................................................................................................................13
Figure 4-1. BMS034A/B Top Layer............................................................................................................................................ 15
Figure 4-2. BMS034A/B Signal Layer 1.....................................................................................................................................16
Figure 4-3. BMS034A/B Signal Layer 2.....................................................................................................................................17
Figure 4-4. BMS034A/B Bottom Layer...................................................................................................................................... 18
Figure 4-5. BQ25792EVM (BMS034A/B-001) and BQ25798EVM (BMS034A/B-003) Schematic Page 1................................19
Figure 4-6. BQ25792EVM (BMS034A/B-001), BQ25798BKUPEVM (BMS034A/B-005) and BQ25798EVM (BMS034A/
B-003) Schematic Page 2...................................................................................................................................................... 20
Figure 4-7. BQ25798BKUPEVM (BMS034A/B-002) Schematic Page 1................................................................................... 21
List of Tables
Table 1-1. Device Data Sheet...................................................................................................................................................... 3
Table 1-2. EVM Connections....................................................................................................................................................... 4
Table 1-3. EVM Shunt and Switch Installation............................................................................................................................. 4
Table 1-4. Recommended Operating Conditions.........................................................................................................................6
Table 4-1. BQ2579XEVM Bill of Materials................................................................................................................................. 22
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1 Introduction
The BQ25792 and BQ25798 (BQ25792/8) is an integrated switched-mode buck-boost battery charge
management device in QFN package. It is intended to charge 1- to 4-series cell Li-ion and Li-polymer batteries.
The charger features a narrow VDC architecture (NVDC) which allows the system to be regulated to a minimum
value even if the battery is completely discharged. Additionally, the BQ25792/8 supports input source detection
through D+ and D- which is compatible with USB2.0, USB3.0 power delivery, non-standard adapters, and high
voltage adapters. With dual input source selection, USB OTG support, and an integrated 16-bit multi-channel
analog-to-digital converter (ADC), the BQ25792/8 is a complete charging solution.
1.1 EVM Features
The BQ25792/8EVM is a complete module for evaluating the BQ25792/8 charger IC in the QFN package. Key
features of this EVM include:
• Synchronous Switch Mode Buck-Boost Charger for 1s-4s Battery Configuration for 5-A Charging with 10-mA
Resolution
• Support for 3.6-V to 24-V Wide Range of Input Sources USB Auto-Detect, USB PD and Wireless Input
• Dual Input Source Selector to Drive Bi-Directional Blocking NFETs
• Power up USB Port from Battery (USB OTG) with 2.8-V to 22-V OTG Output Voltage with 10-mV Resolution
• Low Battery Quiescent Current < 1 µA in Shutdown Mode
• BQ25798 has MPPT and backup mode features.
The device data sheet, listed in Table 1-1, provides detailed features and operation.
Table 1-1. Device Data Sheet
Device Data Sheet
BQ25792 SLUSDG1
BQ25798 SLUSDV2
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1.2 I/O Descriptions
Table 1-2 table lists the BQ2579XEVM board connections and ports.
Table 1-2. EVM Connections
Connector, Port Description
J1 VIN1 Positive rail of the priority input adapter or power supply
GND Ground
J2 VIN2 Positive rail of the secondary input adapter or power supply
GND Ground
J3 SYSTEM Positive rail of the charger system output voltage, typically connected to the system load
GND Ground
J4 VPMID Positive rail of the charger output voltage for reverse mode (OTG). This output also shares the rail with
VBUS in forward mode
GND Ground
J5 BATTERY Positive rail of the charger battery input
SNS_BATP Input connected to the positive terminal of the battery for remote battery voltage measurement
GND Ground
J6 USB port USB Micro B port used for input source type detection and handshaking. Connected to either VIN1 or
VIN2
J7 EXTERNAL
THERMISTOR
Input connected to an external battery temperature sensing thermistor
GND Ground
J8 Communication port I2C communication port for use with the EV2300/2400 Interface Board
J9 Communication port I2C communication port for use with the USB2ANY Interface Adapter (for future use)
Table 1-3 lists the shunt installations available on the EVM, and their respective descriptions.
Table 1-3. EVM Shunt and Switch Installation
Shunt Description BQ25792/6/8 Setting
JP1 ACDRV1 pin connection to control ACFET1-RBFET1. Connect this to _acdrv1 net (labeled
VAC1 FET) when utilizing the input protection MOSFETs. Connect this to GND when input
protection MOSFETs are not used or bypassed
ACDRV1 to VAC1 FETs (short
pins 1 to 2)
JP2 ACDRV2 pin connection to control ACFET2-RBFET2. Connect this to _acdrv2 net (labeled
VAC2 FET) when utilizing the input protection MOSFETs. Connect this to GND when input
protection MOSFETs are not used or bypassed
ACDRV2 to VAC2 FETs (short
pins 1 to 2)
JP3 VIN1/VAC1 to VBUS bypass connection. Connect this when the input protection MOSFET
feature is not desired. This connects the input source on VIN1 to VBUS.
Not Installed
JP4 VIN2/VAC2 to VBUS bypass connection. Connect this when the input protection MOSFET
feature is not desired. This connects the input source on VIN2 to VBUS.
Not Installed
JP5 BAT to BATTERY bypass connection. Connect this when the ship and shutdown mode
features are not desired and JP8 pins 1 and 2 are shorted.
Not Installed
JP6 USB Micro B input D– connection to charger D- pin. Connect this when the input source
detection and handshake features are desired.
Installed
JP7 USB port J6 positive rail to charger VBUS selection. Use shunt to select either VIN1/VAC1 or
VIN2/VAC2 as the connection for the USB port.
USB_VIN to VAC1
JP8 SDRV pin connection to control SFET. Short pins 1 to 2 of JP8 and install shunt across JP5
when ship and shutdown mode features are not desired. Short pins 2 to 3 of JP8 and remove
shunt from JP5 when ship and shutdown mode features are desired.
Short pins 2 to 3
JP9 BATP pin connection. BATP is always connected to J5 pin 2 for remote battery sense. If
off-board remote sense is not used, short pin 2 to J5 pin 1 (BATTERY) for the charger constant
voltage sensing to occur at the J5 connector after the Q5 ship mode FET Short pin 2 to pin 3
(BAT pin) for the charger constant voltage sensing to occur on the PCB board close to the IC
before Q5 ship mode FET. Do not leave BATP pin floating.
Short pin 2 to J5 pin 1
(BATTERY)
JP10 Charger D+ and D- pin short connection. Connect this to simulate a DCP type adapter for the
input source detection and handshake feature. Remove in order to use the charger's D+/D-
detection feature.
Installed
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Table 1-3. EVM Shunt and Switch Installation (continued)
Shunt Description BQ25792/6/8 Setting
JP11 USB Micro B input D+ connection to charger D+ pin. Connect this when the input source
detection and handshake features are desired.
Installed
JP12 REGN to TS resistor divider network connection. This must remain connected. Installed
JP13 ILIM_HIZ pin setting for 500 mA. Connect to set the external input current limit setting to
500mA
Not Installed
JP14 ILIM_HIZ pin setting for 1.5 A. Install shunt to set the external input current limit setting to 1.5
A.
Installed
JP15 Thermistor COOL temperature setting. Connect jumper to simulate charger entering TCOOL
(T1-T2) temperature region.
Not Installed
JP16 Thermistor COLD temperature setting. Connect jumper to simulate charger entering TCOLD
(<T1) temperature region.
Not Installed
JP17 CE pin connection to ground to enable charging. When removed, CE pin will pull up to disable
charge
Installed
JP18 Thermistor NORMAL temperature setting. Connect jumper to simulate charger entering
TNORMAL (T2-T3) temperature region. Keep connected when testing other thermistor
temperature settings (JP17 - TCOOL, JP18 - TCOLD, JP21 - TWARM, JP22 - THOT).
Remove this jumper whenever using an externally connected thermistor.
Installed
JP19 Thermistor WARM temperature setting. Connect jumper to simulate charger entering TWARM
(T3-T5) temperature region.
Not Installed
JP20 Thermistor HOT temperature setting. Connect jumper to simulate charger entering THOT
(>T5) temperature region.
Not Installed
JP21 ILIM_HIZ pin setting for HIZ mode. Connect to enter the charger high impedance (HIZ) mode
to disable the converter
Not Installed
JP22 PROG pin setting for 1S, 1.5 MHz. Connect to configure charger default setting to 1S charge
regulation voltage, 2 A charging current, and 1.5 MHz switching frequency
Not Installed
JP23 PROG pin setting for 1S, 750 kHz. Connect to configure charger default setting to 1S charge
regulation voltage, 2 A charging current, and 750 kHz switching frequency
Not Installed
JP24 PROG pin setting for 2S, 1.5 MHz. Connect to configure charger default setting to 2S charge
regulation voltage, 2 A charging current, and 1.5 MHz switching frequency
Installed
JP25 PROG pin setting for 2S, 750 kHz. Connect to configure charger default setting to 2S charge
regulation voltage, 2 A charging current, and 750 kHz switching frequency
Not Installed
JP26 PROG pin setting for 3S, 1.5 MHz. Connect to configure charger default setting to 3S charge
regulation voltage, 1 A charging current, and 1.5 MHz switching frequency
Not Installed
JP27 PROG pin setting for 3S, 750 kHz. Connect to configure charger default setting to 3S charge
regulation voltage, 1 A charging current, and 750 kHz switching frequency
Not Installed
JP28 PROG pin setting for 4S, 1.5 MHz. Connect to configure charger default setting to 4S charge
regulation voltage, 1 A charging current, and 1.5 MHz switching frequency
Not Installed
JP29 PROG pin setting for 4S, 750 kHz. Connect to configure charger default setting to 4S charge
regulation voltage, 1 A charging current, and 750 kHz switching frequency
Not Installed
JP30 Input connection for onboard PULLUP rail LDO. Connect to power onboard 3.3V pullup rail.
LDO input will be connected via diode-OR between VBUS and BAT
Installed
JP31 EV2400 internal pullup to PULLUP connection. Connect to use EV2400 internal 3.3 V pullup to
drive the EVM PULLUP rail.
Not Installed
JP32 STAT pin LED indicator connection. This indicates the current charger Status Installed
JP33 USB2ANY internal pullup to PULLUP connection. Connect to use the USB2ANY internal 3.3 V
pullup to drive the EVM PULLUP rail
Not Installed
S1 QON control switch. Press to either exit Ship Mode or reset the System Power Default Off
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1.3 Recommended Operating Conditions
Table 1-4. Recommended Operating Conditions
Description Min Typ Max Unit
V(VINx) at J1 or J2 Power supply voltage to the external blocking FETs
which allow power to VBUS pin 3.6 24 V
I(INx) into J1 or J2 Power supply current, which can be limited by charger's
input current limit feature (IINDPM) 0.01 3.3 A
V(BATTERY) voltage at J5 Battery voltage supported for precharge 2.2 3.8(1S), 7.6(2S),
11.4(3S), 15.2V(4S) 18.8 V
I(BATTERY) out of/into J5 Battery charge current 0.01 2 (1S, 2S), 1(3S, 4S) 5 A
V(SYS) at J3 System voltage regulation range 3.2 19 V
I(SYS) out of J3 System load current 0 5 A
Note
If hotplugging adaptors with voltage greater than 15 volts, it is reccomended to install RSNUB1,
CSNUB1, RSNUB2, and CSBUB2 as listed on the schematic.
Note
If hotplugging 4S batteries and a shipFET is installed, it is reccomended to install component CSNUB3
as listed on the schematic
Note
If hotplugging 4S batteries and a shipFET is not installed, it is reccomended to install component
DVTS as listed on the schematic.
2 Test Setup and Results
2.1 Equipment
This section includes a list of supplies required to perform tests on the BQ25790EVM.
1. Power Supplies for VBUS pin: Power Supply #1 (PS1): A power supply capable of supplying up to 24 V at
3 A is required.
2. Battery Simulator for BAT pin: Load #1 (4-Quadrant Supply): A "Kepco" Load, BOP, 20-5M, DC 0 to ±20 V,
0 to ±6 A (or higher) or a Keithley 2450 3-A sourcemeter. When using both, a 1000-µF or higher, low ESR,
25-V rated or higher connected at the EVM battery and ground terminals is recommended.
Alternative Option: A 0–20 V/0–5 A, > 60-W DC electronic load set in a constant voltage loading mode in
parallel with a second power supply can be used. The second power supply is set to a voltage slightly below
the electronic load's constant voltage setting. When enabled, the charger's charge current then replaces the
current provided the second power supply.
3. System load simulator for SYS pin:Load #2 ( Electronic load set to constant resistance or Resistive Load):
10 Ω, 5 W (or higher).
4. Meters: (6x) "Fluke 75" multimeters, (equivalent or better).
Alternative Option: (4x) equivalent voltage meters and (2x) equivalent current meters. The current meters
must be capable of measuring at least 5 A. If used in series between the PS#1, Load#1 or Load#2, the
meters should be set for manual not auto ranging. Current meters add significant series resistance which
affects charger performance.
5. Computer: A computer with at least one USB port and a USB cable. A valid internet connection is required
when using the GUI Composer application.
6. PC Communication Interface:EV2300/2400 USB-Based PC Interface Board (when using Battery
Management Studio) or USB2ANY Interface Adapter (when using the GUI Composer application).
2.2 Equipment Setup
Use the following list to set up the EVM testing equipment. Refer to Figure 2-1 for the test setup connections to
the EVM:
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1. Review the EVM connections in Table 1-2.
2. Set PS#1 for 5.0-V, 3-A current limit and then turn off the supply. Connect PS#1 to J1 (VIN1 and PGND).
3. Connect a voltage meter across TP23 (VBUS) and TP44 (PGND) to measure the input voltage as seen from
the VBUS pins of the charger.
4. Connect a voltage meter across TP1 and TP2 (I_VAC1_SENSE) to measure the input current into the VBUS
pins through the VIN1 path. Alternatively, you may connect a current meter between PS1 and J1.
5. Set Load #1 to constant voltage mode, capable of sinking (for example, compliance) at least 3 A, and output
to 5.0 V, and then disable load. Connect Load #1 to J5 (BATTERY and PGND).
6. Connect a voltage meter across TP29 (BAT) and TP46 (PGND) to measure the battery voltage as seen from
the BAT pins of the charger.
7. Connect a voltage meter across TP19 and TP20 (I_BAT_SENSE) to measure the battery charge current out
of and discharge current into BAT pins. Alternatively, you may connect a current meter between Load #1 and
J5.
8. Connect a voltage meter across TP28 (SYS) and TP45 (PGND) to measure the system voltage as seen
from the SYS pins of the charger.
9. Install shunts as shown in Table 1-3.
Power Supply #1
Load #1:
Battery
Simulator
VVV
+
VVV
EV2300/2400
USB
VVV
+
VV
4-pin Connector
VPMID VVBUS
VSYS
VBAT
VVV
IVAC1
±
+
±
±
+
±
VVV
Optional Load #2:
eLoad or
resistor
USB2ANY
USB
OR
10-pin
Connector
IBAT
Figure 2-1. Equipment Test Setup for Testing Battery Charging
2.3 Software Setup
The charger is controlled by a state machine that uses I2C registers and the state machine makes decisions
based off of the I2C registers. Software only helps with reading and writing to those registers.
2.3.1 BQSTUDIO using EV2400
Download the latest version of BQSTUDIOTEST. Double click the Battery Management Studio installation file
and follow the installation steps. The software supports Microsoft® Windows® XP, 7, and 10 operating systems.
Launch BQSTUDIO and select Charger. If the EVM configuration file for BQSTUDIO does not appear in the
Charger, close BQSTUDIO and either download the .BQZ file from the EVM product folder at www.ti.com or
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request the file via e2e.ti.com. The file must be saved into C:\XXX\BatteryManagementStudio\config, where XXX
is the directory you selected to install BQSTUDIO.
2.3.2 TI Charger GUI for USB2ANY
Navigate to the TI-CHARGER-GUI tool folder. Once at the tool page click on the "Evaluate in the cloud" button.
The browser will automatically be redirected to the TI Charger GUI landing page. From the landing page locate
the device desired for evaluation and click "Select Device." Note that the EVM must be powered and the
USB2ANY must be connected to both the EVM and the PC for a connection to be established. Also, update the
USB2ANY to the latest verision with the USB2ANY Explorer Software.
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2.4 Test Procedure
2.4.1 Initial Settings
Use the following steps to enable the EVM test setup.
1. Make sure Section 2.2 steps have been followed.
2. Remove the shunt on JP17 to disable charge.
3. Make sure the PROG pin jumpers, JP22-JP29, are set to the desired frequency and cell count.
4. Make sure the TS Jumpers are installed to the correct posistions if a thermistor is being simulated.
5. If using BQStudio, launch the BQSTUDIO software and select Charger then BQ25792EVM, if not already
done.
6. If using TI Charger GUI, go to the TI Charger GUI website and select the charger from the list.
7. Turn on PS1 and Load #1:
•Measure ➡ VSYS-PGND (TP26 and TP48) = 8.55 V ±0.2 V
8. Verify PG LED (D13) is on.
Note
If the PG LED is not lit, confirm a valid PS1 is connected and the correct shunt configuration was
placed.
Note
If the device is not communicating and does not ACK, verify that Section 2.2 and the steps in
this section have been followed. Verify the voltage across TP42 (PULLUP) and TP49 (AGND) is
approximately 3.3 V.
2.4.2 Communication Verification
If using Battery Management Studio, use the following steps for communications verification:
1. In Battery Management Studio, select "READ REGISTER" at the top of the page. "Device ACK OK" should
appear at the top of the page.
2. Select Field View in the top right of the screen. Note there are two tabs, one for 8-bit registers and one
for 16-bit registers. In the 8-bit tab, there are sections for chip, charger and OTG single-bit and multi-bit
registers. In the 16-bit tab are the charger and OTG multi-bit registers for setting voltages and currents. In
addition, the ADC registers are on the 16-bit tab.
3. Prepare the charge mode charger register settings in the following way if not already set there by default:
• On the 8-bit Registers tab in the Chip Config Single-bit Registers section
– Change Watchdog Timer to disabled
– Check the "ShipFET Present?" check box
Figure 2-2. Single-Bit Registers Section
• On the 8-bit Registers tab in the Charger Multi-bit Registers section
– Set the Precharge current to 240 mA
– Set ABS VINDPM to 4000 mV
– Set VSYSMIN to 7000 mV
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Figure 2-3. Multi-Bit Register Section
• On the 16-bit Registers tab in the Charger Multi-bit Registers section
– Set the Charge Voltage charging regulation limit to 8400 mV
– Set the Charge Current to 500 mA.
– Set the input current regulation limit (IINDPM) to 3000 mA.
Figure 2-4. 16-Bit Register Section
If using TI Charger GUI, follow these steps.
1. In the TI Charger GUI homepage, select the charger you are using. You should see at the bottom-left,
Hardware Connected. Here is a brief description of what the icons on the left side panel mean:
Figure 2-5. Icon Guide
Note
If the EVM is powered but not communicating (for example, does not ACK), try updating the
USB2ANY firmware to the latest version using the software at . The software tells you to press the
reset button, on the opposite side of the USB connector to the LED, using a paper clip or narrow
pin.
2. Go to the Chip Configuration and set the Watchdog Timer to disabled and check the "ShipFET present?"
box.
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Figure 2-6. Chip Configuration
3. Go to the Charger Configuration and set
• VSYSMIN to 7 V
• Charge Voltage to 8.4 V
• Charge Current to 0.5 A
• Precharge current to 0.24 A
• IINDPM to 3 A
• ABS VINDPM to 0.4 V
Figure 2-7. Charger Configuration
2.4.3 Charge Mode Verification
Use the following steps for charge mode verification, including pre-charge, CC and CV phases for boost
operation:
1. PS1 and Load #1 should be on from Section 2.4.1. In the EVM GUI, it is generally recommended to
read REG22-REG27 (or READ ALL REGISTERS) one time in order to show all the interrupts (from status
changes, automated routine completion, faults) that occurred since the last read. Reading those registers a
second clears the interrupts. After reading the registers,
•Verify ➡ REG1B reports all Normal, meaning no DPM loops active and no WD timer fault (bits 7-4),
VAC1 Present (bit2), VBUS Present (bit 0) and Power Good (bit 3)
2. Reinstall the shunt on jumper J17 to enable charge
•Verify ➡ STAT LED (D13) is lit
3. Take measurements as follows, noting that you may have to adjust the output of the load to accommodate
for voltage drop across the leads from the load to the EVM:
•Measure ➡ VVBUS-PGND (TP23 and TP44) = 5.0 V ±0.2 V
•Measure ➡ VBAT-PGND (TP29 and TP46) = 5.0 V ±0.2 V
•Measure ➡ IBAT_SENSE (voltage across 0.01 ohm resistor between TP19 and TP20) = 240 mA ±60 mA
•Click READ ALL REGISTERS and Verify ➡ REG1Cb[7:5] reports pre charge
4. Increase Load #1 regulation voltage to 8.0 V and take measurements as follows, noting that you may have
to adjust the output of the load to accommodate for voltage drop across the leads from the load to the EVM:
•Measure ➡ VVBUS-PGND (TP23 and TP44) = 5.0 V ±0.2 V
•Measure ➡ VBAT-PGND (TP29 and TP46) = 8.0 V ±0.1 V
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•Measure ➡ IBAT_SENSE (voltage across 0.01-Ω resistor between TP19 and TP20) = 500 mA ±50 mA
•Measure ➡ IVAC1_SENSE (voltage across 0.01-Ω resistor between TP1 and TP2) = 900 mA ±60 mA
•Click READ ALL REGISTERS and Verify ➡ REG1Cb[7:5] reports fast charge
5. Increase Load #1 regulation voltage to 8.4 V and take measurements as follows:
•Measure ➡ VBAT-PGND (TP29 and TP46) = 8.4 V ±0.04 V
•Measure ➡ IBAT_SENSE (voltage across 0.01-Ω resistor between TP19 and TP20) = 0 mA ±10 mA
•Click READ ALL REGISTERS and Verify ➡ REG1Cb[7:5] reports termination
6. Helpful hints when changing voltages and register settings from those above during charge mode:
• If increasing charge current or adding a load at SYS J3 terminal, you will likely need to disable the
EN_ILIM bit using 8-bit register tab/Charger Single-bit Registers/REG14b[1] and increase the IINDPM
register setting in 16-bit register tab/Charger Multi-bit Registers/REG06b[8:0].
• If increasing the input voltage above 8 V for the charger to enter buck mode, you will need to increase the
VAC_OVP from 7 V default using 8-bit register tab/Charger Multi-bit Registers/REG10b[5:4].
• The battery configuration is set at startup using the PROG pin (Jumpers JP24 to JP31). The battery
configuration can also be changed using 16-bit register tab/Charger Multi-bit Registers/REG0Ab[7:6].
Note that the SYSMIN and charge current charge with cell configuration.
• The status, fault and interrupt bits report are helpful debug tools.
2.4.4 OTG Mode Verification
Use the following steps for OTG mode verification for boost operation:
1. Power up then turn off Load#2 output. Set to CR = 12 V/0.5 A = 24 Ω. Disconnect PS1 from J1 and attach
Load#2 to J1 (VIN1 and GND).
2. Increase Load #1 regulation voltage to 8.0 V and take measurements as follows:
•Measure ➡ VBAT-PGND (TP27 and TP46) = 8.0 V ±0.1 V
3. For BQStudio, prepare the OTG mode charger register settings in the following way:
• On the 8-bit Registers tab in the Chip Config Single-bit Registers section:
– Check the EN OTG Mode box
– Check the EN ACDRV1 box
• On the 8-bit Registers tab in the OTG Multi-bit Registers section:
– Set IOTG 1000 mA to change the OTG current limit.
Figure 2-8. Single-Bit Register Section
• On the 16-bit Registers tab in the OTG Multi-bit Registers section:
– Set the OTG mode regulation voltage to 12000 mV
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Figure 2-9. Multi-Bit Register Section
For GUI composer, go to OTG Configuration Section and change the following registers:
• OTG Reg Voltage to 12 V
• IOTG Limit to 1 A.
Figure 2-10. OTG Configuration Section
Next go to the Chip configuration and check the EN OTG Mode box and EN ACDRV1 box.
Figure 2-11. Chip Configuration
4. Take measurements as follows:
•Measure ➡ VVBUS-PGND (TP21 and TP45) = 12.0 V ±0.2 V
•Measure ➡ VAC1-PGND (TP22 and TP45) = 12.0 V ±0.2 V
•Click READ ALL REGISTERS
–Verify ➡ REG1Bb[6] reports VINDPM or OTG
–Verify ➡ REG1Cb[4:1] reports VBUS Status as Normal OTG
5. Turn on Load#2 output set to CR of 24 Ω.
6. Take measurements as follows:
•Measure ➡ VAC1-PGND (TP22 and TP45) = 12.0 V ±0.2 V
•Measure ➡ IAC1-SENSE (TP1 and TP2) = 500 mA ±0.10 A
7. Lower the Load#2 CR to 10 Ω.
8. Take measurements as follows to confirm OTG current function:
•Measure ➡ VAC1-PGND (TP22 and TP45) < 12.0 V ±0.2 V
•Measure ➡ IAC1-SENSE (TP1 and TP2) = 1000 mA ±0.10 A
•Click READ ALL REGISTERS and Verify ➡ REG1Bb[7] reports IINDPM
9. Hints for further OTG testing:
• Enabling OTG mode is a two-step process, first enable OTG and then turn on the appropriate AC drive
FETs.
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3 PCB Layout Guidelines
Careful placement of components is critical in order for the charger to meet specifications. The items below are
listed in order of placement priority.
1. Place high frequency decoupling capacitors for PMID and SYS (C3 and C18 on the EVM) as close possible
to their respective pins and ground pin on the same layer as the charger IC (in other words, no vias) in order
to have the smallest current loop.
2. Place bulk capacitors for PMID and SYS as close possible to their respective pins and the charger's ground
pin on the same layer as the charger IC on the same layer as the charger IC (in other words, no vias).
3. Place the REGN capacitor (C35) to ground and BTST capacitors (C6 and C8) to SW as close as possible to
their respective pins only using vias for 1 side of each component if necessary.
4. Place high frequency decoupling capacitors for VBUS and BAT pins as close as possible to their respective
pins. Use at least 2 vias per capacitor terminal if required.
5. Place bulk capacitors for VBUS and BAT pins as close as possible to their respective pins. Use at least 2
vias per capacitor terminal if required.
6. Place the inductor close to SW1 and SW2 pins. It is acceptable to use multiple vias to make these
connections as the vias are only adding small amounts of inductance and resistance to an inductor.
7. While this EVM has analog ground (AGND) and power ground (PGND) planes that connect close to the
charge GND pin, two grounds not required. Resistors and capacitors used for setting sensitive nodes (for
example, ILIM, TS) can use one common ground plane but with their ground terminals connected away from
high current ground return paths containing switching noise.
Note that this EVM has test points and jumpers requiring traces out to the PCB edges. Routing these traces
required some PCB layout compromises for less critical components than those listed in the first six items above.
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4 Board Layout, Schematic and Bill of Materials
4.1 BMS034 Board Layout
Figure 4-1 through Figure 4-4 show the board layout for the BQ2579XEVMs.
Figure 4-1. BMS034A/B Top Layer
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Figure 4-2. BMS034A/B Signal Layer 1
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Figure 4-3. BMS034A/B Signal Layer 2
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Figure 4-4. BMS034A/B Bottom Layer
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4.2 BQ2579XEVM (BMS034) Schematics
Figure 4-5, Figure 4-6, and Figure 4-7 illustrate the schematics for the BQ2579XEVM.
Figure 4-5. BQ25792EVM (BMS034A/B-001) and BQ25798EVM (BMS034A/B-003) Schematic Page 1
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PULLUP
SCL
SDA
4
1
2
3
J8
AGND
10.0
R37
SCL
SDA
AGND
PULLUP
10.0
R43
EV2400
PULLUP
USB2ANY
PULLUP
REGN
ILIM_HIZ
AGND
1
2
JP21
100k
R23
1
2
JP13
1
2
JP14
1.5A500mA
IINDPM IINDPM
ENABLE
HIZ
S1
/QON
AGND
1
2
JP17
CHARGE
ENABLE
/CE
AGND
EXT_TS
AGND
EXTERNAL
THERMISTOR
GND
D11 D12
0.1uF
C43
0.1uF
C44
10.0
R35
PGNDPGND
PULLUP
CONNECT
PULLUP
VBUS BAT
1 2
JP30
30.1k
R24
5
NORMAL
.23k
R18
TS
WARM
1
2
JP19
TS
COOL
1
2
JP15
TS
HOT
1
2
JP20
TS
TS
COLD
1
2
JP16
10
TS
.0k
R25
1
2
JP18
4.87k
R26
7.68k
R19
REGN
1
2
JP12
AGND
0
R22 EXT_TS
8.20k
R30
1
2
JP25
1
2
JP24
1
2
JP23
1
2
JP22
1S 1S 2S 2S
1.5MHz 1.5MHz750kHz 750kHz
2A ICHG 2A ICHG 2A ICHG 2A ICHG
10.5k
R31
27.0k
R34
1
2
JP29
1
2
JP28
1
2
JP27
1
2
JP26
3S 3S 4S 4S
1.5MHz 1.5MHz 750kHz750kHz
1A ICHG 1A ICHG 1A ICHG 1A ICHG
AGND
1
2
JP31
1
2
JP33
Green
1
2
D13
1
2
JP32
STAT LED
CONNECT
STAT
10.0k
R39
10.0k
R40
10.0k
R41
/INTSDASCL
10.0k
R42
/CE
2.21k
R38
PROG
PULLUP PULLUP VBUS
BAT
PULLUP
VBUS
BAT
PULLUP
/INT
SDA
SCL
/CE
STAT
/QON
PROG
TS
REGN
ILIM_HIZ
REGN
SCL
SDA
PROG
ILIM_HIZ
/INT
/CE
STAT
/QON
TS
1
2
J7
1 2
3 4
5 6
7 8
9 10
J9
IN
2OUT 1
GND 3
TLV76033DBZR
U2
0
R36
255k
R20
127k
R21
3.00k
R27
4.70k
R28
6.04k
R29
13.7k
R32
17.4k
R33
Figure 4-6. BQ25792EVM (BMS034A/B-001), BQ25798BKUPEVM (BMS034A/B-005) and BQ25798EVM (BMS034A/B-003) Schematic Page 2
Board Layout, Schematic and Bill of Materials www.ti.com
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