Texas Instruments Dual-Slot ATCA AdvancedMC TPS2358 User manual

1 Introduction
2 Description
2.1 Module Overview
User's GuideSLUU328 – August 2008
TPS2358 Dual-Slot ATCA™ AdvancedMC™ Controller
Evaluation Module
The Dual-Slot AdvancedMC™ Controller Evaluation Module (EVM) is a PCB platform for users to learnabout the features and operation of the TPS2358 integrated circuit from Texas Instruments (TI). TheTPS2358 Dual-Slot ATCA™ AdvancedMC™ Controller manages two 12-V and two 3.3-V power rails, andfeatures inrush and fault current limiting, FET OR’ing, input UVLO protection and logic-level enable inputs.Current control on the 12-V rails has a high degree of programmability, including independent current limitand fast trip thresholds. Overcurrent fault timing is managed with user-programmable shut-down delays,and each of the four power channels has dedicated fault and power good reporting outputs. In addition,current sense and pass and block FET’s for the 3.3-V channels are fully integrated into the device.
Power management applications based on the TPS2358 are easily configured to meet the requirementsfor 12-V and 3.3-V control of Advanced Mezzanine Card (AdvancedMC™) modules. Each deviceincorporated onto a Carrier Card provides full control for two AdvancedMC™ slots according to therequirements of the Advanced Telecommunications Computing Architecture (ATCA™) specification,PICMG 3.0. In addition, the input supply FET OR’ing control for the 12-V rails facilitates efficient redundantsupply implementations in Micro Telecommunications Computing Architecture (MicroTCA™) systems.
The TPS2358EVM is a single-board evaluation platform consisting of two main sections. When orientedwith the board nomenclature and switch labels in a normal, upright reading position towards the user, thetop portion contains the TPS2358 device and typically required components. The bottom section containsmore ancillary circuitry intended to facilitate exercising the device through various application scenarios.Power connectors are organized with inputs along the left edge of the board, outputs along the right.
The main (upper) section of the board is comprised of the four power channels, including the featureddevice, support passives, input and output banana jacks, control FET’s (for 12-V rails), and power planes.The board contains various capacitors for simulation of input bulk capacitance as may be present ondriven AdvancedMC™ modules; alternatively, the user’s test loads can be connected at the output bananajacks. Various timing capacitor options, for each power rail, are available and user-selectable via DIPswitch S7. Numerous jumpers are provided throughout the circuit for maximum configuration flexibility.Test points are available for voltage and waveform monitoring.
The bottom section contains two expansion port connectors and the status LED’s. Slide switches foractuation of the chip enable inputs are organized in a row along the bottom edge of the PCB.
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2.2 Typical Applications
2.3 Features
Description www.ti.com
The TPS2358EVM was designed with independent input and output banana jacks for up to two each 12-Vinput and 3.3-V input power supplies, and up to two each 12-V and 3.3-V output power rails. This providesthe greatest flexibility for configuring the EVM for either ATCA™ or MicroTCA™ applications.
By connecting the two 12-V inputs and two 3.3-V inputs together, the TPS2358EVM can manage theapplication of a single 12-V supply and single 3.3-V supply to two AdvancedMC-like loads. Thisconfiguration allows users to learn about the device operation in non-redundant applications. Driving thesupply inputs independently while ganging together the common potential output nodes demonstratesoperation in redundant systems, albeit through a common controller IC. In either case, switch-selectabletiming capacitors complete device configuration for the target application.
As supplied from the factory, the EVM comes with current limits programmed for the requirements ofManagement Power and Payload Power control for AdvancedMC™ modules. However, limit thresholds onthe 12-V channels are programmable by the user; instructions for modifying current limits are includedbelow. This flexibility with the TPS2358 enables use in other, proprietary systems requiring 12-V and 3.3-Vsupply control.
Lastly, the EVM features two expansion ports and related jumpers needed to parallel multiple devicestogether to create a true redundant system. Additional EVM modules for this purpose can be ordereddirectly from the TI website at http://www.productfolderURL , or contact your local TI representative.
The TPS2358EVM includes the following features:•One TPS2358 Dual-Slot ATCA™ AdvancedMC™ Controller•Programming and sense resistors (12-V)•Low R
DS
(ON) pass and block FET’s (12-V)•Input and output power jacks for external supply and optional load connection•Up to 880 µF (4 ×220 µF) jumpered load capacitors (each channel) for simulated Payload Poweroutput bulk capacitance•150 µF jumpered load capacitor for each Management Power channel•Multiple, switch-selectable fault timer settings, each channel•Slide switch actuation of enable inputs•Expansion port headers
The use of these features is described in greater detail later in this document.
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3 Electrical Specifications
3.1 Absolute Maximum Ratings
3.2 Recommended Operating Conditions
www.ti.com Electrical Specifications
The absolute maximum ratings for the TPS2358EVM are given below in Table 1 .
Table 1. Absolute Maximum Ratings
(1) (2)
PARAMETER RATING
Input voltage range, +12-V supply –0.3 V to 13.8 VInput voltage range, +3.3-V supply –0.3 V to 4 VApplied voltage, pins of J21, J22 EN12x, ORENx –0.3 V to (V
IN
(12VINx) + 0.5 V)Applied voltage, pins of J21, J22 SUMx, EN3x –0.3 V to (V
IN
(3V3INx) + 0.5 V)Output current, 12-V outputs TBDOutput current, 3.3-V outputs Internally limited by deviceOutput current, SUMx -5 mAStorage temperature range –55 °C to 150 °C
(1)
All voltages are with respect to the EVM GND node.(2)
Currents are positive into and negative out of the specified terminal.
The recommended operating conditions for the TPS2358EVM are given in Table 2 .
Table 2. Recommended Operating Conditions, TPS2358EVM
(1) (2)
PARAMETER MIN TYP MAX UNITS
Input supply voltage, +12-V 8.8 12 13.2 VInput supply voltage, +12-V (for specified V
OUT
) 11.3 12 13.2 VInput supply voltage, +3.3-V 2.85 3.3 3.5 VInput supply voltage, +3.3-V (for specified V
OUT
) 3.235 3.3 3.465 VLoad current, Payload Power Out (either channel) –7.4 ALoad current, Mgmt Power Out (either channel) –165 mA
(1)
All voltages are with respect to the EVM GND node.(2)
Currents are positive into and negative out of the specified terminal.
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3.3 Electrical Characteristics
Electrical Specifications www.ti.com
The electrical characteristics of the TPS2358EVM are as listed in Table 3 .
Table 3. Electrical Characteristics, TPS2358EVM
(1)
PARAMETER CONDITIONS MIN TYP MAX UNITS
UNLESS OTHERWISE NOTED: V
IN
(12VINx) and V
IN
(3V3INx) per Table 2 under (for specified V
OUT
). T
A
= 25 °CEN12x = HI, ORENx = HI,Output Voltage, Payload Power Out (either channel) 10.8 13.2 VI
LPWR
< I
LPWR_MAX
3.46Output Voltage, Mgmt Power Out (either channel) EN3x = HI, I
LMP
< I
LMP_MAX
3.135 V5Current limit threshold, Payload Power (either channel) 7.4 8.36 9.1 ACurrent limit threshold, Mgmt Power (either channel) 170 195 225 mAFast trip threshold, Payload Power (either channel) 24.5 AFast trip threshold, Mgmt Power (either channel) 400 mAOutput capacitance, Payload Power (C
L_PWR
) (each
All 4 load caps connected 704 880 1056 µFchannel)
Output capacitance, Mgmt Power (C
L_MP
) (each channel) Load cap connected 120 150 180 µFV
IN
= 12V–13.2V,Output ramp time, Payload Power V
O
= 0V to 98% ×V
IN
, 1.31 2.01 mSR
LOAD
= 1K, C
LOAD
= C
L_PWR
V
IN
= 3.3V–3.465V,Output ramp time, Mgmt Power V
O
= 0 V to 98% V
IN
, 2.57 3.74 mSR
LOAD
= 270, C
LOAD
= CL_MP
(1)
All voltages are with respect to the EVM GND node.
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4 Schematic Diagram
1
+
+
1
+
1
+
+ ++
+ +
+ ++
www.ti.com Schematic Diagram
The schematic diagram for the TPS2358EVM is shown in Figure 1 and Figure 2 .
Figure 1. TPS2358 Evaluation Module Schematic Diagram, Sheet 1
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1 1 1 1 1 1
1
1
1
Schematic Diagram www.ti.com
Figure 2. TPS2358 Evaluation Module Schematic Diagram, Sheet 2
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5 Test Set-Up
5.1 Equipment Requirements
TP3
TP1
TP2
TP7
TP9
TP8
TP11
TP12
TP10
TPS2358EVM-001
Dual-Slot ATCATM
AdvancedMC
TM Controller
12VIN1
GND
3V3IN1
3V3IN2
GND
12VIN2
12-V POWER
SUPPLY
+-
3.3-V POWER
SUPPLY
+-
OSCILLOSCOPE
CH 1
CH 2
CH 3
CH 4
VOLTS COM
DMM
VOLTS COM
DMM
VOLTS COM
DMM
TP30TP31TP32TP33
www.ti.com Test Set-Up
The following test and interface equipment (not supplied) is required to verify EVM module operation, andbegin using the EVM.•Power supply, 3.3 VDC, 500 mA minimum•Power supply, 15 VDC, 10 A minimum•Digital multimeters
•Oscilloscope, 4 channel, with current probe
Connect the TPS2358EVM and test equipment as shown in Figure 3 for functional check-out of the boardand a good starting point for user evaluation of device operation. Screen print labeling on the boardemploys a naming convention in keeping with the nomenclature of the target ATCA™ and MicroTCA™applications. Input 3.3-V supplies are connected to the 3V3INx jacks, and 12-V supplies are connected tothe 12VINx jacks. A cross-reference of power rail labeling to standards naming is shown in Table 4 .
Table 4. TPS2358EVM Output Net and Jack Naming
REF.DES. CONNECTOR LABEL DESCRIPTION
J8 SLOT A MP AdvancedMC™ Slot A Management PowerJ7 SLOT A PWR AdvancedMC™ Slot A Payload PowerJ9 GND Common load return node for Slot AJ11 SLOT B MP AdvancedMC™ Slot B Management PowerJ10 SLOT B PWR AdvancedMC™ Slot B Payload PowerJ12 GND Common load return node for Slot B
(1) The 3V3INx jacks can be jumpered together with a short test lead at the board, fed from a single lead fromthe power supply.(2) Run separate leads from the GND jacks back to a common return point made near the power supply outputterminals.
Figure 3. TPS2358EVM Set-up — Non-Redundant System Connection
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6 Test Procedure
6.1 Jumper Installation
Test Procedure www.ti.com
The following procedure can be used to verify functional operation of the EVM assembly upon receipt.
The TPS2358EVM makes use of various jumpers for quick change of functional configurations. Verify themodule was supplied with shunt jumpers installed across the headers listed in Table 5 . For 3-poinheaders, note the pin pairs to be connected.. Reconfigure jumper connections if necessary.
Table 5. Initial Jumper Settings
Signal and Control Jumpers
J13, J20J16-2 to J16-3, J19-2 to J19-3J24 – J28J29, J30J31, J32J33 - J37J38, J39
On the EVM board, place the ENABLE slide switches, located along the bottom edge of the PCB, in theinitial positions shown in Table 6 .
Table 6. ENABLE Switch Initial Positions
Section Switch Name Initial Position
SLOT A MP HIPWR HIPWR_OR LOSLOT B MP HIPWR HIPWR_OR LO
Set all 8 DIP positions of switch S7 to the CLOSED position.
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6.2 Check-Out Steps
www.ti.com Test Procedure
Turn the voltage adjust knobs of both power supplies fully CCW. Adjust the current limit control of the15-V supply for 10 amps minimum output.
If not already done, connect the EVM and test equipment as shown in Figure 3 .
Turn on the 3.3-V power supply, and adjust the output for 3.3 V 5% at test point TP2. Turn on the secondsupply, and adjust the output for 12 V 5% at TP1. Verify all STATUS LED’s (located just above the slideswitches) are OFF.
On the oscilloscope, set the Channel 1 and 2 amplifiers to the 2 V/div scale, and position the tracesappropriately in the top half of the display for viewing 3.3-V magnitude waveforms. Set the Channel 3amplifier scale to 100 or 200 mV/div, and position that trace about one division below center of the screen.Set the current pulse amplifier scale to 100 mA/div, and position that trace towards the bottom of thescope screen. Set the scope to trigger on the rising edge of Channel 1, at a threshold of about 1.5 V. Setthe time base to 1 mS/div, and set the trigger mode to NORMAL.
On the EVM board, place the SLOT A MP ENABLE switch in the LO position. The SLOT A MP greenSTATUS LED should illuminate. On the oscilloscope, verify a waveform capture was obtained similar tothe one shown in Figure 4 . The total voltage ramp time of the Channel 1 waveform, from 0 volts to about3.2 volts should be 2.6 0.6 mS. The Channel 3 waveform should attain a peak amplitude (prior to pullinglow again) of about 180 mV, for a nominal 2.6 ms output ramp time. The actual amplitude obtained varieslinearly with the ramp time, and has some inherent tolerance of its own. The peak amplitude of the currentpulse on Channel 4 should be 195 25 mA. A DVM can be used to verify the voltage at TP8 (with respectto ground at TP9) is within 10 mV of the 3.3-V input supply voltage at 3V3IN1 (TP2).
Figure 4. Output Ramp-Up Waveforms – 3.3-A Rail
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Test Procedure www.ti.com
Move the Channel 3 scope probe to test point TP30. Set the scope to trigger on Channel 2. Place theEVM SLOT B MP ENABLE switch in the LO position. The SLOT B MP green STATUS LED shouldilluminate. On the scope screen, verify a waveform capture was obtained similar to that shown in Figure 5 .The Channel 2, 3 and 4 waveform parameters should be similar to those indicated above for Figure 4 . ADVM can be used to verify the output voltage at TP11 (with respect to ground at TP12) is within 10 mV ofthe 3.3-V input supply setting.
Figure 5. Output Ramp-up Waveforms – 3.3B Rail
Change the oscilloscope probe connections and amplifier settings as shown below. It may be beneficial tomove the Channel 1 and 2 trace positions for viewing a couple of 12-V waveforms in the top half of thescreen.
•Chan. 1 -- TP7: 5 V/div•Chan. 2 -- TP10: 5 V/div•Chan. 3 -- TP32: 100 or 200 mV/div
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www.ti.com Test Procedure
Remove the current probe from the 3.3 V supply lead, and clamp it across the 12VIN2 supply lead.Change the Channel 4 amplifier setting to 5 A/div. Set the time base to 500 S/div, and adjust the scopetrigger threshold to about 3 volts.
On the EVM board, place the SLOT B PWR ENABLE switch to the LO position. The SLOT B PWR greenLED should illuminate. On the scope, verify a waveform capture was obtained similar to that shown inFigure 6 . The total voltage ramp time of the Channel 2 trace, from 0 volts to about 11.8 V should be 1.30.3 mS. Note that the extent of variance of the 12-V supply setting from a nominal 12.0 V affects thistiming result. A linearly ramping waveform should be visible on the Channel 3 trace, terminating some timeafter the output (Channel 2) charges to input potential. The average amplitude of the current pulse (i.e.,across the flattest part of the peak) on Channel 4 should be 7.9 0.8 A. A DVM can be used to verify thevoltage at TP10 (with respect to ground at TP12) is essentially the same as the input supply potential at12VIN2.
Figure 6. Output Ramp-up Waveforms – 12B Rail
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Test Procedure www.ti.com
Reconnect the Channel 3 scope probe to test point TP33. Set the scope to trigger on Channel 1.Disconnect the current probe and reconnect it across the 12VIN1 supply lead. Move the probe groundlead to test point TP9. Set the SLOT A PWR ENABLE switch to the LO position. The SLOT A PWR greenSTATUS LED should illuminate. On the scope, verify a waveform capture was obtained similar to thatshown in Figure 7 . The Channel 1, 3 and 4 waveform parameters should be similar to those indicatedabove for Figure 6 . Again, the extent of variance of the 12-V supply setting from a nominal 12.0 V affectsthe ramp-up timing result. A DVM can be used to verify the voltage at TP7 (with respect to ground at TP9)is essentially the same as the input supply potential at 12VIN1.
Figure 7. Output Ramp-up Waveforms – 12A Rail
The 12-V channel input OR'ing operation can be confirmed as follows: connect voltmeters across the 12-Voutput test points (SLOT A at TP7, SLOT B at TP10) and a convenient ground point. Setting the SLOT APWR_OR switch to LO should cause the Slot A output voltage to drop by about 600 mV (i.e., a diodedrop). Setting the SLOT B PWR_OR switch to LO should cause the Slot B output to drop by about 600mV.
When any of the output channels are disabled (ENABLE switch returned to HI position), the correspondingoutput should decay towards 0 volts.
Module operation as indicated in the above steps is a good indication of a fully functional board andcorrect set-up. This is also a good starting point for further test and user evaluation of the device.
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7 EVM Feature Details
7.1 Test Points
www.ti.com EVM Feature Details
The TPS2358EVM contains numerous test points throughout the circuit for user monitoring of waveformsand voltage measurement. Table 7 lists the module test points and the signal available at each one. TheEVM PCB layout connects all ground nodes and supply returns to a common GND node, via severalpower plane areas. However, due to potentially high loading conditions on the two Payload Power outputs,multiple ground test points are provided to mitigate the measurement impact of return current drops.Therefore, where appropriate, certain test points are paired in the table with the pertinent reference pointfor meter return connections.
Table 7. Module Test Points
TEST REF. POINT SIGNAL DESCRIPTIONPOINT NAMENAME
TP1 TP3 12VIN1 Input 12 V supply for AdvancedMC™ Slot ATP2 3V3IN1 Input 3.3 V supply for AdvancedMC™ Slot ATP4 TP6 12VIN2 Input 12 V supply for AdvancedMC™ Slot BTP5 3V3IN2 Input 3.3 V supply for AdvancedMC™ Slot BTP7 TP9 SLOTA_PWR AdvancedMC™ Slot A Payload Power, 12 V outputTP8 SLOTA_MP AdvancedMC™ Slot A Management Power, 3.3 V outputTP10 TP12 SLOTB_PWR AdvancedMC™ Slot B Payload Power, 12 V outputTP11 SLOTB_MP AdvancedMC™ Slot B Management Power, 3.3 V outputTP13 TP24, TP25 EN3A Active-low enable input to TPS2358 for the channel A 3.3 V railTP14 EN3B Active-low enable input to TPS2358 for the channel B 3.3 V railTP15 TP16 Slot A 12-V load current sense voltageTP17 TP24 PASSA TPS2358 channel A pass FET gate drive outputTP18 BLKA TPS2358 channel A block/OR’ing FET gate drive outputTP19 TP20 Slot B 12-V load current sense voltageTP21 TP25 PASSB TPS2358 channel B pass FET gate drive outputTP22 BLKB TPS2358 channel B block/OR’ing FET gate drive outputTP26 TP24, TP25 EN12A Active-low enable input to the TPS2358 for the channel A 12-V railTP27 EN12B Active-low enable input to the TPS2358 for the channel B 12-V railTP28 ORENA Channel A OR’ing FET/function enable signal to the TPS2358TP29 ORENB Channel B OR’ing FET/function enable signal to the TPS2358TP30 TP24, TP25 CT3B Timing cap waveform for the Slot B 3.3-V rail (SLOTB_MP)TP31 CT3A Timing cap waveform for the Slot A 3.3-V rail (SLOTA_MP)TP32 CT12B Timing cap waveform for the Slot B 12-V rail (SLOTB_PWR)TP33 CT12A Timing cap waveform for the Slot A 12-V rail (SLOTA_PWR)TP34 Var. FLT12A Slot A 12-V open-drain, active-low FAULT output indicationTP35 PG12A Slot A 12-V open-drain, active-low POWERGOOD output indicationTP36 FLT12B Slot B 12-V open-drain, active-low FAULT output indicationTP37 PG12B Slot B 12-V open-drain, active-low POWERGOOD output indicationTP38 FLT3A Slot A 3.3-V open-drain, active-low FAULT output indicationTP39 PG3A Slot A 3.3-V open-drain, active-low POWERGOOD output indicationTP40 FLT3B Slot B 3.3-V open-drain, active-low FAULT output indicationTP41 PG3B Slot B 3.3-V open-drain, active-low POWERGOOD output indication
On the TPS2358EVM, the device fault ( FLTx) and power good ( PGx) outputs are all used to drive theSTATUS LED’s. Power for LED drive is derived from a diode-OR of the two 3.3-V input supplies.
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7.2 Connecting Loads to the TPS2358EVM
EVM Feature Details www.ti.com
Each of the four power rails of the TPS2358EVM is supplied with some amount of load capacitance in theform of discrete electrolytics. The capacitors can be connected to or disconnected from their associatedoutput nodes using 100-mil, 2-pin shunt jumpers across the on-board PCB headers. These capacitors areintended to simulate input bulk capacitance which may be encountered at the front ends ofAdvancedMC™ modules plugged into the card slots of the target application. The AdvancedMC™standard specifies the maximum allowable input capacitance on both Management and Payload Powerrails. The TPS2358EVM provides up to 150 µF capacitance on each of the two Management Poweroutputs, according to the AdvancedMC™ maximum limit. The EVM also provides up to 880 µF ofcapacitance, implemented in increments of 220 µF devices, on each of the Payload Power rails, toapproximate the 800 µF limit of the standard. In addition, low-level (mA) load resistors can be jumpered inacross each output and return. These limited load resistors are intended primarily as reset devicesbetween output ramp events, particularly when loaded with significant capacitance.
Table 8 lists the EVM module’s output voltage nodes, and for each one indicates the associated jumperreference designators, and the resultant load value with jumper installed.
Table 8. EVM On-board Loads
OUTPUT RAIL JUMPER DEVICE VALUE
SLOTA_MP J30 C16 150 µFJ29 R12 270 ΩSLTB_MP J32 C21 150 µFJ31 R13 270 ΩSLOTA_PWR J25 C12 220 µFJ26 C13 220 µFJ27 C14 220 µFJ28 C15 220 µFJ24 R10 1 k ΩSLOTB_PWR J34 C17 220 µFJ35 C18 220 µFJ36 C19 220 µFJ37 C20 220 µFJ33 R11 1 k Ω
Banana jacks are provided along the right-hand edge of the board for connection of the user’s optionaltest loads. The output banana jack reference designators are listed in Table 4 along with the voltage railavailable at each one. Also, the net names are screen printed on the PCB, adjacent to their respectivejacks.
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8 Assembly Drawing and PCB Layout
www.ti.com Assembly Drawing and PCB Layout
The top assembly drawing and individual PCB layers for the TPS2358EVM are shown in the followingfigures.
Figure 8.
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Assembly Drawing and PCB Layout www.ti.com
Figure 9.
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www.ti.com Assembly Drawing and PCB Layout
Figure 10.
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Assembly Drawing and PCB Layout www.ti.com
Figure 11.
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www.ti.com Assembly Drawing and PCB Layout
Figure 12.
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Assembly Drawing and PCB Layout www.ti.com
Figure 13.
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