Texas Instruments LMX2492 User manual

LMX2492 Evaluation Instructions
Ultra Low Noise Frequency Synthesizer with
Integrated VCO Evaluation Board Operating
Instructions
User's Guide
Literature Number: SNAU160C
March 2014–Revised November 2014

Contents
1 Evaluation Board Setup ........................................................................................................ 4
1.1 Evaluation Board Setup Diagram and Connections..................................................................... 4
1.1.1 VCO Outputs ........................................................................................................ 4
1.1.2 VCC 5V .............................................................................................................. 4
1.1.3 VCC 3P3V ........................................................................................................... 4
1.1.4 USB2ANY Connector .............................................................................................. 4
1.1.5 OSCin/OSCin*....................................................................................................... 4
2 Evaluation Board Configuration............................................................................................. 5
2.1 Loop Filter Configuration.................................................................................................... 5
2.2 CodeLoader Software Settings ............................................................................................ 6
2.2.1 Port Setup ........................................................................................................... 6
2.2.2 Device Selection .................................................................................................... 7
2.2.3 Bits/Pins Tab and Restoring the Default Configuration........................................................ 8
2.2.4 Registers Tab ....................................................................................................... 9
2.2.5 PLL Frequency Tab............................................................................................... 10
2.2.6 Ramp Generator Tab ............................................................................................. 11
3 Schematic ......................................................................................................................... 12
4 Board Layers Stackup......................................................................................................... 13
5 Bill of Materials .................................................................................................................. 14
6 Typical Performance Measurements..................................................................................... 16
6.1 PLL Phase Noise........................................................................................................... 16
6.2 Ramping Example.......................................................................................................... 19
Revision History.......................................................................................................................... 20
2Contents SNAU160C–March 2014–Revised November 2014
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User's Guide
SNAU160C–March 2014–Revised November 2014
Evaluation Board Operating Instructions
3
SNAU160C–March 2014–Revised November 2014 Evaluation Board Operating Instructions
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Direct VCO Output (~10 GHz)
VCO/2 Output (~5 GHz) 5V Supply
Optional:
3V Supply
Optional:
VCO/4 Output
Optional:
Single Ended or
Differential
Reference Signal
USB2ANY
Connector
Chapter 1
SNAU160C–March 2014–Revised November 2014
Evaluation Board Setup
1.1 Evaluation Board Setup Diagram and Connections
Figure 1-1. Evaluation Board Connection Diagram
1.1.1 VCO Outputs
The LMX2492 operates at 10 GHz, but this can be a problem for some test equipment. If it is, use the
VCO/2 output or the VCO/4 output. The VCO/4 output is powered down by default, but can be configured
if necessary.
1.1.2 VCC 5V
The board operates on 5V and regulates this down to 3.3 V for the PLL. The board can be configured to
operate wit separate
1.1.3 VCC 3P3V
This is actually supplied from the regular off the 5V supply, but can also be run from a 3.3 V supply if the
regulator is disconnected and a few resistors are changed.
1.1.4 USB2ANY Connector
Connect the board to the computer using the USB2ANY connector, which comes supplied with the kit.
1.1.5 OSCin/OSCin*
The board has an on board XO, but the OSCin pins can be run either single-ended or differentially.
4Evaluation Board Setup SNAU160C–March 2014–Revised November 2014
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Chapter 2
SNAU160C–March 2014–Revised November 2014
Evaluation Board Configuration
2.1 Loop Filter Configuration
Table 2-1. Loop Filter Values
PARAMETER LMX2492
VCO Frequency 9.4 – 10.1 GHz
VCO Gain (MHz/V) 200 MHz/V
C1_LF 68 pF
C2_LF 3.9 nF
C3_LF 150 pF
C4_LF Open
R2 390 Ω
R3_LF 150 Ω
R4_LF 0 Ω
Charge Pump Gain 3.1 mA
Phase Detector Frequency 100 MHz
OSCin Frequency 100 MHz
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CodeLoader Software Settings www.ti.com
2.2 CodeLoader Software Settings
The CodeLoader software is used for programming this device and is available at www.ti.com/codeloader.
2.2.1 Port Setup
The port setup shows which pins are sent to the pins of the header. If using the USB2ANY board, it is
recommended to click the "Identify" button and ensure the LED light is blinking to ensure that this is
working correctly. Note that position 3 is MUXout, which can be used for readback. In order to do this, the
MUXout pin needs to be programmed to Readback and also resistor R68 needs to be placed.
Figure 2-1. LMX2492 Port Setup
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www.ti.com CodeLoader Software Settings
2.2.2 Device Selection
Go to “Select Device” →“PLL–Fractional” →LMX2492
Figure 2-2. Part Selection
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CodeLoader Software Settings www.ti.com
2.2.3 Bits/Pins Tab and Restoring the Default Configuration
The Bits/Pins tab shows the state of the programming fields. Note the scroll bar at the bottom. One can
right mouse click on any field for a short description of what it does. To restore the part to the original
software configuration, on can select the default mode as shown.
Figure 2-3. Restoring Default Mode
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www.ti.com CodeLoader Software Settings
2.2.4 Registers Tab
The registers tab is not necessary to program the part, but it does show the regsiters. The LMX2492 also
supports readback. To use this, set the MUXout pin to readback and attach resistor R68 to connect this
pin back to the programming header. Once this is done entire registers can be read, or a specific field can
be typed in to read the value. Realize that some fields of the LMX2492 are read only and therefore might
not be the same as written to.
Figure 2-4. Registers Tab
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2.2.5 PLL Frequency Tab
Verify your “PLL” Tab looks like below:
Figure 2-5. PLL Frequency Tab
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www.ti.com CodeLoader Software Settings
2.2.6 Ramp Generator Tab
Verify your “Ramp Calculator” Tab looks like below. If not using the ramping features, or when just getting
the device up and running, it is advised not to Enable the Flex Scripts as they slow the software down.
Once the part is running, then enable the flex scripts as shown below and calculations the Ramp
Generator Tab will become active.
Figure 2-6. Enabling the Flex Scripts for the Ramp Generator GUI
Then Click on “Update All” and wait until you see your screen populate to below:
Notes for Ramp Calculator tab:
• Manually change the OSCin Frequency in the “Ramp Calculator” tab when you change the value in the
“PLL” tab
• Click “Update All” whenever you change values in the frequency section
• Only modify values in "Yellow" regions
• Click and unclick “RST” to clear the accumulator after modifying a row in Ramps
11
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Chapter 3
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Schematic
Refer to Chapter 5 for actual component values. Also realize that not all components are placed on this
board.
12 Schematic SNAU160C–March 2014–Revised November 2014
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Top Copper - 1oz thick [LMX2492.GTL]
62 mils thick total
Ro4003 (Er=3.38)
CONTROLLED THICKNESS OF
16 MILS THICK
GND Layer [LMX2492.GP1]
FR4 (Er = ~4.6)
18 MILS THICK
Power Layer [LMX2492.G1]
FR4 (Er = ~4.6)
22 MILS THICK
Bottom Copper - Thermal Relief [LMX2492.GBL]
Chapter 4
SNAU160C–March 2014–Revised November 2014
Board Layers Stackup
Layers of the 4 layer evaluation board shall include: Blue is dielectrics
• Top layer for high priority high frequency signals (GTL)
– 1 oz CU
• RO4003 Dielectric, 16 mils
• Ground plane (GP1)
• FR4, 18 mils thick.
• Power plane – VccCLK (GP2)
• FR4, 22 mils
• Bottom layer copper clad for thermal relief (GBL)
Table 4-1. Top to Bottom Layer Order:
LMX2492.GTL (1) Top Layer
LMX2492.GP1 (2) GND Plane
LMX2492.G1 (3) Power
LMX2492.GBL (4) Bottom Layer
Figure 4-1. Board Layers Stackup
13
SNAU160C–March 2014–Revised November 2014 Board Layers Stackup
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Chapter 5
SNAU160C–March 2014–Revised November 2014
Bill of Materials
ITEM DESIGNATOR DESCRIPTION RoHS MANUFACTURER PART NUMBER QTY
1 AA1 Printed Circuit Board O TBD Used in BOM Report 1
CAP, CERM, 10pF, 50V, +/-5%, Johanson
2 C1, C2 Y 500R07S100JV4T 2
C0G/NP0, 0402 Technology
CAP, CERM, 68pF, 50V, +/-5%,
3 C1_LF Y Kemet C0603C680J5GACTU 1
C0G/NP0, 0603
CAP, CERM, 3900pF, 50V, +/- GRM1885C1H392JA01
4 C2_LF Y MuRata 1
5%, C0G/NP0, 0603 D
CAP, CERM, 1uF, 16V, +/-10%,
5 C3, C11 Y TDK C1608X7R1C105K 2
X7R, 0603
CAP, CERM, 150pF, 50V, +/-
6 C3_LF Y Kemet C0603C151J5GACTU 1
5%, C0G/NP0, 0603
CAP, CERM, 0.1uF, 50V, +/-
7 C4 Y TDK C1005X7R1H104K 1
10%, C0G/NP0, 0402
C5, C13, C14, CAP, CERM, 100pF, 50V, +/-
8 Y Kemet C0603C101J5GACTU 4
C15 5%, C0G/NP0, 0603
C6, C7, C8, C9, CAP, CERM, 0.1uF, 16V, +/-5%,
9 Y AVX 0603YC104JAT2A 5
C10 X7R, 0603
C16, C18, C20, CAP, CERM, 10uF, 6.3V, +/-
10 Y Kemet C0603C106M9PACTU 6
C22, C23, C24 20%, X5R, 0603
11 D1 LED, Green, SMD Y Lumex SML-LX2832GC-TR 1
L1, L2, L3, L4, 3A Ferrite Bead, 120 ohm @
12 Y MuRata BLM18SG121TN1D 8
L5p, L6, L7, L8 100MHz, SMD
OSCin, RFout, Connector, SMT, End launch
13 Y Emerson 142-0701-851 4
RFout/2, Vcc_5V SMA 50 ohm
RES, 51 ohm, 5%, 0.063W,
14 R1 Y Vishay-Dale CRCW040251R0JNED 1
0402
RES, 18 ohm, 5%, 0.063W,
15 R2, R6, R7 Y Vishay-Dale CRCW040218R0JNED 3
0402
16 R2_LF RES, 390 ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW0603390RJNEA 1
RES, 68 ohm, 5%, 0.063W,
17 R3 Y Vishay-Dale CRCW040268R0JNED 1
0402
18 R3_LF RES, 150 ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW0603150RJNEA 1
RES, 36 ohm, 5%, 0.063W,
19 R4 Y Vishay-Dale CRCW040236R0JNED 1
0402
R4_LF, R15, R17,
R18, R29, R30,
20 R31, R32, R33, RES, 0 ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW06030000Z0EA 15
R35, R40, R44,
R49, R51, R60
R8, R10, R11,
21 R13, R19, R22, RES, 18 ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW060318R0JNEA 9
R23, R25, R50
R9, R12, R20,
22 RES, 68 ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW060368R0JNEA 4
R24
23 R14 RES, 10 ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW060310R0JNEA 1
R56, R58, R61,
24 R64, R65, R70, RES, 12k ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW060312K0JNEA 7
R72
14 Bill of Materials SNAU160C–March 2014–Revised November 2014
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ITEM DESIGNATOR DESCRIPTION RoHS MANUFACTURER PART NUMBER QTY
R57, R59, R62,
25 R63, R66, R69, RES, 10k ohm, 5%, 0.1W, 0603 Y Vishay-Dale CRCW060310K0JNEA 7
R71
26 R75 RES, 330 ohm, 5%, 0.1W, 0603 Y Yageo America RC0603JR-07330RL 1
SO1, SO2, SO3, HEX STANDOFF SPACER, 9.53
27 Y Richco Plastics TCBS-6-01 4
SO4 mm
13.5 GHz Low Phase Noise
Fractional N PLL with
28 U1 Y Texas Instruments LMX2492QRTW 1
Ramp/Chirp Generation,
RTW0024A
29 U2 VCO, 9.8-11.3GHz, SMD Y RF Micro Devices RFVC1843 1
Ultra Low Noise, 150mA Linear
Regulator for RF/Analog Circuits
30 U6 N Texas Instruments LP5900SD-3.3 1
Requires No Bypass Capacitor,
6-pin LLP
31 uWire Connector FCI 52601-G10-8LF 1
OSC 100.0000MHZ 3.3V +-
32 Y2 Y Connor-Winfield CWX813-100.0M 1
25PPM SMD
15
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Chapter 6
SNAU160C–March 2014–Revised November 2014
Typical Performance Measurements
6.1 PLL Phase Noise
Figure 6-1. Phase Noise in Default Mode
The above figure shows the phase noise in default for mode. Note that this is ½ the VCO frequency as it
was observed on the Fout/2 output.
16 Typical Performance Measurements SNAU160C–March 2014–Revised November 2014
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www.ti.com PLL Phase Noise
Figure 6-2. Phase Noise with a Wide Loop Bandwidth
The figure above shows phase noise with a wide loop bandwidth and 100 MHz phase detector frequency.
At about 260 kHz, the phase noise is -113.1 dBc/Hz, which is actually being degraded by 0.5 dB by the 1/f
noise. This implies a figure of merit of -227.2 dBc/Hz.
17
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-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
Phase Noise (dBc/Hz)
Offset (Hz)
Fvco=9100
Fvco=9200
Fvco=9300
Fvco=9400
Fvco=9500
Fvco=9600
Fvco=9700
Fvco=9800
Fvco=9900
Fvco=10000
Fvco=10100
Fvco=10200
PLL Phase Noise www.ti.com
Figure 6-3. Phase Noise vs Tuning Voltage
The phase noise of the LMX2492 does vary somewhat with tuning voltage with the best performance
typically near lower tuning voltages.
Table 6-1. Phase Noise
FVCO Vtune
9000 0.04
9100 0.18
9200 0.338
9300 0.518
9400 0.726
9500 0.973
9600 1.26
9700 1.602
9800 2.014
9900 2.483
10000 3.01
10100 3.562
10200 4.158
10300 4.792
18 Typical Performance Measurements SNAU160C–March 2014–Revised November 2014
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www.ti.com Ramping Example
6.2 Ramping Example
Below is an example that can be used to generate the waveform shown later in this document.
Figure 6-4. Setup for Ramping Example
Figure 6-5. Generated Waveform at VCO/2 Output
19
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Revision History www.ti.com
Revision History
Changes from B Revision (October 2014) to C Revision ............................................................................................... Page
• Changed Updated Schematic *Again* due to curruption. Now using a GIF format............................................. 12
20 Revision History SNAU160C–March 2014–Revised November 2014
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