Texas Instruments ADC31JB68 User manual

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ADC31JB68 Evaluation Module
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User's Guide
SLAU630A–August 2015–Revised August 2016
ADC31JB68 Evaluation Module
This user's guide describes the characteristics, operation, and use of the ADC31JB68 evaluation module
(EVM). This document also provides a quick start guide, evaluation procedures, a description of the
software, some alternate hardware configurations, and descriptions of the jumpers, connectors, and LEDs.
Contents
1 Overview...................................................................................................................... 2
1.1 Required Hardware................................................................................................. 2
1.2 Required Software.................................................................................................. 3
1.3 Evaluation Board Feature Identification Summary ............................................................. 3
1.4 References .......................................................................................................... 3
2 Quick Start Guide............................................................................................................ 4
2.1 Software Installation................................................................................................ 4
2.2 Hardware Setup Procedure ....................................................................................... 5
2.3 Software Setup Procedure......................................................................................... 6
2.4 Quick Start Trouble Shooting ..................................................................................... 9
3 Optimizing Evaluation Results ........................................................................................... 10
3.1 Clocking Optimization............................................................................................. 10
3.2 Coherent Input Source ........................................................................................... 10
3.3 HSDC Pro Settings................................................................................................ 10
4 Software Description....................................................................................................... 11
4.1 ADC31JB68EVM GUI ............................................................................................ 11
4.2 Low Level View.................................................................................................... 12
5 Alternate Hardware Configurations ..................................................................................... 13
5.1 Clocking Options .................................................................................................. 13
Appendix A Jumper, Connector, and LED Descriptions.................................................................... 14
List of Figures
1 EVM Feature Locations..................................................................................................... 3
2 Quick Start Test Setup...................................................................................................... 5
3 HSDC Pro GUI Main Panel................................................................................................. 7
4 Data Capture Results From Quick Start Procedure..................................................................... 8
5 ADC31JB68EVM GUI ..................................................................................................... 11
6 Low Level View Tab ....................................................................................................... 12
List of Tables
1 Quick Start Performance Measurements................................................................................. 8
2 Troubleshooting Tips........................................................................................................ 9
3 HSDC Pro Options for Optimal Analysis Results ...................................................................... 10
4 ADC31JB68EVM GUI Tab Descriptions ................................................................................ 11
5 Low Level View Controls.................................................................................................. 12
6 Recommended LMK04828 Configurations ............................................................................. 13
7 Jumper Descriptions and Default Settings.............................................................................. 14
8 Connector Descriptions.................................................................................................... 14
9 LED Descriptions........................................................................................................... 15

Overview www.ti.com
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ADC31JB68 Evaluation Module
1 Overview
The ADC31JB68EVM is an evaluation board used to evaluate the ADC31JB68 analog-to-digital converter
(ADC) from Texas Instruments. The ADC31JB68 is a single-channel 16-bit ADC capable of operating at
sampling rates up to 500 Mega Samples Per Second (MSPS) with outputs featuring a standard
JESD204B high speed serial interface.
This evaluation board also includes the following important features:
• Transformer-coupled signal input network allowing a single-ended signal source
• LMK04828 system clock generator that generates the FPGA reference clock for the high speed serial
interface
• Default transformer-coupled clock input network to test the ADC performance with a very low-noise
clock
• High speed serial data output over a standard FMC connector
• Device registers programming via USB connector and FTDI USB-to-SPI bus translator
The ADC31JB68EVM is designed to work seamlessly with the TSW14J56EVM, Texas Instruments’
JESD204B data capture card and the High Speed Data Converter Pro (HSDCPro) software tool for high
speed data converter evaluation. The ADC31JB68EVM is also compatible with many of the development
kits from leading FPGA vendors that contain an FMC connector.
1.1 Required Hardware
The following equipment is included in the EVM evaluation kit:
• ADC31JB68EVM Evaluation Board (EVM)
• Power cable with barrel connector (for connection of EVM to +5-V bench power supply)
• Mini-USB cable
CAUTION
Ensure that the power cable is connected to the bench power supply and
EVM with the correct polarity. Connecting the cable with an incorrect polarity
may damage the EVM. Testing the voltage at the output of the power cable (at
the barrel connector) is recommended before connecting the power cable to the
EVM.
The following list of equipment are items that are not included in the EVM evaluation kit but are items
required for evaluation of this product in order to achieve the best performance.
• TSW14J56EVM Data Capture Board, power cable and Mini-USB cable
• Computer running Microsoft®Windows®8, Windows 7, or Windows XP
• 2x (or dual-channel) bench power supply capable of +5 V, 2 A
• Two low-noise signal generators. Recommendations:
– RF generator, > +17 dBm, < –40-dBc harmonics, < 500 fs jitter 20 kHz–20 MHz, 10 MHz–2 GHz
frequency range
– Examples: TSW2170EVM, HP HP8644B, Rohde & Schwarz SMA100A
• Bandpass filter for analog input (between 100–500 MHz).Recommendations:
– Bandpass filter, ≥60 dB harmonic attenuation, ≤5% bandwidth, > +18-dBm power, < 5 dB insertion
loss
– Examples: Trilithic 5VH-series Tunable BPF, K&L BT-series Tunable BPF, TTE KC6 or KC7-series
Fixed BPF

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• Bandpass filter for clock input (500 MHz). Recommendations:
– Bandpass filter, ≥60-dB harmonic attenuation, ≤5% bandwidth, < +18-dBm power, < 5-dB insertion
loss
– Examples: Trilithic 5VH-series Tunable BPF, K&L BT-series Tunable BPF, TTE KC6 or KC7-series
fixed BPF
• Signal path cables, SMA and/or BNC with BNC-to-SMA adapters
• 6-dB, 50-Ωattenuator
1.2 Required Software
The following software is required to operate the ADC31JB68EVM and available online. See the
References section for links.
• ADC31JB68_GUI_Installer.zip
The following software is required to operate the TSW14J56EVM and available online. See the
References section for links.
• High Speed Data Converter Pro software
1.3 Evaluation Board Feature Identification Summary
Figure 1. EVM Feature Locations
1.4 References
• ADC31JB68EVM GUI software, schematics, layout, BOM, available at:
www.ti.com/tool/ADC31JB68EVM
• ADC31JB68 datasheet, available at www.ti.com/product/ADC31JB68
• LMK04828 datasheet, available at www.ti.com/product/lmk04828
• TSW14J56EVM User’s Guide, available at www.ti.com/tool/TSW14J56EVM
• High Speed Data Converter Pro User’s Guide, available at www.ti.com/tool/dataconverterpro-sw
NOTE: Schematics, layout, and BOM are available on the ADC31JB68EVM product page on
www.ti.com.

Quick Start Guide www.ti.com
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ADC31JB68 Evaluation Module
2 Quick Start Guide
This section guides the user through the EVM test procedure to obtain a valid data capture from the
ADC31JB68EVM using the TSW14J56EVM capture card. This should be the starting point for all
evaluations.
2.1 Software Installation
The proper software must be installed before beginning evaluation. See Section 1.2 for a list of the
required software. The References section of this document contains links to find the software on the TI
website.
NOTE: The software must be installed before connecting the ADC31JB68EVM and TSW14J56EVM
to the computer for the first time.
2.1.1 ADC31JB68 GUI Installation
The ADC31JB68 GUI is used to control the ADC31JB68EVM. It must be used to properly configured the
devices on the EVM.
1. Download the GUI from the TI website. The References section of this document contains a link to find
the software on the TI website.
2. Extract the files from the zip file.
3. Run setup.exe and follow the installation prompts.
2.1.2 High Speed Data Converter Pro GUI Installation
High Speed Data Converter Pro (HSDC Pro) is used to control the TSW14J56EVM and analyze the
captured data. Please see the HSDC Pro user’s guide for more information.
1. Download HSDC Pro from the TI website. The References section of this document contains the link to
find the software on the TI website.
2. Extract the files from the zip file.
3. Run setup.exe and follow the installation prompts.

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2.2 Hardware Setup Procedure
A typical test setup using the ADC31JB68EVM and TSW14J56EVM is shown in Figure 2. This is the test
setup that will be used for the quick start procedure. The rest of this section describes the hardware setup
steps.
Figure 2. Quick Start Test Setup
2.2.1 TSW14J56EVM Setup
First, setup the TSW14J56EVM using the following steps:
1. Connect the ADC31JB68EVM to the TSW14J56EVM via the FMC connectors
2. Connect the included power cable for the TSW14J56EVM to the bench power supply
3. Test the voltage at the output of the power cable to verify correct polarity. The center core of the barrel
connector must have +5V relative to the outside ground shield.
4. Connect the power cable to connector J11 (+5V IN) of the TSW14J56EVM
5. Connect the included mini-USB cable to the USB connector (J9) of the TSW14J56EVM
6. Flip the power switch (SW6) of the TSW14J56EVM to the ON position

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2.2.2 ADC31JB68EVM Setup
Next, setup the ADC31JB68EVM using the following:
CAUTION
Ensure that the power cable is connected to the bench power supply and
EVM with the correct polarity. Connecting the cable with an incorrect polarity
may damage the EVM. Testing the voltage at the output of the power cable (at
the barrel connector) is recommended before connecting the power cable to the
EVM.
1. Connect the flying leads of the power cable to the +5V bench power supply
2. Test the voltage at the output of the power cable to verify correct polarity. The center core of the barrel
connector must have +5V relative to the outside ground shield.
3. Connect the included power cable to connector MAIN PWR connector of the EVM
4. Connect the included mini-USB cable to the USB connector
5. Connect the 6-dB, 50-Ωattenuator to the VIN– input
6. Set the analog input signal generator for 70 MHz, +10 dBm
7. Connect the Signal generator to the VIN– input. Place the bandpass filter between the analog signal
generator and the attenuator input to remove noise and harmonics from the signal generator.
8. Set the analog input signal generator for 500 MHz, +12 dBm
9. Connect the Signal generator to the CLK input. Place the bandpass filter between the clock signal
generator and the CLK input to remove noise and harmonics from the signal generator.
2.3 Software Setup Procedure
The software can be opened and configured once the hardware is properly setup.
2.3.1 ADC31JB68 GUI Configuration
1. Open the ADC31JB68 GUI by going to Start Menu →All Programs →Texas Instruments ADCs →
ADC31JB68 GUI
2. Verify that the green USB Status indicator is lit in the top right corner of the GUI
3. Press the Program LMK04828 button
4. Press the Calibrate ADC31JB68 button

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2.3.2 HSDC Pro GUI Configuration
1. Open High Speed Data Converter Pro by going to Start Menu →All Programs →Texas Instruments →
High Speed Data Converter Pro. The GUI main page looks as shown in Figure 3.
Figure 3. HSDC Pro GUI Main Panel
2. When prompted to select the capture board, select the TSW14J56EVM whose serial number
corresponds to the serial number on the TSW14J56EVM and click OK. This popup can be accessed
through the Instrument Options menu.
3. Select the ADC tab at the top of the GUI
4. Use the Select ADC drop-down menu at the top left corner to select ADC31JB68EVM
5. When prompted to update the firmware for the ADC, click Yes and wait for the firmware to download to
the TSW14J56EVM
6. Enter “500M” into the ADC Output Data Rate field at the bottom left corner
7. Click Capture in HSDC Pro to capture data from the ADC

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8. The results from the captured data of Channel 1 should resemble Figure 4 and the performance
should be similar to Table 1. If this result is not achieved, then see the Quick Start Trouble Shooting
section of this document.
Figure 4. Data Capture Results From Quick Start Procedure
Table 1. Quick Start Performance Measurements
Result Measured Value Units
SNR > 68 dBFS
SFDR > 80 dBFS

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2.4 Quick Start Trouble Shooting
Use Table 2 to assist with problems that may occur during the quick start procedure.
Table 2. Troubleshooting Tips
Issue Troubleshooting Tips
General Problems Verify the test setup shown in Figure 2 and repeat the setup procedure as described in this document
Check power supplies to the EVM and TSW14J56EVM. Verify that the power switches are in the ON
position
Check signal and clock connections to EVM
Check that all boards are properly connected together
Try pressing the CPU_RESET button on the TSW14J56EVM
Try power-cycling the external power supply to the EVM and re-program the LMK and ADC devices
TSW14J56 LEDs are
not correct:
D1, D5 – N/A
D2, D4 – Blinking
D3, D6, D7 – OFF
D8, D28 – ON
Verify the settings of the configuration switches on the TSW14J56EVM
Verify that the EVM configuration GUI is communicating with the USB and that the configuration
procedure has been followed
(LEDs Not Blinking) Re-program the LMK device
Try pressing the CPU_RESET button on the TSW14J56EVM
Try capturing data in HSDC Pro to force an LED status update
Device GUI is not
working properly Verify that the USB cable is plugged into the EVM and the PC
Check the computer’s Device Manager and verify that a USB Serial Device is recognized when the EVM
is connected to the PC
Verify that the green USB Status LED light in the top right corner of the GUI is lit. If it is not lit, press the
Reconnect FTDI button.
Try restarting the configuration GUI
Check default jumper connections as shown in Appendix A
HSDC Pro Software is
not capturing good
data or analysis
results are incorrect
Verify that the TSW14J56EVM is properly connected to the PC with a mini-USB cable and that the board
serial number is properly identified by the HSDC Pro software
Check that the proper ADC device is selected. In default conditions, ADC31JB68EVM should be
selected.
Check that the analysis parameters are properly configured
HSDC Pro Software
gives a Time-Out error
when capturing data
Try to re-program the LMK device and reset the JESD204 link
Verify that the ADC sampling rate is correct in the HSDC Pro software
Sub-Optimal Measured
Performance Try pressing the Calibrate ADC button on the INTRO tab of repeating the configuration GUI procedure for programming the EVM
Check that the spectral analysis parameters are properly configured
Verify that bandpass filters are used in the clock and input signal paths and that low-noise signal
sources are used

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3 Optimizing Evaluation Results
This section describes how to optimize the performance during evaluation of the product.
3.1 Clocking Optimization
The sampling clock provided to the ADC must have very low noise to achieve optimal results. The
ADC31JB68EVM is configured by default to require a device clock from an external signal source via the
CLK SMA connector to allow for the best possible measured performance.
3.2 Coherent Input Source
A Rectangular window function can be applied to the captured data when the sample rate and the input
frequency are set precisely to capture an integer number of cycles of the input frequency (sometimes
called coherent frequency). This may yield better SNR results. The clock and analog inputs must be
frequency locked (such as through 10-MHz references) in order to achieve coherency.
3.3 HSDC Pro Settings
HSDC Pro has some options that can help improve the performance measurements. These are
highlighted in Table 3.
Table 3. HSDC Pro Options for Optimal Analysis Results
HSDC Pro Feature Description
Analysis Window (samples) Selects the number of samples to include in the selected test analysis. Collect more
data to improve frequency resolution of FFT analysis.
Data Windowing Function Select the desired windowing function applied to the data for FFT analysis. Select
Blackman when sampling a non-coherent input signal or Rectangle when sampling a
coherent input signal.
Test Options →Notch Frequency Bins Select bins to be removed from the spectrum and back-filled with the average noise
level. May also customize which Harmonics/Spurs are considered in SNR and THD
calculations and select the method for calculating spur power.
Test Options →Bandwidth Integration
Markers Enable markers to narrow the Single-Tone FFT test analysis to a specific bandwidth
Data Capture Options →Capture Options Configure the number of contiguous samples per capture (capture depth). May also
enable Continuous Capture and FFT Averaging.