Texas Instruments TPS54336AEVM-010 User manual

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TPS54336AEVM-010 3-A Regulator Evaluation Module
User's Guide
SLVUB77–July 2017
TPS54336AEVM-010 3-A Regulator Evaluation Module
This user's guide contains background information for the TPS54336A as well as support documentation
for the TPS54336AEVM-010 evaluation module (BSR010-002). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54336AEVM-010.
Contents
1 Introduction ................................................................................................................... 2
2 Test Setup and Results..................................................................................................... 4
3 Board Layout................................................................................................................ 12
4 Schematic and Bill of Materials........................................................................................... 14
List of Figures
1 TPS54336AEVM-010 Efficiency........................................................................................... 5
2 TPS54336AEVM-010 Low Current Efficiency ........................................................................... 5
3 TPS54336AEVM-010 Load Regulation................................................................................... 6
4 TPS54336AEVM-010 Line Regulation.................................................................................... 6
5 TPS54336AEVM-010 Transient Response .............................................................................. 7
6 TPS54336AEVM-010 Loop Response ................................................................................... 7
7 TPS54336AEVM-010 Output Ripple, IOUT = 3 A ........................................................................ 8
8 TPS54336AEVM-010 Output Ripple, IOUT = 100 mA.................................................................... 8
9 TPS54336AEVM-010 Output Ripple, IOUT = 0 A ......................................................................... 9
10 TPS54336AEVM-010 Input Ripple ....................................................................................... 9
11 TPS54336AEVM-010 Start-Up Relative to VIN ......................................................................... 10
12 TPS54336AEVM-010 Start-up Relative to Enable .................................................................... 10
13 TPS54336AEVM-010 Shut-down Relative to VIN ...................................................................... 11
14 TPS54336AEVM-010 Shut-down Relative to EN...................................................................... 11
15 TPS54336AEVM-010 Top-Side Assembly.............................................................................. 12
16 TPS54336AEVM-010 Top-Side Layout ................................................................................. 13
17 TPS54336AEVM-010 Bottom-Side Layout ............................................................................. 13
18 TPS54336AEVM-010 Schematic......................................................................................... 14
List of Tables
1 Input Voltage and Output Current Summary............................................................................. 2
2 TPS54336AEVM-010 Performance Specification Summary........................................................... 2
3 Output Voltages Available.................................................................................................. 3
4 EVM Connectors and Test Points......................................................................................... 4
5 TPS54336AEVM-010 Bill of Materials................................................................................... 15
Trademarks
All trademarks are the property of their respective owners.

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TPS54336AEVM-010 3-A Regulator Evaluation Module
1 Introduction
This user's guide contains background information for the TPS54336A as well as support documentation
for the TPS54336AEVM-010 evaluation module (BSR010-002). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54336AEVM-010.
1.1 Background
The TPS54336A dc/dc converter is designed to provide up to a 3-A output from an input voltage source of
4.5 V to 28 V. Rated input voltage and output current range for the evaluation module are given in
Table 1. This evaluation module is designed to demonstrate the small printed-circuit-board areas that may
be achieved when designing with the TPS54336A regulator. The switching frequency is internally set at a
nominal 340 kHz. The high-side and low-side MOSFETs are incorporated inside the TPS54336A package
along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allow the
TPS54336A to achieve high efficiencies and helps keep the junction temperature low at high output
currents. The compensation components are external to the integrated circuit (IC), and an external divider
allows for an adjustable output voltage. Additionally, the TPS54336A provides adjustable slow start and
undervoltage lockout inputs. The absolute maximum input voltage is 30 V for the TPS54336AEVM-010.
Table 1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54336AEVM-010 VIN = 8 V to 28 V 0 A to 3 A
1.2 Performance Specification Summary
A summary of the TPS54336AEVM-010 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN = 24 V and an output voltage of 5.0 V, unless otherwise specified. The
TPS54336AEVM-010 is designed and tested for VIN = 8 V to 28 V. The ambient temperature is 25°C for all
measurements, unless otherwise noted.
Table 2. TPS54336AEVM-010 Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN operating voltage range 8 24 28 V
VIN start voltage 7.12 V
VIN stop voltage 6.12 V
Output voltage set point 5 V
Output current range VIN = 8 V to 28 V 0 3 A
Line regulation IO= 1.5 A, VIN = 8 V to 28 V ±0.05%
Load regulation VIN = 24 V, IO= 0 A to 3 A ±0.3%
Load transient response IO= 0.75 A to 2.25 A Voltage change –190 mV
Recovery time 150 μs
IO= 2.25 A to 0.75 A Voltage change 190 mV
Recovery time 150 μs
Loop bandwidth VIN = 24 V, IO= 1.5 A 31.6 kHz
Phase margin VIN = 24 V , IO= 1.5 A 55 °
Input ripple voltage IO= 3 A 400 mVPP
Output ripple voltage IO= 3 A <30 mVPP
Output rise time 3.47 ms
Operating frequency 340 kHz
Maximum efficiency TPS54336AEVM-010, VIN = 8 V, IO= 0.7 A 96.5%

SS SS
REF
T (msec)× I (μA)
C3(nF) = V (V)
( )
´
- + +
ENFALLING
STOP ENFALLING p h
R1 V
R2 =
V V R1 I I
æ ö -
ç ÷
è ø
æ ö
- +
ç ÷
è ø
ENFALLING
START STOP
ENRISING
ENFALLING
p h
ENRISING
V
V V
V
R1 = V
I 1 I
V
OUT
R7 0.8 V
R8 =
V -0.8V
´
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TPS54336AEVM-010 3-A Regulator Evaluation Module
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54336A. Some
modifications can be made to this module.
1.3.1 Output Voltage Set Point
The voltage divider, R7 and R8, is used to set the output voltage. To change the output voltage of the
EVM, it is necessary to change the value of resistor R8. Changing the value of R8 can change the output
voltage above 0.8 V. The value of R8 for a specific output voltage can be calculated using Equation 1.
Use 100 kΩfor R7.
(1)
Table 3 lists the R9 and R10 values for some common output voltages. Note that VIN must be in a range
so that the minimum on-time is greater than 145 ns, and the maximum duty cycle is less than 100%. The
values given in Table 3 are standard values, not the exact value calculated using Equation 1.
Table 3. Output Voltages Available
Output Voltage (V) R7 Value (kΩ) R8 Value (kΩ)
1.2 100 200
1.8 100 80.6
2.5 100 47.5
3.3 100 32.4
5.0 100 19.1
1.3.2 Adjustable UVLO
The under voltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 7.12 V and a stop voltage of 6.12 V using R1 = 220 kΩand R2 = 43.2 kΩ. Use Equation 2 and
Equation 3 to calculate required resistor values for different start and stop voltages.
(2)
(3)
Ip= 1.15 µA, Ih= 3.3 µA, VENFALLING = 1.17 V and VENRISING = 1.21 V
1.3.3 Adjustable Slow Start
The TPS54336A has an adjustable slow start function. The slow start time can be adjusted with C3, using
Equation 4
(4)
ISS = 2.3 µA, VREF = 0.8 V.

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TPS54336AEVM-010 3-A Regulator Evaluation Module
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54336AEVM-010 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input/Output Connections
The TPS54336AEVM-010 is provided with input/output connectors and test points as shown in Table 4. A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J4 through a pair of 20-AWG wires. The maximum load current capability must be
at least 4 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the
wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient
ground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.
Table 4. EVM Connectors and Test Points
Reference Designator Function
J1 VIN (see Table 1 for VIN range).
J2 VOUT, 5 V at 3 A maximum.
JP1 2-pin header for enable. Connect EN to ground to disable, open to enable.
TP1 VIN test point at VIN connector.
TP2 GND test point at VIN.
TP3 Slow start monitor test point for TPS54336A.
TP4 PH test point
TP5 Test point between voltage divider network and output. Used for loop response measurements.
TP6 Output voltage test point at OUT connector.
TP7 GND test point at OUT connector.

0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
Efficiency - %
Output Current - A
C002
VIN = 12 V
VIN = 24 V
0
10
20
30
40
50
60
70
80
90
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Efficiency - %
Output Current - A
C001
VIN = 24 V
VIN = 12 V
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2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 0.5 A – 1 A, and then decreases as the load
current increases towards full load. Figure 1 shows the efficiency for the TPS54336AEVM-010 at an
ambient temperature of 25°C.
Figure 1. TPS54336AEVM-010 Efficiency
Figure 2 shows the efficiency for the TPS54336AEVM-010 on a semi-log scale to better show light load
efficiency. The ambient temperature is 25°C.
Figure 2. TPS54336AEVM-010 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-
source resistance of the internal MOSFET.

-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
5 10 15 20 25 30
Line Rgulation - %
Input Voltage - V
C004
IOUT = 1.5 A
±0.50
±0.40
±0.30
±0.20
±0.10
0.00
0.10
0.20
0.30
0.40
0.50
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Load Regulation - %
Output Current - A
C003
VIN = 24 V
VIN = 12 V
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2.3 Output Voltage Load Regulation
Figure 3 shows the load regulation for the TPS54336AEVM-010.
Figure 3. TPS54336AEVM-010 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 4 shows the line regulation for the TPS54336AEVM-010.
Figure 4. TPS54336AEVM-010 Line Regulation

-180
-120
-60
0
60
120
180
-60
-40
-20
0
20
40
60
10 100 1000 10000 100000 1000000
Phase - Degrees
Gain - dB
Frequency - Hz
C005
Gain
Phase
V = 200 mV / div (ac coupled)
OUT
Time = 200 µsec / div
I = 1 A / div
OUT
Load step = 0.75 A - 2.25 A, slew rate = 500 mA / µsec
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2.5 Load Transients
Figure 5 shows the TPS54336AEVM-010 response to load transients. The current step is from 25% to
75% of maximum rated load at 24-V input. Total peak-to-peak voltage variation is as shown, including
ripple and noise on the output.
Figure 5. TPS54336AEVM-010 Transient Response
2.6 Loop Characteristics
Figure 6 shows the TPS54336AEVM-010 loop-response characteristics. Gain and phase plots are shown
for VIN voltage of 24 V. Load current for the measurement is 1.5 A.
Figure 6. TPS54336AEVM-010 Loop Response

V = 20 mV / div (ac coupled)
OUT
Time = 2 µsec / div
SW = 10 V / div
V = 20 mV / div (ac coupled)
OUT
Time = 2 µsec / div
SW = 10 V / div
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2.7 Output Voltage Ripple
Figure 7,Figure 8, and Figure 9 show the TPS54336AEVM-010 output voltage ripple for full load, light
load, and skip mode operation. VIN = 24 V. The output The ripple voltage is measured directly across the
output capacitors.
Figure 7. TPS54336AEVM-010 Output Ripple, IOUT =3A
Figure 8. TPS54336AEVM-010 Output Ripple, IOUT = 100 mA

V = 200 mV / div (ac coupled)
IN
Time = 2 µsec / div
SW = 10 V / div
V = 20 mV / div (ac coupled)
OUT
Time = 100 µsec / div
SW = 10 V / div
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Figure 9. TPS54336AEVM-010 Output Ripple, IOUT =0A
2.8 Input Voltage Ripple
Figure 10 shows the TPS54336AEVM-010 input voltage ripple. The output current is the rated full load of
3 A and VIN = 24 V. The ripple voltage is measured directly across the input capacitors.
Figure 10. TPS54336AEVM-010 Input Ripple

V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 20 V / div
IN
SS = 2 V / div
V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 20 V / div
IN
SS = 2 V / div
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2.9 Powering Up
Figure 11 and Figure 12 show the start-up waveforms for the TPS54336AEVM-010. In Figure 11, the
output voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1and
R2 resistor divider network. In Figure 12, the input voltage is initially applied and the output is inhibited by
using a jumper at JP1 to tie EN to GND. When the jumper is removed, EN is released. When the EN
voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps
up to the externally set value of 5 V. The input voltage for these plots is 24 V and the load is 5 Ω.
Figure 11. TPS54336AEVM-010 Start-Up Relative to VIN
Figure 12. TPS54336AEVM-010 Start-up Relative to Enable