Texas Instruments TPS54336AEVM-010 User manual

1
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
User's Guide
SLVUB77–July 2017
TPS54336AEVM-010 3-A Regulator Evaluation Module
This user's guide contains background information for the TPS54336A as well as support documentation
for the TPS54336AEVM-010 evaluation module (BSR010-002). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54336AEVM-010.
Contents
1 Introduction ................................................................................................................... 2
2 Test Setup and Results..................................................................................................... 4
3 Board Layout................................................................................................................ 12
4 Schematic and Bill of Materials........................................................................................... 14
List of Figures
1 TPS54336AEVM-010 Efficiency........................................................................................... 5
2 TPS54336AEVM-010 Low Current Efficiency ........................................................................... 5
3 TPS54336AEVM-010 Load Regulation................................................................................... 6
4 TPS54336AEVM-010 Line Regulation.................................................................................... 6
5 TPS54336AEVM-010 Transient Response .............................................................................. 7
6 TPS54336AEVM-010 Loop Response ................................................................................... 7
7 TPS54336AEVM-010 Output Ripple, IOUT = 3 A ........................................................................ 8
8 TPS54336AEVM-010 Output Ripple, IOUT = 100 mA.................................................................... 8
9 TPS54336AEVM-010 Output Ripple, IOUT = 0 A ......................................................................... 9
10 TPS54336AEVM-010 Input Ripple ....................................................................................... 9
11 TPS54336AEVM-010 Start-Up Relative to VIN ......................................................................... 10
12 TPS54336AEVM-010 Start-up Relative to Enable .................................................................... 10
13 TPS54336AEVM-010 Shut-down Relative to VIN ...................................................................... 11
14 TPS54336AEVM-010 Shut-down Relative to EN...................................................................... 11
15 TPS54336AEVM-010 Top-Side Assembly.............................................................................. 12
16 TPS54336AEVM-010 Top-Side Layout ................................................................................. 13
17 TPS54336AEVM-010 Bottom-Side Layout ............................................................................. 13
18 TPS54336AEVM-010 Schematic......................................................................................... 14
List of Tables
1 Input Voltage and Output Current Summary............................................................................. 2
2 TPS54336AEVM-010 Performance Specification Summary........................................................... 2
3 Output Voltages Available.................................................................................................. 3
4 EVM Connectors and Test Points......................................................................................... 4
5 TPS54336AEVM-010 Bill of Materials................................................................................... 15
Trademarks
All trademarks are the property of their respective owners.

Introduction www.ti.com
2SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
1 Introduction
This user's guide contains background information for the TPS54336A as well as support documentation
for the TPS54336AEVM-010 evaluation module (BSR010-002). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54336AEVM-010.
1.1 Background
The TPS54336A dc/dc converter is designed to provide up to a 3-A output from an input voltage source of
4.5 V to 28 V. Rated input voltage and output current range for the evaluation module are given in
Table 1. This evaluation module is designed to demonstrate the small printed-circuit-board areas that may
be achieved when designing with the TPS54336A regulator. The switching frequency is internally set at a
nominal 340 kHz. The high-side and low-side MOSFETs are incorporated inside the TPS54336A package
along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allow the
TPS54336A to achieve high efficiencies and helps keep the junction temperature low at high output
currents. The compensation components are external to the integrated circuit (IC), and an external divider
allows for an adjustable output voltage. Additionally, the TPS54336A provides adjustable slow start and
undervoltage lockout inputs. The absolute maximum input voltage is 30 V for the TPS54336AEVM-010.
Table 1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54336AEVM-010 VIN = 8 V to 28 V 0 A to 3 A
1.2 Performance Specification Summary
A summary of the TPS54336AEVM-010 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN = 24 V and an output voltage of 5.0 V, unless otherwise specified. The
TPS54336AEVM-010 is designed and tested for VIN = 8 V to 28 V. The ambient temperature is 25°C for all
measurements, unless otherwise noted.
Table 2. TPS54336AEVM-010 Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN operating voltage range 8 24 28 V
VIN start voltage 7.12 V
VIN stop voltage 6.12 V
Output voltage set point 5 V
Output current range VIN = 8 V to 28 V 0 3 A
Line regulation IO= 1.5 A, VIN = 8 V to 28 V ±0.05%
Load regulation VIN = 24 V, IO= 0 A to 3 A ±0.3%
Load transient response IO= 0.75 A to 2.25 A Voltage change –190 mV
Recovery time 150 μs
IO= 2.25 A to 0.75 A Voltage change 190 mV
Recovery time 150 μs
Loop bandwidth VIN = 24 V, IO= 1.5 A 31.6 kHz
Phase margin VIN = 24 V , IO= 1.5 A 55 °
Input ripple voltage IO= 3 A 400 mVPP
Output ripple voltage IO= 3 A <30 mVPP
Output rise time 3.47 ms
Operating frequency 340 kHz
Maximum efficiency TPS54336AEVM-010, VIN = 8 V, IO= 0.7 A 96.5%

SS SS
REF
T (msec)× I (μA)
C3(nF) = V (V)
( )
´
- + +
ENFALLING
STOP ENFALLING p h
R1 V
R2 =
V V R1 I I
æ ö -
ç ÷
è ø
æ ö
- +
ç ÷
è ø
ENFALLING
START STOP
ENRISING
ENFALLING
p h
ENRISING
V
V V
V
R1 = V
I 1 I
V
OUT
R7 0.8 V
R8 =
V -0.8V
´
www.ti.com Introduction
3
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54336A. Some
modifications can be made to this module.
1.3.1 Output Voltage Set Point
The voltage divider, R7 and R8, is used to set the output voltage. To change the output voltage of the
EVM, it is necessary to change the value of resistor R8. Changing the value of R8 can change the output
voltage above 0.8 V. The value of R8 for a specific output voltage can be calculated using Equation 1.
Use 100 kΩfor R7.
(1)
Table 3 lists the R9 and R10 values for some common output voltages. Note that VIN must be in a range
so that the minimum on-time is greater than 145 ns, and the maximum duty cycle is less than 100%. The
values given in Table 3 are standard values, not the exact value calculated using Equation 1.
Table 3. Output Voltages Available
Output Voltage (V) R7 Value (kΩ) R8 Value (kΩ)
1.2 100 200
1.8 100 80.6
2.5 100 47.5
3.3 100 32.4
5.0 100 19.1
1.3.2 Adjustable UVLO
The under voltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 7.12 V and a stop voltage of 6.12 V using R1 = 220 kΩand R2 = 43.2 kΩ. Use Equation 2 and
Equation 3 to calculate required resistor values for different start and stop voltages.
(2)
(3)
Ip= 1.15 µA, Ih= 3.3 µA, VENFALLING = 1.17 V and VENRISING = 1.21 V
1.3.3 Adjustable Slow Start
The TPS54336A has an adjustable slow start function. The slow start time can be adjusted with C3, using
Equation 4
(4)
ISS = 2.3 µA, VREF = 0.8 V.

Test Setup and Results www.ti.com
4SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54336AEVM-010 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input/Output Connections
The TPS54336AEVM-010 is provided with input/output connectors and test points as shown in Table 4. A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J4 through a pair of 20-AWG wires. The maximum load current capability must be
at least 4 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the
wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient
ground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.
Table 4. EVM Connectors and Test Points
Reference Designator Function
J1 VIN (see Table 1 for VIN range).
J2 VOUT, 5 V at 3 A maximum.
JP1 2-pin header for enable. Connect EN to ground to disable, open to enable.
TP1 VIN test point at VIN connector.
TP2 GND test point at VIN.
TP3 Slow start monitor test point for TPS54336A.
TP4 PH test point
TP5 Test point between voltage divider network and output. Used for loop response measurements.
TP6 Output voltage test point at OUT connector.
TP7 GND test point at OUT connector.

0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
Efficiency - %
Output Current - A
C002
VIN = 12 V
VIN = 24 V
0
10
20
30
40
50
60
70
80
90
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Efficiency - %
Output Current - A
C001
VIN = 24 V
VIN = 12 V
www.ti.com Test Setup and Results
5
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 0.5 A – 1 A, and then decreases as the load
current increases towards full load. Figure 1 shows the efficiency for the TPS54336AEVM-010 at an
ambient temperature of 25°C.
Figure 1. TPS54336AEVM-010 Efficiency
Figure 2 shows the efficiency for the TPS54336AEVM-010 on a semi-log scale to better show light load
efficiency. The ambient temperature is 25°C.
Figure 2. TPS54336AEVM-010 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-
source resistance of the internal MOSFET.

-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
5 10 15 20 25 30
Line Rgulation - %
Input Voltage - V
C004
IOUT = 1.5 A
±0.50
±0.40
±0.30
±0.20
±0.10
0.00
0.10
0.20
0.30
0.40
0.50
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Load Regulation - %
Output Current - A
C003
VIN = 24 V
VIN = 12 V
Test Setup and Results www.ti.com
6SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2.3 Output Voltage Load Regulation
Figure 3 shows the load regulation for the TPS54336AEVM-010.
Figure 3. TPS54336AEVM-010 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 4 shows the line regulation for the TPS54336AEVM-010.
Figure 4. TPS54336AEVM-010 Line Regulation

-180
-120
-60
0
60
120
180
-60
-40
-20
0
20
40
60
10 100 1000 10000 100000 1000000
Phase - Degrees
Gain - dB
Frequency - Hz
C005
Gain
Phase
V = 200 mV / div (ac coupled)
OUT
Time = 200 µsec / div
I = 1 A / div
OUT
Load step = 0.75 A - 2.25 A, slew rate = 500 mA / µsec
www.ti.com Test Setup and Results
7
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2.5 Load Transients
Figure 5 shows the TPS54336AEVM-010 response to load transients. The current step is from 25% to
75% of maximum rated load at 24-V input. Total peak-to-peak voltage variation is as shown, including
ripple and noise on the output.
Figure 5. TPS54336AEVM-010 Transient Response
2.6 Loop Characteristics
Figure 6 shows the TPS54336AEVM-010 loop-response characteristics. Gain and phase plots are shown
for VIN voltage of 24 V. Load current for the measurement is 1.5 A.
Figure 6. TPS54336AEVM-010 Loop Response

V = 20 mV / div (ac coupled)
OUT
Time = 2 µsec / div
SW = 10 V / div
V = 20 mV / div (ac coupled)
OUT
Time = 2 µsec / div
SW = 10 V / div
Test Setup and Results www.ti.com
8SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2.7 Output Voltage Ripple
Figure 7,Figure 8, and Figure 9 show the TPS54336AEVM-010 output voltage ripple for full load, light
load, and skip mode operation. VIN = 24 V. The output The ripple voltage is measured directly across the
output capacitors.
Figure 7. TPS54336AEVM-010 Output Ripple, IOUT =3A
Figure 8. TPS54336AEVM-010 Output Ripple, IOUT = 100 mA

V = 200 mV / div (ac coupled)
IN
Time = 2 µsec / div
SW = 10 V / div
V = 20 mV / div (ac coupled)
OUT
Time = 100 µsec / div
SW = 10 V / div
www.ti.com Test Setup and Results
9
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
Figure 9. TPS54336AEVM-010 Output Ripple, IOUT =0A
2.8 Input Voltage Ripple
Figure 10 shows the TPS54336AEVM-010 input voltage ripple. The output current is the rated full load of
3 A and VIN = 24 V. The ripple voltage is measured directly across the input capacitors.
Figure 10. TPS54336AEVM-010 Input Ripple

V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 20 V / div
IN
SS = 2 V / div
V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 20 V / div
IN
SS = 2 V / div
Test Setup and Results www.ti.com
10 SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2.9 Powering Up
Figure 11 and Figure 12 show the start-up waveforms for the TPS54336AEVM-010. In Figure 11, the
output voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1and
R2 resistor divider network. In Figure 12, the input voltage is initially applied and the output is inhibited by
using a jumper at JP1 to tie EN to GND. When the jumper is removed, EN is released. When the EN
voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps
up to the externally set value of 5 V. The input voltage for these plots is 24 V and the load is 5 Ω.
Figure 11. TPS54336AEVM-010 Start-Up Relative to VIN
Figure 12. TPS54336AEVM-010 Start-up Relative to Enable

V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 20 V / div
IN
SS = 2 V / div
V = 2 V / div
OUT
Time = 2 msec / div
EN = 5 V / div
V = 20 V / div
IN
SS = 2 V / div
www.ti.com Test Setup and Results
11
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
2.10 Powering Down
Figure 13 and Figure 14 show the start-up waveforms for the TPS54336AEVM-010. In Figure 13, the
output voltage ramps down as soon as the input voltage falls below the UVLO stop threshold as set by the
R1 and R2 resistor divider network. In Figure 14, the output is inhibited by using a jumper at JP1 to tie EN
to GND. The input voltage for these plots is 24 V and the load is 5 Ω.
Figure 13. TPS54336AEVM-010 Shut-down Relative to VIN
Figure 14. TPS54336AEVM-010 Shut-down Relative to EN

Board Layout www.ti.com
12 SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
3 Board Layout
This section provides a description of the TPS54336AEVM-010, board layout, and layer illustrations.
3.1 Layout
Figure 15 through Figure 17 show the board layout for the TPS54336AEVM-010. The topside layer of the
EVM is laid out in a manner typical of a user application. The top and bottom layers are 2-oz. copper.
The top layer contains the main power traces for VIN, VOUT, and VPHASE. Also on the top layer are
connections for the remaining pins of the TPS54336A and a large area filled with ground. To facilitate the
placement of the main input bypass capacitor as close to the VIN and GND pins as possible, the trace for
VPHASE is routed to the bottom layer immediately at the pin 3 connection. It is routed back to the top
layer at the L1 inductor and C4 BOOT capacitor. The bottom layer contains a ground plane plus a copper
fill area for VPHASE, an etch run to connect the upper resistor of the voltage set point divider to the
regulation point at the J2 output connector, and a trace to connect the upper resistor of the UVLO set
point divider network to VIN. The top-side ground areas are connected to the bottom and internal ground
planes with multiple vias placed around the board including four vias directly under the TPS54336A device
to provide a thermal path from the top-side ground area to the bottom-side and internal ground planes.
The input decoupling capacitors (C2, and C1) and bootstrap capacitor (C4) are all located as close to the
IC as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC.
The BSR010 PCB is set up to accommodate both the TPS54335A and TPS54336A. For TPS54335A, the
RT resistor R3 is used, while for TPS54336A, C3 is used to set the adjustable slow-start time. For the
TPS54336A, an additional input bulk capacitor may be required, depending on the EVM connection to the
input supply.
Figure 15. TPS54336AEVM-010 Top-Side Assembly

www.ti.com Board Layout
13
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
Figure 16. TPS54336AEVM-010 Top-Side Layout
Figure 17. TPS54336AEVM-010 Bottom-Side Layout

0.1µFC4
0.1µF
C2
10µF
C1
0.012µF
C5
120pF
C6
C11
open C3
100kR7
19.1k
R8
51.1
R6
43.2k
R2
220k
R1
0
R4
R3
3.74k
R5
1
2
J1
1
2
J2
TP4
TP3
TP5
1
2
JP1
SH-JP1
VSENSE
VSENSE
TP6TP1
TP7TP2
47µF
C7
open
C9
open
C10
47µF
C8
15µHL1
VIN
2
VSENSE
5
EN
7
SS
8GND 4
COMP 6
PH 3
BOOT 1
PAD
U1
TPS54336ADDAR
open
VIN 8V - 28V VOUT 5V, 3A MAX
0.01µF
Copyright © 2017, Texas Instruments Incorporated
Schematic and Bill of Materials www.ti.com
14 SLVUB77–July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
4 Schematic and Bill of Materials
This section presents the TPS54336AEVM-010 schematic and bill of materials.
4.1 Schematic
Figure 18 is the schematic for the TPS54336AEVM-010.
Spacer
Figure 18. TPS54336AEVM-010 Schematic

www.ti.com Schematic and Bill of Materials
15
SLVUB77–July 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
TPS54336AEVM-010 3-A Regulator Evaluation Module
4.2 Bill of Materials
Table 5 presents the bill of materials for the TPS54336AEVM-010.
Table 5. TPS54336AEVM-010 Bill of Materials
Designator Quantity Value Description PackageReference PartNumber Manufacturer
C1 1 10uF CAP, CERM, 10uF, 35V, +/-10%, X7R, 1210 1210 GRM32ER7YA106KA12L MuRata
C2, C4 2 0.1uF CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0603 0603 GRM188R71H104KA93D MuRata
C3 1 0.01uF CAP, CERM, 0.01uF, 50V, +/-10%, X5R, 0603 0603 GRM188R61H103KA01D MuRata
C5 1 0.012uF CAP, CERM, 0.012uF, 50V, +/-10%, X7R, 0603 0603 GRM188R71H123KA01D MuRata
C6 1 120pF CAP, CERM, 120pF, 50V, +/-5%, C0G/NP0, 0603 0603 GRM1885C1H121JA01D MuRata
C7, C8 2 47uF CAP, CERM, 47uF, 10V, +/-10%, X5R, 1206 1206 GRM31CR61A476KE15L MuRata
C9, C10 0 CAP, CERM, 1206 1206
C11 0 CAP, CERM, 0603 603
J1, J2 2 Conn Term Block, 2POS, 3.81mm, TH 2x1, 3.81mm 1727010 Phoenix Contact
JP1 1 Header, TH, 100mil, 2x1, Gold plated, 230 mil above insulator 2x1, 100mil TSW-102-07-G-S Samtec, Inc.
L1 1 15uH Inductor, Shielded, Composite, 15uH, 5.8A, 0.04 ohm, SMD 322x158x322mil IHLP3232DZER150M5A Vishay-Dale
R1 1 220k RES, 220k ohm, 1%, 0.1W, 0603 0603 RC0603FR-07220KL Yageo America
R2 1 43.2k RES, 43.2k ohm, 1%, 0.1W, 0603 0603 CRCW060343K2FKEA Vishay-Dale
R3 0 RES, 0603 0603
R4 1 0 RES, 0 ohm, 5%, 0.1W, 0603 0603 CRCW06030000Z0EA Vishay-Dale
R5 1 3.74k RES, 3.74k ohm, 1%, 0.1W, 0603 0603 CRCW06033K74FKEA Vishay-Dale
R6 1 51.1 RES, 51.1 ohm, 1%, 0.1W, 0603 0603 CRCW060351R1FKEA Vishay-Dale
R7 1 100k RES, 100k ohm, 1%, 0.1W, 0603 0603 CRCW0603100KFKEA Vishay-Dale
R8 1 19.1k RES, 19.1k ohm, 1%, 0.1W, 0603 0603 CRCW060319K1FKEA Vishay-Dale
SH-JP1 1 Shunt, 100mil, Gold plated, Black 382811-6 AMP
TP1, TP6 2 Red Test Point, TH, Miniature, Red TH, Miniature 5000 Keystone
TP2, TP7 2 Black Test Point, TH, Miniature, Black TH, Miniature 5001 Keystone
TP3, TP5 2 White Test Point, TH, Miniature, White TH, Miniature 5002 Keystone
TP4 1 Yellow Test Point, TH, Miniature, Yellow TH, Miniature 5004 Keystone
U1 1 4.5V TO 28V INPUT, 3A OUTPUT, SYNCHRONOUS STEP DOWN SWIFT CONVERTER, DDA0008E DDA0008E TPS54336ADDAR Texas Instruments
PCB 1 Printed Circuit Board BSR010 Any

STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.

FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs
(which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.

【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union
3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive):
This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this
product may cause radio interference in which case the user may be required to take adequate measures.
4EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.

6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT
LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL
FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT
NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE
SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE
CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR
INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE
EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR
IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY
WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL
THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS OR THE USE OF THE EVMS , REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR
REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING,
OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF
USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI
MORE THAN TWELVE (12) MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS
OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY USE OF AN EVM PROVIDED
HEREUNDER, INCLUDING FROM ANY WARRANTY, INDEMITY OR OTHER OBLIGATION ARISING OUT OF OR IN
CONNECTION WITH THESE TERMS, , EXCEED THE TOTAL AMOUNT PAID TO TI BY USER FOR THE PARTICULAR
EVM(S) AT ISSUE DURING THE PRIOR TWELVE (12) MONTHS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE
CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated

IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES
Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to,
reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are
developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you
(individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of
this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources.
You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing your
applications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications
(and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. You
represent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that (1)
anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that
might cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, you
will thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted any
testing other than that specifically described in the published documentation for a particular TI Resource.
You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include
the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO
ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING TI RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS.
TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOT
LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF
DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL,
COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR
ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your non-
compliance with the terms and provisions of this Notice.
This Notice applies to TI Resources. Additional terms apply to the use and purchase of certain types of materials, TI products and services.
These include; without limitation, TI’s standard terms for semiconductor products http://www.ti.com/sc/docs/stdterms.htm), evaluation
modules, and samples (http://www.ti.com/sc/docs/sampterms.htm).
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated